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-rw-r--r--arch/arm/plat-s3c24xx/Kconfig7
-rw-r--r--arch/arm/plat-s3c24xx/Makefile1
-rw-r--r--arch/arm/plat-s3c24xx/s3c2410-cpufreq-utils.c64
3 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index d82d30c2f059..a547c79ed6ce 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -116,6 +116,13 @@ config S3C2410_IOTIMING
116 Internal node to select io timing code that is common to the s3c2410 116 Internal node to select io timing code that is common to the s3c2410
117 and s3c2440/s3c2442 cpu frequency support. 117 and s3c2440/s3c2442 cpu frequency support.
118 118
119config S3C2410_CPUFREQ_UTILS
120 bool
121 depends on CPU_FREQ_S3C24XX
122 help
123 Internal node to select timing code that is common to the s3c2410
124 and s3c2440/s3c244 cpu frequency support.
125
119config MACH_SMDK 126config MACH_SMDK
120 bool 127 bool
121 help 128 help
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index 6f9afd13ab4f..b28fe9cb0e5e 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o
36obj-$(CONFIG_S3C2410_DMA) += dma.o 36obj-$(CONFIG_S3C2410_DMA) += dma.o
37obj-$(CONFIG_S3C24XX_ADC) += adc.o 37obj-$(CONFIG_S3C24XX_ADC) += adc.o
38obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o 38obj-$(CONFIG_S3C2410_IOTIMING) += s3c2410-iotiming.o
39obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += s3c2410-cpufreq-utils.o
39 40
40# device specific setup and/or initialisation 41# device specific setup and/or initialisation
41obj-$(CONFIG_ARCH_S3C2410) += setup-i2c.o 42obj-$(CONFIG_ARCH_S3C2410) += setup-i2c.o
diff --git a/arch/arm/plat-s3c24xx/s3c2410-cpufreq-utils.c b/arch/arm/plat-s3c24xx/s3c2410-cpufreq-utils.c
new file mode 100644
index 000000000000..43ea80190d87
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/s3c2410-cpufreq-utils.c
@@ -0,0 +1,64 @@
1/* linux/arch/arm/plat-s3c24xx/s3c2410-cpufreq-utils.c
2 *
3 * Copyright (c) 2009 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/kernel.h>
15#include <linux/errno.h>
16#include <linux/cpufreq.h>
17#include <linux/io.h>
18
19#include <mach/map.h>
20#include <mach/regs-mem.h>
21#include <mach/regs-clock.h>
22
23#include <plat/cpu-freq-core.h>
24
25/**
26 * s3c2410_cpufreq_setrefresh - set SDRAM refresh value
27 * @cfg: The frequency configuration
28 *
29 * Set the SDRAM refresh value appropriately for the configured
30 * frequency.
31 */
32void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
33{
34 struct s3c_cpufreq_board *board = cfg->board;
35 unsigned long refresh;
36 unsigned long refval;
37
38 /* Reduce both the refresh time (in ns) and the frequency (in MHz)
39 * down to ensure that we do not overflow 32 bit numbers.
40 *
41 * This should work for HCLK up to 133MHz and refresh period up
42 * to 30usec.
43 */
44
45 refresh = (cfg->freq.hclk / 100) * (board->refresh / 10);
46 refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */
47 refresh = (1 << 11) + 1 - refresh;
48
49 s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh);
50
51 refval = __raw_readl(S3C2410_REFRESH);
52 refval &= ~((1 << 12) - 1);
53 refval |= refresh;
54 __raw_writel(refval, S3C2410_REFRESH);
55}
56
57/**
58 * s3c2410_set_fvco - set the PLL value
59 * @cfg: The frequency configuration
60 */
61void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)
62{
63 __raw_writel(cfg->pll.index, S3C2410_MPLLCON);
64}