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-rw-r--r--arch/arm/plat-s3c24xx/Kconfig2
-rw-r--r--arch/arm/plat-s3c24xx/cpu.c8
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c2
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/s3c244x.h7
-rw-r--r--arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c6
-rw-r--r--arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c6
-rw-r--r--arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c6
7 files changed, 20 insertions, 17 deletions
diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig
index 5a27b1b538f2..eb105e61c746 100644
--- a/arch/arm/plat-s3c24xx/Kconfig
+++ b/arch/arm/plat-s3c24xx/Kconfig
@@ -8,7 +8,7 @@ config PLAT_S3C24XX
8 default y 8 default y
9 select NO_IOPORT 9 select NO_IOPORT
10 select ARCH_REQUIRE_GPIOLIB 10 select ARCH_REQUIRE_GPIOLIB
11 select S3C_DEVICE_NAND 11 select S3C_DEV_NAND
12 select S3C_GPIO_CFG_S3C24XX 12 select S3C_GPIO_CFG_S3C24XX
13 help 13 help
14 Base platform code for any Samsung S3C24XX device 14 Base platform code for any Samsung S3C24XX device
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 76d0858c3cbb..4a10c0f684b2 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -88,7 +88,7 @@ static struct cpu_table cpu_ids[] __initdata = {
88 { 88 {
89 .idcode = 0x32440000, 89 .idcode = 0x32440000,
90 .idmask = 0xffffffff, 90 .idmask = 0xffffffff,
91 .map_io = s3c244x_map_io, 91 .map_io = s3c2440_map_io,
92 .init_clocks = s3c244x_init_clocks, 92 .init_clocks = s3c244x_init_clocks,
93 .init_uarts = s3c244x_init_uarts, 93 .init_uarts = s3c244x_init_uarts,
94 .init = s3c2440_init, 94 .init = s3c2440_init,
@@ -97,7 +97,7 @@ static struct cpu_table cpu_ids[] __initdata = {
97 { 97 {
98 .idcode = 0x32440001, 98 .idcode = 0x32440001,
99 .idmask = 0xffffffff, 99 .idmask = 0xffffffff,
100 .map_io = s3c244x_map_io, 100 .map_io = s3c2440_map_io,
101 .init_clocks = s3c244x_init_clocks, 101 .init_clocks = s3c244x_init_clocks,
102 .init_uarts = s3c244x_init_uarts, 102 .init_uarts = s3c244x_init_uarts,
103 .init = s3c2440_init, 103 .init = s3c2440_init,
@@ -106,7 +106,7 @@ static struct cpu_table cpu_ids[] __initdata = {
106 { 106 {
107 .idcode = 0x32440aaa, 107 .idcode = 0x32440aaa,
108 .idmask = 0xffffffff, 108 .idmask = 0xffffffff,
109 .map_io = s3c244x_map_io, 109 .map_io = s3c2442_map_io,
110 .init_clocks = s3c244x_init_clocks, 110 .init_clocks = s3c244x_init_clocks,
111 .init_uarts = s3c244x_init_uarts, 111 .init_uarts = s3c244x_init_uarts,
112 .init = s3c2442_init, 112 .init = s3c2442_init,
@@ -115,7 +115,7 @@ static struct cpu_table cpu_ids[] __initdata = {
115 { 115 {
116 .idcode = 0x32440aab, 116 .idcode = 0x32440aab,
117 .idmask = 0xffffffff, 117 .idmask = 0xffffffff,
118 .map_io = s3c244x_map_io, 118 .map_io = s3c2442_map_io,
119 .init_clocks = s3c244x_init_clocks, 119 .init_clocks = s3c244x_init_clocks,
120 .init_uarts = s3c244x_init_uarts, 120 .init_uarts = s3c244x_init_uarts,
121 .init = s3c2442_init, 121 .init = s3c2442_init,
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 24c6f5a30596..243b6411050d 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -82,8 +82,6 @@ static struct s3c_gpio_cfg s3c24xx_gpiocfg_banka = {
82struct s3c_gpio_cfg s3c24xx_gpiocfg_default = { 82struct s3c_gpio_cfg s3c24xx_gpiocfg_default = {
83 .set_config = s3c_gpio_setcfg_s3c24xx, 83 .set_config = s3c_gpio_setcfg_s3c24xx,
84 .get_config = s3c_gpio_getcfg_s3c24xx, 84 .get_config = s3c_gpio_getcfg_s3c24xx,
85 .set_pull = s3c_gpio_setpull_1up,
86 .get_pull = s3c_gpio_getpull_1up,
87}; 85};
88 86
89struct s3c_gpio_chip s3c24xx_gpios[] = { 87struct s3c_gpio_chip s3c24xx_gpios[] = {
diff --git a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
index 307248d1ccbb..89e8d0a25f87 100644
--- a/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
+++ b/arch/arm/plat-s3c24xx/include/plat/s3c244x.h
@@ -21,17 +21,22 @@ extern void s3c244x_init_clocks(int xtal);
21#else 21#else
22#define s3c244x_init_clocks NULL 22#define s3c244x_init_clocks NULL
23#define s3c244x_init_uarts NULL 23#define s3c244x_init_uarts NULL
24#define s3c244x_map_io NULL
25#endif 24#endif
26 25
27#ifdef CONFIG_CPU_S3C2440 26#ifdef CONFIG_CPU_S3C2440
28extern int s3c2440_init(void); 27extern int s3c2440_init(void);
28
29extern void s3c2440_map_io(void);
29#else 30#else
30#define s3c2440_init NULL 31#define s3c2440_init NULL
32#define s3c2440_map_io NULL
31#endif 33#endif
32 34
33#ifdef CONFIG_CPU_S3C2442 35#ifdef CONFIG_CPU_S3C2442
34extern int s3c2442_init(void); 36extern int s3c2442_init(void);
37
38extern void s3c2442_map_io(void);
35#else 39#else
36#define s3c2442_init NULL 40#define s3c2442_init NULL
41#define s3c2442_map_io NULL
37#endif 42#endif
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
index 9793544a6ace..704175b0573f 100644
--- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
+++ b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
@@ -29,8 +29,8 @@ void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
29 } else { 29 } else {
30 s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT); 30 s3c_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT);
31 s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT); 31 s3c_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT);
32 s3c_gpio_cfgpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE); 32 s3c_gpio_setpull(S3C2410_GPE(11), S3C_GPIO_PULL_NONE);
33 s3c_gpio_cfgpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE); 33 s3c_gpio_setpull(S3C2410_GPE(12), S3C_GPIO_PULL_NONE);
34 s3c_gpio_cfgpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE); 34 s3c_gpio_setpull(S3C2410_GPE(13), S3C_GPIO_PULL_NONE);
35 } 35 }
36} 36}
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c
index db9e9e477ec1..72457afd6255 100644
--- a/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c
+++ b/arch/arm/plat-s3c24xx/spi-bus1-gpd8_9_10.c
@@ -31,8 +31,8 @@ void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi,
31 } else { 31 } else {
32 s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT); 32 s3c_gpio_cfgpin(S3C2410_GPD(8), S3C2410_GPIO_INPUT);
33 s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT); 33 s3c_gpio_cfgpin(S3C2410_GPD(9), S3C2410_GPIO_INPUT);
34 s3c_gpio_cfgpull(S3C2410_GPD(10), S3C_GPIO_PULL_NONE); 34 s3c_gpio_setpull(S3C2410_GPD(10), S3C_GPIO_PULL_NONE);
35 s3c_gpio_cfgpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE); 35 s3c_gpio_setpull(S3C2410_GPD(9), S3C_GPIO_PULL_NONE);
36 s3c_gpio_cfgpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE); 36 s3c_gpio_setpull(S3C2410_GPD(8), S3C_GPIO_PULL_NONE);
37 } 37 }
38} 38}
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
index 8ea663a438bb..c3972b645d13 100644
--- a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
+++ b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
@@ -29,8 +29,8 @@ void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,
29 } else { 29 } else {
30 s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT); 30 s3c_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT);
31 s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT); 31 s3c_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT);
32 s3c_gpio_cfgpull(S3C2410_GPG(5), S3C_GPIO_PULL_NONE); 32 s3c_gpio_setpull(S3C2410_GPG(5), S3C_GPIO_PULL_NONE);
33 s3c_gpio_cfgpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE); 33 s3c_gpio_setpull(S3C2410_GPG(6), S3C_GPIO_PULL_NONE);
34 s3c_gpio_cfgpull(S3C2410_GPG(7), S3C_GPIO_PULL_NONE); 34 s3c_gpio_setpull(S3C2410_GPG(7), S3C_GPIO_PULL_NONE);
35 } 35 }
36} 36}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 11:09:22 -0500