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-rw-r--r--arch/arm/plat-s3c24xx/sleep.S25
1 files changed, 9 insertions, 16 deletions
diff --git a/arch/arm/plat-s3c24xx/sleep.S b/arch/arm/plat-s3c24xx/sleep.S
index ecb830be67d6..e73e3b6e88d2 100644
--- a/arch/arm/plat-s3c24xx/sleep.S
+++ b/arch/arm/plat-s3c24xx/sleep.S
@@ -43,20 +43,8 @@
43 43
44 /* s3c_cpu_save 44 /* s3c_cpu_save
45 * 45 *
46 * save enough of the CPU state to allow us to re-start
47 * pm.c code. as we store items like the sp/lr, we will
48 * end up returning from this function when the cpu resumes
49 * so the return value is set to mark this.
50 *
51 * This arangement means we avoid having to flush the cache
52 * from this code.
53 *
54 * entry: 46 * entry:
55 * r0 = pointer to save block 47 * r0 = save address (virtual addr of s3c_sleep_save_phys)
56 *
57 * exit:
58 * r0 = 0 => we stored everything
59 * 1 => resumed from sleep
60 */ 48 */
61 49
62ENTRY(s3c_cpu_save) 50ENTRY(s3c_cpu_save)
@@ -71,14 +59,19 @@ ENTRY(s3c_cpu_save)
71 59
72 stmia r0, { r4 - r13 } 60 stmia r0, { r4 - r13 }
73 61
74 mov r0, #0 62 @@ write our state back to RAM
75 ldmfd sp, { r4 - r12, pc } 63 bl s3c_pm_cb_flushcache
76 64
65 @@ jump to final code to send system to sleep
66 ldr r0, =pm_cpu_sleep
67 @@ldr pc, [ r0 ]
68 ldr r0, [ r0 ]
69 mov pc, r0
70
77 @@ return to the caller, after having the MMU 71 @@ return to the caller, after having the MMU
78 @@ turned on, this restores the last bits from the 72 @@ turned on, this restores the last bits from the
79 @@ stack 73 @@ stack
80resume_with_mmu: 74resume_with_mmu:
81 mov r0, #1
82 ldmfd sp!, { r4 - r12, pc } 75 ldmfd sp!, { r4 - r12, pc }
83 76
84 .ltorg 77 .ltorg