diff options
Diffstat (limited to 'arch/arm/plat-s3c24xx/pm.c')
-rw-r--r-- | arch/arm/plat-s3c24xx/pm.c | 503 |
1 files changed, 24 insertions, 479 deletions
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index 34ef18e5b2a1..062a29339a91 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c | |||
@@ -31,14 +31,9 @@ | |||
31 | #include <linux/errno.h> | 31 | #include <linux/errno.h> |
32 | #include <linux/time.h> | 32 | #include <linux/time.h> |
33 | #include <linux/interrupt.h> | 33 | #include <linux/interrupt.h> |
34 | #include <linux/crc32.h> | ||
35 | #include <linux/ioport.h> | ||
36 | #include <linux/serial_core.h> | 34 | #include <linux/serial_core.h> |
37 | #include <linux/io.h> | 35 | #include <linux/io.h> |
38 | 36 | ||
39 | #include <asm/cacheflush.h> | ||
40 | #include <mach/hardware.h> | ||
41 | |||
42 | #include <plat/regs-serial.h> | 37 | #include <plat/regs-serial.h> |
43 | #include <mach/regs-clock.h> | 38 | #include <mach/regs-clock.h> |
44 | #include <mach/regs-gpio.h> | 39 | #include <mach/regs-gpio.h> |
@@ -49,10 +44,6 @@ | |||
49 | 44 | ||
50 | #include <plat/pm.h> | 45 | #include <plat/pm.h> |
51 | 46 | ||
52 | /* for external use */ | ||
53 | |||
54 | unsigned long s3c_pm_flags; | ||
55 | |||
56 | #define PFX "s3c24xx-pm: " | 47 | #define PFX "s3c24xx-pm: " |
57 | 48 | ||
58 | static struct sleep_save core_save[] = { | 49 | static struct sleep_save core_save[] = { |
@@ -120,328 +111,14 @@ static struct sleep_save misc_save[] = { | |||
120 | SAVE_ITEM(S3C2410_DCLKCON), | 111 | SAVE_ITEM(S3C2410_DCLKCON), |
121 | }; | 112 | }; |
122 | 113 | ||
123 | #ifdef CONFIG_S3C2410_PM_DEBUG | ||
124 | |||
125 | #define SAVE_UART(va) \ | ||
126 | SAVE_ITEM((va) + S3C2410_ULCON), \ | ||
127 | SAVE_ITEM((va) + S3C2410_UCON), \ | ||
128 | SAVE_ITEM((va) + S3C2410_UFCON), \ | ||
129 | SAVE_ITEM((va) + S3C2410_UMCON), \ | ||
130 | SAVE_ITEM((va) + S3C2410_UBRDIV) | ||
131 | |||
132 | static struct sleep_save uart_save[] = { | ||
133 | SAVE_UART(S3C24XX_VA_UART0), | ||
134 | SAVE_UART(S3C24XX_VA_UART1), | ||
135 | #ifndef CONFIG_CPU_S3C2400 | ||
136 | SAVE_UART(S3C24XX_VA_UART2), | ||
137 | #endif | ||
138 | }; | ||
139 | |||
140 | /* debug | ||
141 | * | ||
142 | * we send the debug to printascii() to allow it to be seen if the | ||
143 | * system never wakes up from the sleep | ||
144 | */ | ||
145 | |||
146 | extern void printascii(const char *); | ||
147 | |||
148 | void pm_dbg(const char *fmt, ...) | ||
149 | { | ||
150 | va_list va; | ||
151 | char buff[256]; | ||
152 | |||
153 | va_start(va, fmt); | ||
154 | vsprintf(buff, fmt, va); | ||
155 | va_end(va); | ||
156 | |||
157 | printascii(buff); | ||
158 | } | ||
159 | |||
160 | static void s3c2410_pm_debug_init(void) | ||
161 | { | ||
162 | unsigned long tmp = __raw_readl(S3C2410_CLKCON); | ||
163 | |||
164 | /* re-start uart clocks */ | ||
165 | tmp |= S3C2410_CLKCON_UART0; | ||
166 | tmp |= S3C2410_CLKCON_UART1; | ||
167 | tmp |= S3C2410_CLKCON_UART2; | ||
168 | |||
169 | __raw_writel(tmp, S3C2410_CLKCON); | ||
170 | udelay(10); | ||
171 | } | ||
172 | |||
173 | #define DBG(fmt...) pm_dbg(fmt) | ||
174 | #else | ||
175 | #define DBG(fmt...) printk(KERN_DEBUG fmt) | ||
176 | |||
177 | #define s3c2410_pm_debug_init() do { } while(0) | ||
178 | |||
179 | static struct sleep_save uart_save[] = {}; | ||
180 | #endif | ||
181 | |||
182 | #if defined(CONFIG_S3C2410_PM_CHECK) && CONFIG_S3C2410_PM_CHECK_CHUNKSIZE != 0 | ||
183 | |||
184 | /* suspend checking code... | ||
185 | * | ||
186 | * this next area does a set of crc checks over all the installed | ||
187 | * memory, so the system can verify if the resume was ok. | ||
188 | * | ||
189 | * CONFIG_S3C2410_PM_CHECK_CHUNKSIZE defines the block-size for the CRC, | ||
190 | * increasing it will mean that the area corrupted will be less easy to spot, | ||
191 | * and reducing the size will cause the CRC save area to grow | ||
192 | */ | ||
193 | |||
194 | #define CHECK_CHUNKSIZE (CONFIG_S3C2410_PM_CHECK_CHUNKSIZE * 1024) | ||
195 | |||
196 | static u32 crc_size; /* size needed for the crc block */ | ||
197 | static u32 *crcs; /* allocated over suspend/resume */ | ||
198 | |||
199 | typedef u32 *(run_fn_t)(struct resource *ptr, u32 *arg); | ||
200 | |||
201 | /* s3c2410_pm_run_res | ||
202 | * | ||
203 | * go thorugh the given resource list, and look for system ram | ||
204 | */ | ||
205 | |||
206 | static void s3c2410_pm_run_res(struct resource *ptr, run_fn_t fn, u32 *arg) | ||
207 | { | ||
208 | while (ptr != NULL) { | ||
209 | if (ptr->child != NULL) | ||
210 | s3c2410_pm_run_res(ptr->child, fn, arg); | ||
211 | |||
212 | if ((ptr->flags & IORESOURCE_MEM) && | ||
213 | strcmp(ptr->name, "System RAM") == 0) { | ||
214 | DBG("Found system RAM at %08lx..%08lx\n", | ||
215 | ptr->start, ptr->end); | ||
216 | arg = (fn)(ptr, arg); | ||
217 | } | ||
218 | |||
219 | ptr = ptr->sibling; | ||
220 | } | ||
221 | } | ||
222 | |||
223 | static void s3c2410_pm_run_sysram(run_fn_t fn, u32 *arg) | ||
224 | { | ||
225 | s3c2410_pm_run_res(&iomem_resource, fn, arg); | ||
226 | } | ||
227 | |||
228 | static u32 *s3c2410_pm_countram(struct resource *res, u32 *val) | ||
229 | { | ||
230 | u32 size = (u32)(res->end - res->start)+1; | ||
231 | |||
232 | size += CHECK_CHUNKSIZE-1; | ||
233 | size /= CHECK_CHUNKSIZE; | ||
234 | |||
235 | DBG("Area %08lx..%08lx, %d blocks\n", res->start, res->end, size); | ||
236 | |||
237 | *val += size * sizeof(u32); | ||
238 | return val; | ||
239 | } | ||
240 | |||
241 | /* s3c2410_pm_prepare_check | ||
242 | * | ||
243 | * prepare the necessary information for creating the CRCs. This | ||
244 | * must be done before the final save, as it will require memory | ||
245 | * allocating, and thus touching bits of the kernel we do not | ||
246 | * know about. | ||
247 | */ | ||
248 | |||
249 | static void s3c2410_pm_check_prepare(void) | ||
250 | { | ||
251 | crc_size = 0; | ||
252 | |||
253 | s3c2410_pm_run_sysram(s3c2410_pm_countram, &crc_size); | ||
254 | |||
255 | DBG("s3c2410_pm_prepare_check: %u checks needed\n", crc_size); | ||
256 | |||
257 | crcs = kmalloc(crc_size+4, GFP_KERNEL); | ||
258 | if (crcs == NULL) | ||
259 | printk(KERN_ERR "Cannot allocated CRC save area\n"); | ||
260 | } | ||
261 | |||
262 | static u32 *s3c2410_pm_makecheck(struct resource *res, u32 *val) | ||
263 | { | ||
264 | unsigned long addr, left; | ||
265 | |||
266 | for (addr = res->start; addr < res->end; | ||
267 | addr += CHECK_CHUNKSIZE) { | ||
268 | left = res->end - addr; | ||
269 | |||
270 | if (left > CHECK_CHUNKSIZE) | ||
271 | left = CHECK_CHUNKSIZE; | ||
272 | |||
273 | *val = crc32_le(~0, phys_to_virt(addr), left); | ||
274 | val++; | ||
275 | } | ||
276 | |||
277 | return val; | ||
278 | } | ||
279 | |||
280 | /* s3c2410_pm_check_store | ||
281 | * | ||
282 | * compute the CRC values for the memory blocks before the final | ||
283 | * sleep. | ||
284 | */ | ||
285 | |||
286 | static void s3c2410_pm_check_store(void) | ||
287 | { | ||
288 | if (crcs != NULL) | ||
289 | s3c2410_pm_run_sysram(s3c2410_pm_makecheck, crcs); | ||
290 | } | ||
291 | |||
292 | /* in_region | ||
293 | * | ||
294 | * return TRUE if the area defined by ptr..ptr+size contatins the | ||
295 | * what..what+whatsz | ||
296 | */ | ||
297 | |||
298 | static inline int in_region(void *ptr, int size, void *what, size_t whatsz) | ||
299 | { | ||
300 | if ((what+whatsz) < ptr) | ||
301 | return 0; | ||
302 | |||
303 | if (what > (ptr+size)) | ||
304 | return 0; | ||
305 | |||
306 | return 1; | ||
307 | } | ||
308 | |||
309 | static u32 *s3c2410_pm_runcheck(struct resource *res, u32 *val) | ||
310 | { | ||
311 | void *save_at = phys_to_virt(s3c2410_sleep_save_phys); | ||
312 | unsigned long addr; | ||
313 | unsigned long left; | ||
314 | void *ptr; | ||
315 | u32 calc; | ||
316 | |||
317 | for (addr = res->start; addr < res->end; | ||
318 | addr += CHECK_CHUNKSIZE) { | ||
319 | left = res->end - addr; | ||
320 | |||
321 | if (left > CHECK_CHUNKSIZE) | ||
322 | left = CHECK_CHUNKSIZE; | ||
323 | |||
324 | ptr = phys_to_virt(addr); | ||
325 | |||
326 | if (in_region(ptr, left, crcs, crc_size)) { | ||
327 | DBG("skipping %08lx, has crc block in\n", addr); | ||
328 | goto skip_check; | ||
329 | } | ||
330 | |||
331 | if (in_region(ptr, left, save_at, 32*4 )) { | ||
332 | DBG("skipping %08lx, has save block in\n", addr); | ||
333 | goto skip_check; | ||
334 | } | ||
335 | |||
336 | /* calculate and check the checksum */ | ||
337 | |||
338 | calc = crc32_le(~0, ptr, left); | ||
339 | if (calc != *val) { | ||
340 | printk(KERN_ERR PFX "Restore CRC error at " | ||
341 | "%08lx (%08x vs %08x)\n", addr, calc, *val); | ||
342 | |||
343 | DBG("Restore CRC error at %08lx (%08x vs %08x)\n", | ||
344 | addr, calc, *val); | ||
345 | } | ||
346 | |||
347 | skip_check: | ||
348 | val++; | ||
349 | } | ||
350 | |||
351 | return val; | ||
352 | } | ||
353 | |||
354 | /* s3c2410_pm_check_restore | ||
355 | * | ||
356 | * check the CRCs after the restore event and free the memory used | ||
357 | * to hold them | ||
358 | */ | ||
359 | |||
360 | static void s3c2410_pm_check_restore(void) | ||
361 | { | ||
362 | if (crcs != NULL) { | ||
363 | s3c2410_pm_run_sysram(s3c2410_pm_runcheck, crcs); | ||
364 | kfree(crcs); | ||
365 | crcs = NULL; | ||
366 | } | ||
367 | } | ||
368 | |||
369 | #else | ||
370 | |||
371 | #define s3c2410_pm_check_prepare() do { } while(0) | ||
372 | #define s3c2410_pm_check_restore() do { } while(0) | ||
373 | #define s3c2410_pm_check_store() do { } while(0) | ||
374 | #endif | ||
375 | |||
376 | /* helper functions to save and restore register state */ | ||
377 | |||
378 | void s3c2410_pm_do_save(struct sleep_save *ptr, int count) | ||
379 | { | ||
380 | for (; count > 0; count--, ptr++) { | ||
381 | ptr->val = __raw_readl(ptr->reg); | ||
382 | DBG("saved %p value %08lx\n", ptr->reg, ptr->val); | ||
383 | } | ||
384 | } | ||
385 | |||
386 | /* s3c2410_pm_do_restore | ||
387 | * | ||
388 | * restore the system from the given list of saved registers | ||
389 | * | ||
390 | * Note, we do not use DBG() in here, as the system may not have | ||
391 | * restore the UARTs state yet | ||
392 | */ | ||
393 | |||
394 | void s3c2410_pm_do_restore(struct sleep_save *ptr, int count) | ||
395 | { | ||
396 | for (; count > 0; count--, ptr++) { | ||
397 | printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n", | ||
398 | ptr->reg, ptr->val, __raw_readl(ptr->reg)); | ||
399 | |||
400 | __raw_writel(ptr->val, ptr->reg); | ||
401 | } | ||
402 | } | ||
403 | |||
404 | /* s3c2410_pm_do_restore_core | ||
405 | * | ||
406 | * similar to s3c2410_pm_do_restore_core | ||
407 | * | ||
408 | * WARNING: Do not put any debug in here that may effect memory or use | ||
409 | * peripherals, as things may be changing! | ||
410 | */ | ||
411 | |||
412 | static void s3c2410_pm_do_restore_core(struct sleep_save *ptr, int count) | ||
413 | { | ||
414 | for (; count > 0; count--, ptr++) { | ||
415 | __raw_writel(ptr->val, ptr->reg); | ||
416 | } | ||
417 | } | ||
418 | 114 | ||
419 | /* s3c2410_pm_show_resume_irqs | 115 | /* s3c_pm_check_resume_pin |
420 | * | ||
421 | * print any IRQs asserted at resume time (ie, we woke from) | ||
422 | */ | ||
423 | |||
424 | static void s3c2410_pm_show_resume_irqs(int start, unsigned long which, | ||
425 | unsigned long mask) | ||
426 | { | ||
427 | int i; | ||
428 | |||
429 | which &= ~mask; | ||
430 | |||
431 | for (i = 0; i <= 31; i++) { | ||
432 | if ((which) & (1L<<i)) { | ||
433 | DBG("IRQ %d asserted at resume\n", start+i); | ||
434 | } | ||
435 | } | ||
436 | } | ||
437 | |||
438 | /* s3c2410_pm_check_resume_pin | ||
439 | * | 116 | * |
440 | * check to see if the pin is configured correctly for sleep mode, and | 117 | * check to see if the pin is configured correctly for sleep mode, and |
441 | * make any necessary adjustments if it is not | 118 | * make any necessary adjustments if it is not |
442 | */ | 119 | */ |
443 | 120 | ||
444 | static void s3c2410_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) | 121 | static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) |
445 | { | 122 | { |
446 | unsigned long irqstate; | 123 | unsigned long irqstate; |
447 | unsigned long pinstate; | 124 | unsigned long pinstate; |
@@ -456,21 +133,21 @@ static void s3c2410_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) | |||
456 | 133 | ||
457 | if (!irqstate) { | 134 | if (!irqstate) { |
458 | if (pinstate == S3C2410_GPIO_IRQ) | 135 | if (pinstate == S3C2410_GPIO_IRQ) |
459 | DBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); | 136 | S3C_PMDBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); |
460 | } else { | 137 | } else { |
461 | if (pinstate == S3C2410_GPIO_IRQ) { | 138 | if (pinstate == S3C2410_GPIO_IRQ) { |
462 | DBG("Disabling IRQ %d (pin %d)\n", irq, pin); | 139 | S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); |
463 | s3c2410_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); | 140 | s3c2410_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); |
464 | } | 141 | } |
465 | } | 142 | } |
466 | } | 143 | } |
467 | 144 | ||
468 | /* s3c2410_pm_configure_extint | 145 | /* s3c_pm_configure_extint |
469 | * | 146 | * |
470 | * configure all external interrupt pins | 147 | * configure all external interrupt pins |
471 | */ | 148 | */ |
472 | 149 | ||
473 | static void s3c2410_pm_configure_extint(void) | 150 | void s3c_pm_configure_extint(void) |
474 | { | 151 | { |
475 | int pin; | 152 | int pin; |
476 | 153 | ||
@@ -480,11 +157,11 @@ static void s3c2410_pm_configure_extint(void) | |||
480 | */ | 157 | */ |
481 | 158 | ||
482 | for (pin = S3C2410_GPF0; pin <= S3C2410_GPF7; pin++) { | 159 | for (pin = S3C2410_GPF0; pin <= S3C2410_GPF7; pin++) { |
483 | s3c2410_pm_check_resume_pin(pin, pin - S3C2410_GPF0); | 160 | s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF0); |
484 | } | 161 | } |
485 | 162 | ||
486 | for (pin = S3C2410_GPG0; pin <= S3C2410_GPG7; pin++) { | 163 | for (pin = S3C2410_GPG0; pin <= S3C2410_GPG7; pin++) { |
487 | s3c2410_pm_check_resume_pin(pin, (pin - S3C2410_GPG0)+8); | 164 | s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG0)+8); |
488 | } | 165 | } |
489 | } | 166 | } |
490 | 167 | ||
@@ -494,12 +171,12 @@ static void s3c2410_pm_configure_extint(void) | |||
494 | #define OFFS_DAT (S3C2410_GPADAT - S3C2410_GPACON) | 171 | #define OFFS_DAT (S3C2410_GPADAT - S3C2410_GPACON) |
495 | #define OFFS_UP (S3C2410_GPBUP - S3C2410_GPBCON) | 172 | #define OFFS_UP (S3C2410_GPBUP - S3C2410_GPBCON) |
496 | 173 | ||
497 | /* s3c2410_pm_save_gpios() | 174 | /* s3c_pm_save_gpios() |
498 | * | 175 | * |
499 | * Save the state of the GPIOs | 176 | * Save the state of the GPIOs |
500 | */ | 177 | */ |
501 | 178 | ||
502 | static void s3c2410_pm_save_gpios(void) | 179 | void s3c_pm_save_gpios(void) |
503 | { | 180 | { |
504 | struct gpio_sleep *gps = gpio_save; | 181 | struct gpio_sleep *gps = gpio_save; |
505 | unsigned int gpio; | 182 | unsigned int gpio; |
@@ -538,7 +215,10 @@ static inline int is_out(unsigned long con) | |||
538 | return con == 1; | 215 | return con == 1; |
539 | } | 216 | } |
540 | 217 | ||
541 | /* s3c2410_pm_restore_gpio() | 218 | /** |
219 | * s3c2410_pm_restore_gpio() - restore the given GPIO bank | ||
220 | * @index: The number of the GPIO bank being resumed. | ||
221 | * @gps: The sleep confgiuration for the bank. | ||
542 | * | 222 | * |
543 | * Restore one of the GPIO banks that was saved during suspend. This is | 223 | * Restore one of the GPIO banks that was saved during suspend. This is |
544 | * not as simple as once thought, due to the possibility of glitches | 224 | * not as simple as once thought, due to the possibility of glitches |
@@ -646,8 +326,8 @@ static void s3c2410_pm_restore_gpio(int index, struct gpio_sleep *gps) | |||
646 | __raw_writel(gps->gpup, base + OFFS_UP); | 326 | __raw_writel(gps->gpup, base + OFFS_UP); |
647 | } | 327 | } |
648 | 328 | ||
649 | DBG("GPIO[%d] CON %08lx => %08lx, DAT %08lx => %08lx\n", | 329 | S3C_PMDBG("GPIO[%d] CON %08lx => %08lx, DAT %08lx => %08lx\n", |
650 | index, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); | 330 | index, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); |
651 | } | 331 | } |
652 | 332 | ||
653 | 333 | ||
@@ -656,7 +336,7 @@ static void s3c2410_pm_restore_gpio(int index, struct gpio_sleep *gps) | |||
656 | * Restore the state of the GPIOs | 336 | * Restore the state of the GPIOs |
657 | */ | 337 | */ |
658 | 338 | ||
659 | static void s3c2410_pm_restore_gpios(void) | 339 | void s3c_pm_restore_gpios(void) |
660 | { | 340 | { |
661 | struct gpio_sleep *gps = gpio_save; | 341 | struct gpio_sleep *gps = gpio_save; |
662 | int gpio; | 342 | int gpio; |
@@ -666,150 +346,15 @@ static void s3c2410_pm_restore_gpios(void) | |||
666 | } | 346 | } |
667 | } | 347 | } |
668 | 348 | ||
669 | void (*pm_cpu_prep)(void); | 349 | void s3c_pm_restore_core(void) |
670 | void (*pm_cpu_sleep)(void); | ||
671 | |||
672 | #define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) | ||
673 | |||
674 | /* s3c2410_pm_enter | ||
675 | * | ||
676 | * central control for sleep/resume process | ||
677 | */ | ||
678 | |||
679 | static int s3c2410_pm_enter(suspend_state_t state) | ||
680 | { | 350 | { |
681 | unsigned long regs_save[16]; | 351 | s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); |
682 | 352 | s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); | |
683 | /* ensure the debug is initialised (if enabled) */ | ||
684 | |||
685 | s3c2410_pm_debug_init(); | ||
686 | |||
687 | DBG("s3c2410_pm_enter(%d)\n", state); | ||
688 | |||
689 | if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { | ||
690 | printk(KERN_ERR PFX "error: no cpu sleep functions set\n"); | ||
691 | return -EINVAL; | ||
692 | } | ||
693 | |||
694 | /* check if we have anything to wake-up with... bad things seem | ||
695 | * to happen if you suspend with no wakeup (system will often | ||
696 | * require a full power-cycle) | ||
697 | */ | ||
698 | |||
699 | if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && | ||
700 | !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { | ||
701 | printk(KERN_ERR PFX "No sources enabled for wake-up!\n"); | ||
702 | printk(KERN_ERR PFX "Aborting sleep\n"); | ||
703 | return -EINVAL; | ||
704 | } | ||
705 | |||
706 | /* prepare check area if configured */ | ||
707 | |||
708 | s3c2410_pm_check_prepare(); | ||
709 | |||
710 | /* store the physical address of the register recovery block */ | ||
711 | |||
712 | s3c2410_sleep_save_phys = virt_to_phys(regs_save); | ||
713 | |||
714 | DBG("s3c2410_sleep_save_phys=0x%08lx\n", s3c2410_sleep_save_phys); | ||
715 | |||
716 | /* save all necessary core registers not covered by the drivers */ | ||
717 | |||
718 | s3c2410_pm_save_gpios(); | ||
719 | s3c2410_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); | ||
720 | s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save)); | ||
721 | s3c2410_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); | ||
722 | |||
723 | /* set the irq configuration for wake */ | ||
724 | |||
725 | s3c2410_pm_configure_extint(); | ||
726 | |||
727 | DBG("sleep: irq wakeup masks: %08lx,%08lx\n", | ||
728 | s3c_irqwake_intmask, s3c_irqwake_eintmask); | ||
729 | |||
730 | __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK); | ||
731 | __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK); | ||
732 | |||
733 | /* ack any outstanding external interrupts before we go to sleep */ | ||
734 | |||
735 | __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND); | ||
736 | __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND); | ||
737 | __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND); | ||
738 | |||
739 | /* call cpu specific preparation */ | ||
740 | |||
741 | pm_cpu_prep(); | ||
742 | |||
743 | /* flush cache back to ram */ | ||
744 | |||
745 | flush_cache_all(); | ||
746 | |||
747 | s3c2410_pm_check_store(); | ||
748 | |||
749 | /* send the cpu to sleep... */ | ||
750 | |||
751 | __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ | ||
752 | |||
753 | /* s3c2410_cpu_save will also act as our return point from when | ||
754 | * we resume as it saves its own register state, so use the return | ||
755 | * code to differentiate return from save and return from sleep */ | ||
756 | |||
757 | if (s3c2410_cpu_save(regs_save) == 0) { | ||
758 | flush_cache_all(); | ||
759 | pm_cpu_sleep(); | ||
760 | } | ||
761 | |||
762 | /* restore the cpu state */ | ||
763 | |||
764 | cpu_init(); | ||
765 | |||
766 | /* restore the system state */ | ||
767 | |||
768 | s3c2410_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); | ||
769 | s3c2410_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); | ||
770 | s3c2410_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); | ||
771 | s3c2410_pm_restore_gpios(); | ||
772 | |||
773 | s3c2410_pm_debug_init(); | ||
774 | |||
775 | /* check what irq (if any) restored the system */ | ||
776 | |||
777 | DBG("post sleep: IRQs 0x%08x, 0x%08x\n", | ||
778 | __raw_readl(S3C2410_SRCPND), | ||
779 | __raw_readl(S3C2410_EINTPEND)); | ||
780 | |||
781 | s3c2410_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND), | ||
782 | s3c_irqwake_intmask); | ||
783 | |||
784 | s3c2410_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND), | ||
785 | s3c_irqwake_eintmask); | ||
786 | |||
787 | DBG("post sleep, preparing to return\n"); | ||
788 | |||
789 | s3c2410_pm_check_restore(); | ||
790 | |||
791 | /* ok, let's return from sleep */ | ||
792 | |||
793 | DBG("S3C2410 PM Resume (post-restore)\n"); | ||
794 | return 0; | ||
795 | } | 353 | } |
796 | 354 | ||
797 | static struct platform_suspend_ops s3c2410_pm_ops = { | 355 | void s3c_pm_save_core(void) |
798 | .enter = s3c2410_pm_enter, | ||
799 | .valid = suspend_valid_only_mem, | ||
800 | }; | ||
801 | |||
802 | /* s3c2410_pm_init | ||
803 | * | ||
804 | * Attach the power management functions. This should be called | ||
805 | * from the board specific initialisation if the board supports | ||
806 | * it. | ||
807 | */ | ||
808 | |||
809 | int __init s3c2410_pm_init(void) | ||
810 | { | 356 | { |
811 | printk("S3C2410 Power Management, (c) 2004 Simtec Electronics\n"); | 357 | s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); |
812 | 358 | s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); | |
813 | suspend_set_ops(&s3c2410_pm_ops); | ||
814 | return 0; | ||
815 | } | 359 | } |
360 | |||