diff options
Diffstat (limited to 'arch/arm/plat-s3c24xx/irq.c')
-rw-r--r-- | arch/arm/plat-s3c24xx/irq.c | 152 |
1 files changed, 1 insertions, 151 deletions
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index 0192ecdc1442..958737775ad2 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/irq.c | 1 | /* linux/arch/arm/plat-s3c24xx/irq.c |
2 | * | 2 | * |
3 | * Copyright (c) 2003,2004 Simtec Electronics | 3 | * Copyright (c) 2003,2004 Simtec Electronics |
4 | * Ben Dooks <ben@simtec.co.uk> | 4 | * Ben Dooks <ben@simtec.co.uk> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
@@ -16,38 +16,6 @@ | |||
16 | * You should have received a copy of the GNU General Public License | 16 | * You should have received a copy of the GNU General Public License |
17 | * along with this program; if not, write to the Free Software | 17 | * along with this program; if not, write to the Free Software |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | * | ||
20 | * Changelog: | ||
21 | * | ||
22 | * 22-Jul-2004 Ben Dooks <ben@simtec.co.uk> | ||
23 | * Fixed compile warnings | ||
24 | * | ||
25 | * 22-Jul-2004 Roc Wu <cooloney@yahoo.com.cn> | ||
26 | * Fixed s3c_extirq_type | ||
27 | * | ||
28 | * 21-Jul-2004 Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org> | ||
29 | * Addition of ADC/TC demux | ||
30 | * | ||
31 | * 04-Oct-2004 Klaus Fetscher <k.fetscher@fetron.de> | ||
32 | * Fix for set_irq_type() on low EINT numbers | ||
33 | * | ||
34 | * 05-Oct-2004 Ben Dooks <ben@simtec.co.uk> | ||
35 | * Tidy up KF's patch and sort out new release | ||
36 | * | ||
37 | * 05-Oct-2004 Ben Dooks <ben@simtec.co.uk> | ||
38 | * Add support for power management controls | ||
39 | * | ||
40 | * 04-Nov-2004 Ben Dooks | ||
41 | * Fix standard IRQ wake for EINT0..4 and RTC | ||
42 | * | ||
43 | * 22-Feb-2005 Ben Dooks | ||
44 | * Fixed edge-triggering on ADC IRQ | ||
45 | * | ||
46 | * 28-Jun-2005 Ben Dooks | ||
47 | * Mark IRQ_LCD valid | ||
48 | * | ||
49 | * 25-Jul-2005 Ben Dooks | ||
50 | * Split the S3C2440 IRQ code to separate file | ||
51 | */ | 19 | */ |
52 | 20 | ||
53 | #include <linux/init.h> | 21 | #include <linux/init.h> |
@@ -55,81 +23,16 @@ | |||
55 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
56 | #include <linux/ioport.h> | 24 | #include <linux/ioport.h> |
57 | #include <linux/sysdev.h> | 25 | #include <linux/sysdev.h> |
58 | #include <linux/io.h> | ||
59 | 26 | ||
60 | #include <mach/hardware.h> | ||
61 | #include <asm/irq.h> | 27 | #include <asm/irq.h> |
62 | |||
63 | #include <asm/mach/irq.h> | 28 | #include <asm/mach/irq.h> |
64 | 29 | ||
65 | #include <plat/regs-irqtype.h> | 30 | #include <plat/regs-irqtype.h> |
66 | #include <mach/regs-irq.h> | ||
67 | #include <mach/regs-gpio.h> | ||
68 | 31 | ||
69 | #include <plat/cpu.h> | 32 | #include <plat/cpu.h> |
70 | #include <plat/pm.h> | 33 | #include <plat/pm.h> |
71 | #include <plat/irq.h> | 34 | #include <plat/irq.h> |
72 | 35 | ||
73 | /* wakeup irq control */ | ||
74 | |||
75 | #ifdef CONFIG_PM | ||
76 | |||
77 | /* state for IRQs over sleep */ | ||
78 | |||
79 | /* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources | ||
80 | * | ||
81 | * set bit to 1 in allow bitfield to enable the wakeup settings on it | ||
82 | */ | ||
83 | |||
84 | unsigned long s3c_irqwake_intallow = 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL; | ||
85 | unsigned long s3c_irqwake_intmask = 0xffffffffL; | ||
86 | unsigned long s3c_irqwake_eintallow = 0x0000fff0L; | ||
87 | unsigned long s3c_irqwake_eintmask = 0xffffffffL; | ||
88 | |||
89 | int | ||
90 | s3c_irq_wake(unsigned int irqno, unsigned int state) | ||
91 | { | ||
92 | unsigned long irqbit = 1 << (irqno - IRQ_EINT0); | ||
93 | |||
94 | if (!(s3c_irqwake_intallow & irqbit)) | ||
95 | return -ENOENT; | ||
96 | |||
97 | printk(KERN_INFO "wake %s for irq %d\n", | ||
98 | state ? "enabled" : "disabled", irqno); | ||
99 | |||
100 | if (!state) | ||
101 | s3c_irqwake_intmask |= irqbit; | ||
102 | else | ||
103 | s3c_irqwake_intmask &= ~irqbit; | ||
104 | |||
105 | return 0; | ||
106 | } | ||
107 | |||
108 | static int | ||
109 | s3c_irqext_wake(unsigned int irqno, unsigned int state) | ||
110 | { | ||
111 | unsigned long bit = 1L << (irqno - EXTINT_OFF); | ||
112 | |||
113 | if (!(s3c_irqwake_eintallow & bit)) | ||
114 | return -ENOENT; | ||
115 | |||
116 | printk(KERN_INFO "wake %s for irq %d\n", | ||
117 | state ? "enabled" : "disabled", irqno); | ||
118 | |||
119 | if (!state) | ||
120 | s3c_irqwake_eintmask |= bit; | ||
121 | else | ||
122 | s3c_irqwake_eintmask &= ~bit; | ||
123 | |||
124 | return 0; | ||
125 | } | ||
126 | |||
127 | #else | ||
128 | #define s3c_irqext_wake NULL | ||
129 | #define s3c_irq_wake NULL | ||
130 | #endif | ||
131 | |||
132 | |||
133 | static void | 36 | static void |
134 | s3c_irq_mask(unsigned int irqno) | 37 | s3c_irq_mask(unsigned int irqno) |
135 | { | 38 | { |
@@ -590,59 +493,6 @@ s3c_irq_demux_extint4t7(unsigned int irq, | |||
590 | } | 493 | } |
591 | } | 494 | } |
592 | 495 | ||
593 | #ifdef CONFIG_PM | ||
594 | |||
595 | static struct sleep_save irq_save[] = { | ||
596 | SAVE_ITEM(S3C2410_INTMSK), | ||
597 | SAVE_ITEM(S3C2410_INTSUBMSK), | ||
598 | }; | ||
599 | |||
600 | /* the extint values move between the s3c2410/s3c2440 and the s3c2412 | ||
601 | * so we use an array to hold them, and to calculate the address of | ||
602 | * the register at run-time | ||
603 | */ | ||
604 | |||
605 | static unsigned long save_extint[3]; | ||
606 | static unsigned long save_eintflt[4]; | ||
607 | static unsigned long save_eintmask; | ||
608 | |||
609 | int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state) | ||
610 | { | ||
611 | unsigned int i; | ||
612 | |||
613 | for (i = 0; i < ARRAY_SIZE(save_extint); i++) | ||
614 | save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4)); | ||
615 | |||
616 | for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) | ||
617 | save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4)); | ||
618 | |||
619 | s3c2410_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); | ||
620 | save_eintmask = __raw_readl(S3C24XX_EINTMASK); | ||
621 | |||
622 | return 0; | ||
623 | } | ||
624 | |||
625 | int s3c24xx_irq_resume(struct sys_device *dev) | ||
626 | { | ||
627 | unsigned int i; | ||
628 | |||
629 | for (i = 0; i < ARRAY_SIZE(save_extint); i++) | ||
630 | __raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4)); | ||
631 | |||
632 | for (i = 0; i < ARRAY_SIZE(save_eintflt); i++) | ||
633 | __raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4)); | ||
634 | |||
635 | s3c2410_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); | ||
636 | __raw_writel(save_eintmask, S3C24XX_EINTMASK); | ||
637 | |||
638 | return 0; | ||
639 | } | ||
640 | |||
641 | #else | ||
642 | #define s3c24xx_irq_suspend NULL | ||
643 | #define s3c24xx_irq_resume NULL | ||
644 | #endif | ||
645 | |||
646 | /* s3c24xx_init_irq | 496 | /* s3c24xx_init_irq |
647 | * | 497 | * |
648 | * Initialise S3C2410 IRQ system | 498 | * Initialise S3C2410 IRQ system |