aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-s3c24xx/gpiolib.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/plat-s3c24xx/gpiolib.c')
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c50
1 files changed, 34 insertions, 16 deletions
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 5c0491bf738b..6d7a961d3269 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/module.h> 16#include <linux/module.h>
17#include <linux/interrupt.h> 17#include <linux/interrupt.h>
18#include <linux/sysdev.h>
18#include <linux/ioport.h> 19#include <linux/ioport.h>
19#include <linux/io.h> 20#include <linux/io.h>
20#include <linux/gpio.h> 21#include <linux/gpio.h>
@@ -22,6 +23,7 @@
22#include <mach/gpio-core.h> 23#include <mach/gpio-core.h>
23#include <mach/hardware.h> 24#include <mach/hardware.h>
24#include <asm/irq.h> 25#include <asm/irq.h>
26#include <plat/pm.h>
25 27
26#include <mach/regs-gpio.h> 28#include <mach/regs-gpio.h>
27 29
@@ -77,9 +79,10 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
77 79
78struct s3c_gpio_chip s3c24xx_gpios[] = { 80struct s3c_gpio_chip s3c24xx_gpios[] = {
79 [0] = { 81 [0] = {
80 .base = S3C24XX_GPIO_BASE(S3C2410_GPA0), 82 .base = S3C2410_GPACON,
83 .pm = __gpio_pm(&s3c_gpio_pm_1bit),
81 .chip = { 84 .chip = {
82 .base = S3C2410_GPA0, 85 .base = S3C2410_GPA(0),
83 .owner = THIS_MODULE, 86 .owner = THIS_MODULE,
84 .label = "GPIOA", 87 .label = "GPIOA",
85 .ngpio = 24, 88 .ngpio = 24,
@@ -88,45 +91,50 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
88 }, 91 },
89 }, 92 },
90 [1] = { 93 [1] = {
91 .base = S3C24XX_GPIO_BASE(S3C2410_GPB0), 94 .base = S3C2410_GPBCON,
95 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
92 .chip = { 96 .chip = {
93 .base = S3C2410_GPB0, 97 .base = S3C2410_GPB(0),
94 .owner = THIS_MODULE, 98 .owner = THIS_MODULE,
95 .label = "GPIOB", 99 .label = "GPIOB",
96 .ngpio = 16, 100 .ngpio = 16,
97 }, 101 },
98 }, 102 },
99 [2] = { 103 [2] = {
100 .base = S3C24XX_GPIO_BASE(S3C2410_GPC0), 104 .base = S3C2410_GPCCON,
105 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
101 .chip = { 106 .chip = {
102 .base = S3C2410_GPC0, 107 .base = S3C2410_GPC(0),
103 .owner = THIS_MODULE, 108 .owner = THIS_MODULE,
104 .label = "GPIOC", 109 .label = "GPIOC",
105 .ngpio = 16, 110 .ngpio = 16,
106 }, 111 },
107 }, 112 },
108 [3] = { 113 [3] = {
109 .base = S3C24XX_GPIO_BASE(S3C2410_GPD0), 114 .base = S3C2410_GPDCON,
115 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
110 .chip = { 116 .chip = {
111 .base = S3C2410_GPD0, 117 .base = S3C2410_GPD(0),
112 .owner = THIS_MODULE, 118 .owner = THIS_MODULE,
113 .label = "GPIOD", 119 .label = "GPIOD",
114 .ngpio = 16, 120 .ngpio = 16,
115 }, 121 },
116 }, 122 },
117 [4] = { 123 [4] = {
118 .base = S3C24XX_GPIO_BASE(S3C2410_GPE0), 124 .base = S3C2410_GPECON,
125 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
119 .chip = { 126 .chip = {
120 .base = S3C2410_GPE0, 127 .base = S3C2410_GPE(0),
121 .label = "GPIOE", 128 .label = "GPIOE",
122 .owner = THIS_MODULE, 129 .owner = THIS_MODULE,
123 .ngpio = 16, 130 .ngpio = 16,
124 }, 131 },
125 }, 132 },
126 [5] = { 133 [5] = {
127 .base = S3C24XX_GPIO_BASE(S3C2410_GPF0), 134 .base = S3C2410_GPFCON,
135 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
128 .chip = { 136 .chip = {
129 .base = S3C2410_GPF0, 137 .base = S3C2410_GPF(0),
130 .owner = THIS_MODULE, 138 .owner = THIS_MODULE,
131 .label = "GPIOF", 139 .label = "GPIOF",
132 .ngpio = 8, 140 .ngpio = 8,
@@ -134,14 +142,24 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
134 }, 142 },
135 }, 143 },
136 [6] = { 144 [6] = {
137 .base = S3C24XX_GPIO_BASE(S3C2410_GPG0), 145 .base = S3C2410_GPGCON,
146 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
138 .chip = { 147 .chip = {
139 .base = S3C2410_GPG0, 148 .base = S3C2410_GPG(0),
140 .owner = THIS_MODULE, 149 .owner = THIS_MODULE,
141 .label = "GPIOG", 150 .label = "GPIOG",
142 .ngpio = 10, 151 .ngpio = 16,
143 .to_irq = s3c24xx_gpiolib_bankg_toirq, 152 .to_irq = s3c24xx_gpiolib_bankg_toirq,
144 }, 153 },
154 }, {
155 .base = S3C2410_GPHCON,
156 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
157 .chip = {
158 .base = S3C2410_GPH(0),
159 .owner = THIS_MODULE,
160 .label = "GPIOH",
161 .ngpio = 11,
162 },
145 }, 163 },
146}; 164};
147 165
@@ -156,4 +174,4 @@ static __init int s3c24xx_gpiolib_init(void)
156 return 0; 174 return 0;
157} 175}
158 176
159arch_initcall(s3c24xx_gpiolib_init); 177core_initcall(s3c24xx_gpiolib_init);