diff options
Diffstat (limited to 'arch/arm/plat-s3c24xx/dma.c')
-rw-r--r-- | arch/arm/plat-s3c24xx/dma.c | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index ac9ff1666fcc..60f162dc4fad 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
@@ -130,8 +130,8 @@ dmadbg_showregs(const char *fname, int line, struct s3c2410_dma_chan *chan) | |||
130 | dmadbg_dumpregs(fname, line, chan, &state); | 130 | dmadbg_dumpregs(fname, line, chan, &state); |
131 | } | 131 | } |
132 | 132 | ||
133 | #define dbg_showregs(chan) dmadbg_showregs(__FUNCTION__, __LINE__, (chan)) | 133 | #define dbg_showregs(chan) dmadbg_showregs(__func__, __LINE__, (chan)) |
134 | #define dbg_showchan(chan) dmadbg_showchan(__FUNCTION__, __LINE__, (chan)) | 134 | #define dbg_showchan(chan) dmadbg_showchan(__func__, __LINE__, (chan)) |
135 | #else | 135 | #else |
136 | #define dbg_showregs(chan) do { } while(0) | 136 | #define dbg_showregs(chan) do { } while(0) |
137 | #define dbg_showchan(chan) do { } while(0) | 137 | #define dbg_showchan(chan) do { } while(0) |
@@ -403,7 +403,7 @@ static int s3c2410_dma_start(struct s3c2410_dma_chan *chan) | |||
403 | 403 | ||
404 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | 404 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { |
405 | pr_debug("%s: buff not yet loaded, no more todo\n", | 405 | pr_debug("%s: buff not yet loaded, no more todo\n", |
406 | __FUNCTION__); | 406 | __func__); |
407 | } else { | 407 | } else { |
408 | chan->load_state = S3C2410_DMALOAD_1RUNNING; | 408 | chan->load_state = S3C2410_DMALOAD_1RUNNING; |
409 | s3c2410_dma_loadbuffer(chan, chan->next); | 409 | s3c2410_dma_loadbuffer(chan, chan->next); |
@@ -463,16 +463,16 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, | |||
463 | return -EINVAL; | 463 | return -EINVAL; |
464 | 464 | ||
465 | pr_debug("%s: id=%p, data=%08x, size=%d\n", | 465 | pr_debug("%s: id=%p, data=%08x, size=%d\n", |
466 | __FUNCTION__, id, (unsigned int)data, size); | 466 | __func__, id, (unsigned int)data, size); |
467 | 467 | ||
468 | buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC); | 468 | buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC); |
469 | if (buf == NULL) { | 469 | if (buf == NULL) { |
470 | pr_debug("%s: out of memory (%ld alloc)\n", | 470 | pr_debug("%s: out of memory (%ld alloc)\n", |
471 | __FUNCTION__, (long)sizeof(*buf)); | 471 | __func__, (long)sizeof(*buf)); |
472 | return -ENOMEM; | 472 | return -ENOMEM; |
473 | } | 473 | } |
474 | 474 | ||
475 | //pr_debug("%s: new buffer %p\n", __FUNCTION__, buf); | 475 | //pr_debug("%s: new buffer %p\n", __func__, buf); |
476 | //dbg_showchan(chan); | 476 | //dbg_showchan(chan); |
477 | 477 | ||
478 | buf->next = NULL; | 478 | buf->next = NULL; |
@@ -486,18 +486,18 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, | |||
486 | if (chan->curr == NULL) { | 486 | if (chan->curr == NULL) { |
487 | /* we've got nothing loaded... */ | 487 | /* we've got nothing loaded... */ |
488 | pr_debug("%s: buffer %p queued onto empty channel\n", | 488 | pr_debug("%s: buffer %p queued onto empty channel\n", |
489 | __FUNCTION__, buf); | 489 | __func__, buf); |
490 | 490 | ||
491 | chan->curr = buf; | 491 | chan->curr = buf; |
492 | chan->end = buf; | 492 | chan->end = buf; |
493 | chan->next = NULL; | 493 | chan->next = NULL; |
494 | } else { | 494 | } else { |
495 | pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n", | 495 | pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n", |
496 | chan->number, __FUNCTION__, buf); | 496 | chan->number, __func__, buf); |
497 | 497 | ||
498 | if (chan->end == NULL) | 498 | if (chan->end == NULL) |
499 | pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n", | 499 | pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n", |
500 | chan->number, __FUNCTION__, chan); | 500 | chan->number, __func__, chan); |
501 | 501 | ||
502 | chan->end->next = buf; | 502 | chan->end->next = buf; |
503 | chan->end = buf; | 503 | chan->end = buf; |
@@ -572,7 +572,7 @@ s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan) | |||
572 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | 572 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { |
573 | /* flag error? */ | 573 | /* flag error? */ |
574 | printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", | 574 | printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", |
575 | chan->number, __FUNCTION__); | 575 | chan->number, __func__); |
576 | return; | 576 | return; |
577 | } | 577 | } |
578 | break; | 578 | break; |
@@ -658,7 +658,7 @@ s3c2410_dma_irq(int irq, void *devpw) | |||
658 | 658 | ||
659 | if (buf->magic != BUF_MAGIC) { | 659 | if (buf->magic != BUF_MAGIC) { |
660 | printk(KERN_ERR "dma%d: %s: buf %p incorrect magic\n", | 660 | printk(KERN_ERR "dma%d: %s: buf %p incorrect magic\n", |
661 | chan->number, __FUNCTION__, buf); | 661 | chan->number, __func__, buf); |
662 | return IRQ_HANDLED; | 662 | return IRQ_HANDLED; |
663 | } | 663 | } |
664 | 664 | ||
@@ -692,7 +692,7 @@ s3c2410_dma_irq(int irq, void *devpw) | |||
692 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | 692 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { |
693 | /* flag error? */ | 693 | /* flag error? */ |
694 | printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", | 694 | printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", |
695 | chan->number, __FUNCTION__); | 695 | chan->number, __func__); |
696 | return IRQ_HANDLED; | 696 | return IRQ_HANDLED; |
697 | } | 697 | } |
698 | 698 | ||
@@ -759,7 +759,7 @@ int s3c2410_dma_request(unsigned int channel, | |||
759 | 759 | ||
760 | if (!chan->irq_claimed) { | 760 | if (!chan->irq_claimed) { |
761 | pr_debug("dma%d: %s : requesting irq %d\n", | 761 | pr_debug("dma%d: %s : requesting irq %d\n", |
762 | channel, __FUNCTION__, chan->irq); | 762 | channel, __func__, chan->irq); |
763 | 763 | ||
764 | chan->irq_claimed = 1; | 764 | chan->irq_claimed = 1; |
765 | local_irq_restore(flags); | 765 | local_irq_restore(flags); |
@@ -786,7 +786,7 @@ int s3c2410_dma_request(unsigned int channel, | |||
786 | 786 | ||
787 | /* need to setup */ | 787 | /* need to setup */ |
788 | 788 | ||
789 | pr_debug("%s: channel initialised, %p\n", __FUNCTION__, chan); | 789 | pr_debug("%s: channel initialised, %p\n", __func__, chan); |
790 | 790 | ||
791 | return chan->number | DMACH_LOW_LEVEL; | 791 | return chan->number | DMACH_LOW_LEVEL; |
792 | } | 792 | } |
@@ -823,7 +823,7 @@ int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client) | |||
823 | 823 | ||
824 | if (chan->state != S3C2410_DMA_IDLE) { | 824 | if (chan->state != S3C2410_DMA_IDLE) { |
825 | pr_debug("%s: need to stop dma channel %p\n", | 825 | pr_debug("%s: need to stop dma channel %p\n", |
826 | __FUNCTION__, chan); | 826 | __func__, chan); |
827 | 827 | ||
828 | /* possibly flush the channel */ | 828 | /* possibly flush the channel */ |
829 | s3c2410_dma_ctrl(channel, S3C2410_DMAOP_STOP); | 829 | s3c2410_dma_ctrl(channel, S3C2410_DMAOP_STOP); |
@@ -852,7 +852,7 @@ static int s3c2410_dma_dostop(struct s3c2410_dma_chan *chan) | |||
852 | unsigned long flags; | 852 | unsigned long flags; |
853 | unsigned long tmp; | 853 | unsigned long tmp; |
854 | 854 | ||
855 | pr_debug("%s:\n", __FUNCTION__); | 855 | pr_debug("%s:\n", __func__); |
856 | 856 | ||
857 | dbg_showchan(chan); | 857 | dbg_showchan(chan); |
858 | 858 | ||
@@ -907,14 +907,14 @@ static int s3c2410_dma_flush(struct s3c2410_dma_chan *chan) | |||
907 | struct s3c2410_dma_buf *buf, *next; | 907 | struct s3c2410_dma_buf *buf, *next; |
908 | unsigned long flags; | 908 | unsigned long flags; |
909 | 909 | ||
910 | pr_debug("%s: chan %p (%d)\n", __FUNCTION__, chan, chan->number); | 910 | pr_debug("%s: chan %p (%d)\n", __func__, chan, chan->number); |
911 | 911 | ||
912 | dbg_showchan(chan); | 912 | dbg_showchan(chan); |
913 | 913 | ||
914 | local_irq_save(flags); | 914 | local_irq_save(flags); |
915 | 915 | ||
916 | if (chan->state != S3C2410_DMA_IDLE) { | 916 | if (chan->state != S3C2410_DMA_IDLE) { |
917 | pr_debug("%s: stopping channel...\n", __FUNCTION__ ); | 917 | pr_debug("%s: stopping channel...\n", __func__ ); |
918 | s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_STOP); | 918 | s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_STOP); |
919 | } | 919 | } |
920 | 920 | ||
@@ -929,7 +929,7 @@ static int s3c2410_dma_flush(struct s3c2410_dma_chan *chan) | |||
929 | next = buf->next; | 929 | next = buf->next; |
930 | 930 | ||
931 | pr_debug("%s: free buffer %p, next %p\n", | 931 | pr_debug("%s: free buffer %p, next %p\n", |
932 | __FUNCTION__, buf, buf->next); | 932 | __func__, buf, buf->next); |
933 | 933 | ||
934 | s3c2410_dma_buffdone(chan, buf, S3C2410_RES_ABORT); | 934 | s3c2410_dma_buffdone(chan, buf, S3C2410_RES_ABORT); |
935 | s3c2410_dma_freebuf(buf); | 935 | s3c2410_dma_freebuf(buf); |
@@ -976,7 +976,7 @@ static int s3c2410_dma_started(struct s3c2410_dma_chan *chan) | |||
976 | 976 | ||
977 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | 977 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { |
978 | pr_debug("%s: buff not yet loaded, no more todo\n", | 978 | pr_debug("%s: buff not yet loaded, no more todo\n", |
979 | __FUNCTION__); | 979 | __func__); |
980 | } else { | 980 | } else { |
981 | chan->load_state = S3C2410_DMALOAD_1RUNNING; | 981 | chan->load_state = S3C2410_DMALOAD_1RUNNING; |
982 | s3c2410_dma_loadbuffer(chan, chan->next); | 982 | s3c2410_dma_loadbuffer(chan, chan->next); |
@@ -1050,16 +1050,16 @@ int s3c2410_dma_config(dmach_t channel, | |||
1050 | struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); | 1050 | struct s3c2410_dma_chan *chan = lookup_dma_channel(channel); |
1051 | 1051 | ||
1052 | pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", | 1052 | pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", |
1053 | __FUNCTION__, channel, xferunit, dcon); | 1053 | __func__, channel, xferunit, dcon); |
1054 | 1054 | ||
1055 | if (chan == NULL) | 1055 | if (chan == NULL) |
1056 | return -EINVAL; | 1056 | return -EINVAL; |
1057 | 1057 | ||
1058 | pr_debug("%s: Initial dcon is %08x\n", __FUNCTION__, dcon); | 1058 | pr_debug("%s: Initial dcon is %08x\n", __func__, dcon); |
1059 | 1059 | ||
1060 | dcon |= chan->dcon & dma_sel.dcon_mask; | 1060 | dcon |= chan->dcon & dma_sel.dcon_mask; |
1061 | 1061 | ||
1062 | pr_debug("%s: New dcon is %08x\n", __FUNCTION__, dcon); | 1062 | pr_debug("%s: New dcon is %08x\n", __func__, dcon); |
1063 | 1063 | ||
1064 | switch (xferunit) { | 1064 | switch (xferunit) { |
1065 | case 1: | 1065 | case 1: |
@@ -1075,14 +1075,14 @@ int s3c2410_dma_config(dmach_t channel, | |||
1075 | break; | 1075 | break; |
1076 | 1076 | ||
1077 | default: | 1077 | default: |
1078 | pr_debug("%s: bad transfer size %d\n", __FUNCTION__, xferunit); | 1078 | pr_debug("%s: bad transfer size %d\n", __func__, xferunit); |
1079 | return -EINVAL; | 1079 | return -EINVAL; |
1080 | } | 1080 | } |
1081 | 1081 | ||
1082 | dcon |= S3C2410_DCON_HWTRIG; | 1082 | dcon |= S3C2410_DCON_HWTRIG; |
1083 | dcon |= S3C2410_DCON_INTREQ; | 1083 | dcon |= S3C2410_DCON_INTREQ; |
1084 | 1084 | ||
1085 | pr_debug("%s: dcon now %08x\n", __FUNCTION__, dcon); | 1085 | pr_debug("%s: dcon now %08x\n", __func__, dcon); |
1086 | 1086 | ||
1087 | chan->dcon = dcon; | 1087 | chan->dcon = dcon; |
1088 | chan->xfer_unit = xferunit; | 1088 | chan->xfer_unit = xferunit; |
@@ -1099,7 +1099,7 @@ int s3c2410_dma_setflags(dmach_t channel, unsigned int flags) | |||
1099 | if (chan == NULL) | 1099 | if (chan == NULL) |
1100 | return -EINVAL; | 1100 | return -EINVAL; |
1101 | 1101 | ||
1102 | pr_debug("%s: chan=%p, flags=%08x\n", __FUNCTION__, chan, flags); | 1102 | pr_debug("%s: chan=%p, flags=%08x\n", __func__, chan, flags); |
1103 | 1103 | ||
1104 | chan->flags = flags; | 1104 | chan->flags = flags; |
1105 | 1105 | ||
@@ -1120,7 +1120,7 @@ int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn) | |||
1120 | if (chan == NULL) | 1120 | if (chan == NULL) |
1121 | return -EINVAL; | 1121 | return -EINVAL; |
1122 | 1122 | ||
1123 | pr_debug("%s: chan=%p, op rtn=%p\n", __FUNCTION__, chan, rtn); | 1123 | pr_debug("%s: chan=%p, op rtn=%p\n", __func__, chan, rtn); |
1124 | 1124 | ||
1125 | chan->op_fn = rtn; | 1125 | chan->op_fn = rtn; |
1126 | 1126 | ||
@@ -1136,7 +1136,7 @@ int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn) | |||
1136 | if (chan == NULL) | 1136 | if (chan == NULL) |
1137 | return -EINVAL; | 1137 | return -EINVAL; |
1138 | 1138 | ||
1139 | pr_debug("%s: chan=%p, callback rtn=%p\n", __FUNCTION__, chan, rtn); | 1139 | pr_debug("%s: chan=%p, callback rtn=%p\n", __func__, chan, rtn); |
1140 | 1140 | ||
1141 | chan->callback_fn = rtn; | 1141 | chan->callback_fn = rtn; |
1142 | 1142 | ||
@@ -1170,7 +1170,7 @@ int s3c2410_dma_devconfig(int channel, | |||
1170 | return -EINVAL; | 1170 | return -EINVAL; |
1171 | 1171 | ||
1172 | pr_debug("%s: source=%d, hwcfg=%08x, devaddr=%08lx\n", | 1172 | pr_debug("%s: source=%d, hwcfg=%08x, devaddr=%08lx\n", |
1173 | __FUNCTION__, (int)source, hwcfg, devaddr); | 1173 | __func__, (int)source, hwcfg, devaddr); |
1174 | 1174 | ||
1175 | chan->source = source; | 1175 | chan->source = source; |
1176 | chan->dev_addr = devaddr; | 1176 | chan->dev_addr = devaddr; |
@@ -1180,7 +1180,7 @@ int s3c2410_dma_devconfig(int channel, | |||
1180 | case S3C2410_DMASRC_HW: | 1180 | case S3C2410_DMASRC_HW: |
1181 | /* source is hardware */ | 1181 | /* source is hardware */ |
1182 | pr_debug("%s: hw source, devaddr=%08lx, hwcfg=%d\n", | 1182 | pr_debug("%s: hw source, devaddr=%08lx, hwcfg=%d\n", |
1183 | __FUNCTION__, devaddr, hwcfg); | 1183 | __func__, devaddr, hwcfg); |
1184 | dma_wrreg(chan, S3C2410_DMA_DISRCC, hwcfg & 3); | 1184 | dma_wrreg(chan, S3C2410_DMA_DISRCC, hwcfg & 3); |
1185 | dma_wrreg(chan, S3C2410_DMA_DISRC, devaddr); | 1185 | dma_wrreg(chan, S3C2410_DMA_DISRC, devaddr); |
1186 | dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0)); | 1186 | dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0)); |
@@ -1190,8 +1190,8 @@ int s3c2410_dma_devconfig(int channel, | |||
1190 | 1190 | ||
1191 | case S3C2410_DMASRC_MEM: | 1191 | case S3C2410_DMASRC_MEM: |
1192 | /* source is memory */ | 1192 | /* source is memory */ |
1193 | pr_debug( "%s: mem source, devaddr=%08lx, hwcfg=%d\n", | 1193 | pr_debug("%s: mem source, devaddr=%08lx, hwcfg=%d\n", |
1194 | __FUNCTION__, devaddr, hwcfg); | 1194 | __func__, devaddr, hwcfg); |
1195 | dma_wrreg(chan, S3C2410_DMA_DISRCC, (0<<1) | (0<<0)); | 1195 | dma_wrreg(chan, S3C2410_DMA_DISRCC, (0<<1) | (0<<0)); |
1196 | dma_wrreg(chan, S3C2410_DMA_DIDST, devaddr); | 1196 | dma_wrreg(chan, S3C2410_DMA_DIDST, devaddr); |
1197 | dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3); | 1197 | dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3); |