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-rw-r--r--arch/arm/plat-s3c24xx/cpu.c23
1 files changed, 0 insertions, 23 deletions
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c
index 3c6335307fb1..1121df13e15f 100644
--- a/arch/arm/plat-s3c24xx/cpu.c
+++ b/arch/arm/plat-s3c24xx/cpu.c
@@ -192,27 +192,6 @@ static unsigned long s3c24xx_read_idcode_v4(void)
192 return __raw_readl(S3C2410_GSTATUS1); 192 return __raw_readl(S3C2410_GSTATUS1);
193} 193}
194 194
195/* Hook for arm_pm_restart to ensure we execute the reset code
196 * with the caches enabled. It seems at least the S3C2440 has a problem
197 * resetting if there is bus activity interrupted by the reset.
198 */
199static void s3c24xx_pm_restart(char mode, const char *cmd)
200{
201 if (mode != 's') {
202 unsigned long flags;
203
204 local_irq_save(flags);
205 __cpuc_flush_kern_all();
206 __cpuc_flush_user_all();
207
208 arch_reset(mode, cmd);
209 local_irq_restore(flags);
210 }
211
212 /* fallback, or unhandled */
213 arm_machine_restart(mode, cmd);
214}
215
216void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) 195void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
217{ 196{
218 /* initialise the io descriptors we need for initialisation */ 197 /* initialise the io descriptors we need for initialisation */
@@ -226,7 +205,5 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
226 } 205 }
227 s3c24xx_init_cpu(); 206 s3c24xx_init_cpu();
228 207
229 arm_pm_restart = s3c24xx_pm_restart;
230
231 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 208 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
232} 209}