diff options
Diffstat (limited to 'arch/arm/plat-s3c/pm.c')
-rw-r--r-- | arch/arm/plat-s3c/pm.c | 211 |
1 files changed, 211 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-s3c/pm.c index 122e9b91a7f4..fea58bea973d 100644 --- a/arch/arm/plat-s3c/pm.c +++ b/arch/arm/plat-s3c/pm.c | |||
@@ -15,14 +15,32 @@ | |||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/suspend.h> | 16 | #include <linux/suspend.h> |
17 | #include <linux/errno.h> | 17 | #include <linux/errno.h> |
18 | #include <linux/delay.h> | ||
19 | #include <linux/serial_core.h> | ||
18 | #include <linux/io.h> | 20 | #include <linux/io.h> |
19 | 21 | ||
22 | #include <asm/cacheflush.h> | ||
23 | #include <mach/hardware.h> | ||
24 | |||
25 | #include <plat/regs-serial.h> | ||
26 | #include <mach/regs-clock.h> | ||
27 | #include <mach/regs-gpio.h> | ||
28 | #include <mach/regs-mem.h> | ||
29 | #include <mach/regs-irq.h> | ||
30 | |||
20 | #include <plat/pm.h> | 31 | #include <plat/pm.h> |
32 | #include <plat/pm-core.h> | ||
21 | 33 | ||
22 | /* for external use */ | 34 | /* for external use */ |
23 | 35 | ||
24 | unsigned long s3c_pm_flags; | 36 | unsigned long s3c_pm_flags; |
25 | 37 | ||
38 | /* Debug code: | ||
39 | * | ||
40 | * This code supports debug output to the low level UARTs for use on | ||
41 | * resume before the console layer is available. | ||
42 | */ | ||
43 | |||
26 | #ifdef CONFIG_S3C2410_PM_DEBUG | 44 | #ifdef CONFIG_S3C2410_PM_DEBUG |
27 | extern void printascii(const char *); | 45 | extern void printascii(const char *); |
28 | 46 | ||
@@ -37,8 +55,51 @@ void s3c_pm_dbg(const char *fmt, ...) | |||
37 | 55 | ||
38 | printascii(buff); | 56 | printascii(buff); |
39 | } | 57 | } |
58 | |||
59 | static inline void s3c_pm_debug_init(void) | ||
60 | { | ||
61 | /* restart uart clocks so we can use them to output */ | ||
62 | s3c_pm_debug_init_uart(); | ||
63 | } | ||
64 | |||
65 | #else | ||
66 | #define s3c_pm_debug_init() do { } while(0) | ||
67 | |||
40 | #endif /* CONFIG_S3C2410_PM_DEBUG */ | 68 | #endif /* CONFIG_S3C2410_PM_DEBUG */ |
41 | 69 | ||
70 | /* Save the UART configurations if we are configured for debug. */ | ||
71 | |||
72 | #ifdef CONFIG_S3C2410_PM_DEBUG | ||
73 | |||
74 | #define SAVE_UART(va) \ | ||
75 | SAVE_ITEM((va) + S3C2410_ULCON), \ | ||
76 | SAVE_ITEM((va) + S3C2410_UCON), \ | ||
77 | SAVE_ITEM((va) + S3C2410_UFCON), \ | ||
78 | SAVE_ITEM((va) + S3C2410_UMCON), \ | ||
79 | SAVE_ITEM((va) + S3C2410_UBRDIV) | ||
80 | |||
81 | static struct sleep_save uart_save[] = { | ||
82 | SAVE_UART(S3C_VA_UART0), | ||
83 | SAVE_UART(S3C_VA_UART1), | ||
84 | #ifndef CONFIG_CPU_S3C2400 | ||
85 | SAVE_UART(S3C_VA_UART2), | ||
86 | #endif | ||
87 | }; | ||
88 | |||
89 | static void s3c_pm_save_uart(void) | ||
90 | { | ||
91 | s3c_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); | ||
92 | } | ||
93 | |||
94 | static void s3c_pm_restore_uart(void) | ||
95 | { | ||
96 | s3c_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); | ||
97 | } | ||
98 | #else | ||
99 | static void s3c_pm_save_uart(void) { } | ||
100 | static void s3c_pm_restore_uart(void) { } | ||
101 | #endif | ||
102 | |||
42 | 103 | ||
43 | /* helper functions to save and restore register state */ | 104 | /* helper functions to save and restore register state */ |
44 | 105 | ||
@@ -95,3 +156,153 @@ void s3c_pm_do_restore_core(struct sleep_save *ptr, int count) | |||
95 | for (; count > 0; count--, ptr++) | 156 | for (; count > 0; count--, ptr++) |
96 | __raw_writel(ptr->val, ptr->reg); | 157 | __raw_writel(ptr->val, ptr->reg); |
97 | } | 158 | } |
159 | |||
160 | /* s3c2410_pm_show_resume_irqs | ||
161 | * | ||
162 | * print any IRQs asserted at resume time (ie, we woke from) | ||
163 | */ | ||
164 | static void s3c_pm_show_resume_irqs(int start, unsigned long which, | ||
165 | unsigned long mask) | ||
166 | { | ||
167 | int i; | ||
168 | |||
169 | which &= ~mask; | ||
170 | |||
171 | for (i = 0; i <= 31; i++) { | ||
172 | if (which & (1L<<i)) { | ||
173 | S3C_PMDBG("IRQ %d asserted at resume\n", start+i); | ||
174 | } | ||
175 | } | ||
176 | } | ||
177 | |||
178 | |||
179 | void (*pm_cpu_prep)(void); | ||
180 | void (*pm_cpu_sleep)(void); | ||
181 | |||
182 | #define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) | ||
183 | |||
184 | /* s3c_pm_enter | ||
185 | * | ||
186 | * central control for sleep/resume process | ||
187 | */ | ||
188 | |||
189 | static int s3c_pm_enter(suspend_state_t state) | ||
190 | { | ||
191 | unsigned long regs_save[16]; | ||
192 | |||
193 | /* ensure the debug is initialised (if enabled) */ | ||
194 | |||
195 | s3c_pm_debug_init(); | ||
196 | |||
197 | S3C_PMDBG("%s(%d)\n", __func__, state); | ||
198 | |||
199 | if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { | ||
200 | printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__); | ||
201 | return -EINVAL; | ||
202 | } | ||
203 | |||
204 | /* check if we have anything to wake-up with... bad things seem | ||
205 | * to happen if you suspend with no wakeup (system will often | ||
206 | * require a full power-cycle) | ||
207 | */ | ||
208 | |||
209 | if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && | ||
210 | !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { | ||
211 | printk(KERN_ERR "%s: No wake-up sources!\n", __func__); | ||
212 | printk(KERN_ERR "%s: Aborting sleep\n", __func__); | ||
213 | return -EINVAL; | ||
214 | } | ||
215 | |||
216 | /* prepare check area if configured */ | ||
217 | |||
218 | s3c_pm_check_prepare(); | ||
219 | |||
220 | /* store the physical address of the register recovery block */ | ||
221 | |||
222 | s3c_sleep_save_phys = virt_to_phys(regs_save); | ||
223 | |||
224 | S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys); | ||
225 | |||
226 | /* save all necessary core registers not covered by the drivers */ | ||
227 | |||
228 | s3c_pm_save_gpios(); | ||
229 | s3c_pm_save_uart(); | ||
230 | s3c_pm_save_core(); | ||
231 | |||
232 | /* set the irq configuration for wake */ | ||
233 | |||
234 | s3c_pm_configure_extint(); | ||
235 | |||
236 | S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n", | ||
237 | s3c_irqwake_intmask, s3c_irqwake_eintmask); | ||
238 | |||
239 | s3c_pm_arch_prepare_irqs(); | ||
240 | |||
241 | /* call cpu specific preparation */ | ||
242 | |||
243 | pm_cpu_prep(); | ||
244 | |||
245 | /* flush cache back to ram */ | ||
246 | |||
247 | flush_cache_all(); | ||
248 | |||
249 | s3c_pm_check_store(); | ||
250 | |||
251 | /* send the cpu to sleep... */ | ||
252 | |||
253 | s3c_pm_arch_stop_clocks(); | ||
254 | |||
255 | /* s3c2410_cpu_save will also act as our return point from when | ||
256 | * we resume as it saves its own register state, so use the return | ||
257 | * code to differentiate return from save and return from sleep */ | ||
258 | |||
259 | if (s3c2410_cpu_save(regs_save) == 0) { | ||
260 | flush_cache_all(); | ||
261 | pm_cpu_sleep(); | ||
262 | } | ||
263 | |||
264 | /* restore the cpu state using the kernel's cpu init code. */ | ||
265 | |||
266 | cpu_init(); | ||
267 | |||
268 | /* restore the system state */ | ||
269 | |||
270 | s3c_pm_restore_core(); | ||
271 | s3c_pm_restore_uart(); | ||
272 | s3c_pm_restore_gpios(); | ||
273 | |||
274 | s3c_pm_debug_init(); | ||
275 | |||
276 | /* check what irq (if any) restored the system */ | ||
277 | |||
278 | s3c_pm_arch_show_resume_irqs(); | ||
279 | |||
280 | S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); | ||
281 | |||
282 | s3c_pm_check_restore(); | ||
283 | |||
284 | /* ok, let's return from sleep */ | ||
285 | |||
286 | S3C_PMDBG("S3C PM Resume (post-restore)\n"); | ||
287 | return 0; | ||
288 | } | ||
289 | |||
290 | static struct platform_suspend_ops s3c_pm_ops = { | ||
291 | .enter = s3c_pm_enter, | ||
292 | .valid = suspend_valid_only_mem, | ||
293 | }; | ||
294 | |||
295 | /* s3c2410_pm_init | ||
296 | * | ||
297 | * Attach the power management functions. This should be called | ||
298 | * from the board specific initialisation if the board supports | ||
299 | * it. | ||
300 | */ | ||
301 | |||
302 | int __init s3c2410_pm_init(void) | ||
303 | { | ||
304 | printk("S3C Power Management, Copyright 2004 Simtec Electronics\n"); | ||
305 | |||
306 | suspend_set_ops(&s3c_pm_ops); | ||
307 | return 0; | ||
308 | } | ||