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-rw-r--r--arch/arm/plat-pxa/include/plat/pxa27x_keypad.h73
-rw-r--r--arch/arm/plat-pxa/include/plat/pxa3xx_nand.h79
2 files changed, 0 insertions, 152 deletions
diff --git a/arch/arm/plat-pxa/include/plat/pxa27x_keypad.h b/arch/arm/plat-pxa/include/plat/pxa27x_keypad.h
deleted file mode 100644
index 5ce8d5e6ea51..000000000000
--- a/arch/arm/plat-pxa/include/plat/pxa27x_keypad.h
+++ /dev/null
@@ -1,73 +0,0 @@
1#ifndef __ASM_ARCH_PXA27x_KEYPAD_H
2#define __ASM_ARCH_PXA27x_KEYPAD_H
3
4#include <linux/input.h>
5#include <linux/input/matrix_keypad.h>
6
7#define MAX_MATRIX_KEY_ROWS (8)
8#define MAX_MATRIX_KEY_COLS (8)
9#define MATRIX_ROW_SHIFT (3)
10#define MAX_DIRECT_KEY_NUM (8)
11
12/* pxa3xx keypad platform specific parameters
13 *
14 * NOTE:
15 * 1. direct_key_num indicates the number of keys in the direct keypad
16 * _plus_ the number of rotary-encoder sensor inputs, this can be
17 * left as 0 if only rotary encoders are enabled, the driver will
18 * automatically calculate this
19 *
20 * 2. direct_key_map is the key code map for the direct keys, if rotary
21 * encoder(s) are enabled, direct key 0/1(2/3) will be ignored
22 *
23 * 3. rotary can be either interpreted as a relative input event (e.g.
24 * REL_WHEEL/REL_HWHEEL) or specific keys (e.g. UP/DOWN/LEFT/RIGHT)
25 *
26 * 4. matrix key and direct key will use the same debounce_interval by
27 * default, which should be sufficient in most cases
28 *
29 * pxa168 keypad platform specific parameter
30 *
31 * NOTE:
32 * clear_wakeup_event callback is a workaround required to clear the
33 * keypad interrupt. The keypad wake must be cleared in addition to
34 * reading the MI/DI bits in the KPC register.
35 */
36struct pxa27x_keypad_platform_data {
37
38 /* code map for the matrix keys */
39 unsigned int matrix_key_rows;
40 unsigned int matrix_key_cols;
41 unsigned int *matrix_key_map;
42 int matrix_key_map_size;
43
44 /* direct keys */
45 int direct_key_num;
46 unsigned int direct_key_map[MAX_DIRECT_KEY_NUM];
47 /* the key output may be low active */
48 int direct_key_low_active;
49 /* give board a chance to choose the start direct key */
50 unsigned int direct_key_mask;
51
52 /* rotary encoders 0 */
53 int enable_rotary0;
54 int rotary0_rel_code;
55 int rotary0_up_key;
56 int rotary0_down_key;
57
58 /* rotary encoders 1 */
59 int enable_rotary1;
60 int rotary1_rel_code;
61 int rotary1_up_key;
62 int rotary1_down_key;
63
64 /* key debounce interval */
65 unsigned int debounce_interval;
66
67 /* clear wakeup event requirement for pxa168 */
68 void (*clear_wakeup_event)(void);
69};
70
71extern void pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info);
72
73#endif /* __ASM_ARCH_PXA27x_KEYPAD_H */
diff --git a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
deleted file mode 100644
index c42f39f20195..000000000000
--- a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
+++ /dev/null
@@ -1,79 +0,0 @@
1#ifndef __ASM_ARCH_PXA3XX_NAND_H
2#define __ASM_ARCH_PXA3XX_NAND_H
3
4#include <linux/mtd/mtd.h>
5#include <linux/mtd/partitions.h>
6
7struct pxa3xx_nand_timing {
8 unsigned int tCH; /* Enable signal hold time */
9 unsigned int tCS; /* Enable signal setup time */
10 unsigned int tWH; /* ND_nWE high duration */
11 unsigned int tWP; /* ND_nWE pulse time */
12 unsigned int tRH; /* ND_nRE high duration */
13 unsigned int tRP; /* ND_nRE pulse width */
14 unsigned int tR; /* ND_nWE high to ND_nRE low for read */
15 unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */
16 unsigned int tAR; /* ND_ALE low to ND_nRE low delay */
17};
18
19struct pxa3xx_nand_cmdset {
20 uint16_t read1;
21 uint16_t read2;
22 uint16_t program;
23 uint16_t read_status;
24 uint16_t read_id;
25 uint16_t erase;
26 uint16_t reset;
27 uint16_t lock;
28 uint16_t unlock;
29 uint16_t lock_status;
30};
31
32struct pxa3xx_nand_flash {
33 char *name;
34 uint32_t chip_id;
35 unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */
36 unsigned int page_size; /* Page size in bytes (PAGE_SZ) */
37 unsigned int flash_width; /* Width of Flash memory (DWIDTH_M) */
38 unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */
39 unsigned int num_blocks; /* Number of physical blocks in Flash */
40
41 struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
42};
43
44/*
45 * Current pxa3xx_nand controller has two chip select which
46 * both be workable.
47 *
48 * Notice should be taken that:
49 * When you want to use this feature, you should not enable the
50 * keep configuration feature, for two chip select could be
51 * attached with different nand chip. The different page size
52 * and timing requirement make the keep configuration impossible.
53 */
54
55/* The max num of chip select current support */
56#define NUM_CHIP_SELECT (2)
57struct pxa3xx_nand_platform_data {
58
59 /* the data flash bus is shared between the Static Memory
60 * Controller and the Data Flash Controller, the arbiter
61 * controls the ownership of the bus
62 */
63 int enable_arbiter;
64
65 /* allow platform code to keep OBM/bootloader defined NFC config */
66 int keep_config;
67
68 /* indicate how many chip selects will be used */
69 int num_cs;
70
71 const struct mtd_partition *parts[NUM_CHIP_SELECT];
72 unsigned int nr_parts[NUM_CHIP_SELECT];
73
74 const struct pxa3xx_nand_flash * flash;
75 size_t num_flash;
76};
77
78extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
79#endif /* __ASM_ARCH_PXA3XX_NAND_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-04 21:55:27 -0500