3 files changed, 11 insertions, 4 deletions

diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index c5b669d234bc..fe66a1835169 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -36,8 +36,8 @@ static void orion_irq_unmask(u32 irq)
 
 static struct irq_chip orion_irq_chip = {
         .name           = "orion_irq",
-        .ack            = orion_irq_mask,
         .mask           = orion_irq_mask,
+        .mask_ack       = orion_irq_mask,
         .unmask         = orion_irq_unmask,
 };
 
@@ -59,6 +59,7 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
                 set_irq_chip(irq, &orion_irq_chip);
                 set_irq_chip_data(irq, maskaddr);
                 set_irq_handler(irq, handle_level_irq);
+                irq_desc[irq].status |= IRQ_LEVEL;
                 set_irq_flags(irq, IRQF_VALID);
         }
 }
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index abfda53f1800..ca32c60e14d7 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -39,6 +39,7 @@
 #define PCIE_CONF_DATA_OFF      0x18fc
 #define PCIE_MASK_OFF           0x1910
 #define PCIE_CTRL_OFF           0x1a00
+#define  PCIE_CTRL_X1_MODE              0x0001
 #define PCIE_STAT_OFF           0x1a04
 #define  PCIE_STAT_DEV_OFFS             20
 #define  PCIE_STAT_DEV_MASK             0x1f
@@ -62,6 +63,11 @@ int orion_pcie_link_up(void __iomem *base)
         return !(readl(base + PCIE_STAT_OFF) & PCIE_STAT_LINK_DOWN);
 }
 
+int __init orion_pcie_x4_mode(void __iomem *base)
+{
+        return !(readl(base + PCIE_CTRL_OFF) & PCIE_CTRL_X1_MODE);
+}
+
 int orion_pcie_get_local_bus_nr(void __iomem *base)
 {
         u32 stat = readl(base + PCIE_STAT_OFF);
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index 28b5285446e8..93c4ef9f0067 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -74,7 +74,7 @@ orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev)
         /*
          * Clear and enable clockevent timer interrupt.
          */
-        writel(~BRIDGE_INT_TIMER1, BRIDGE_CAUSE);
+        writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
 
         u = readl(BRIDGE_MASK);
         u |= BRIDGE_INT_TIMER1;
@@ -138,7 +138,7 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
                 /*
                  * ACK pending timer interrupt.
                  */
-                writel(~BRIDGE_INT_TIMER1, BRIDGE_CAUSE);
+                writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
 
         }
         local_irq_restore(flags);
@@ -159,7 +159,7 @@ static irqreturn_t orion_timer_interrupt(int irq, void *dev_id)
         /*
          * ACK timer interrupt and call event handler.
          */
-        writel(~BRIDGE_INT_TIMER1, BRIDGE_CAUSE);
+        writel(BRIDGE_INT_TIMER1_CLR, BRIDGE_CAUSE);
         orion_clkevt.event_handler(&orion_clkevt);
 
         return IRQ_HANDLED;