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-rw-r--r--arch/arm/plat-orion/include/plat/cache-feroceon-l2.h11
-rw-r--r--arch/arm/plat-orion/include/plat/ehci-orion.h19
-rw-r--r--arch/arm/plat-orion/include/plat/irq.h17
-rw-r--r--arch/arm/plat-orion/include/plat/mv_xor.h30
-rw-r--r--arch/arm/plat-orion/include/plat/orion_nand.h25
-rw-r--r--arch/arm/plat-orion/include/plat/pcie.h32
-rw-r--r--arch/arm/plat-orion/include/plat/time.h17
-rw-r--r--arch/arm/plat-orion/irq.c2
-rw-r--r--arch/arm/plat-orion/pcie.c2
9 files changed, 153 insertions, 2 deletions
diff --git a/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
new file mode 100644
index 000000000000..06f982d55697
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
@@ -0,0 +1,11 @@
1/*
2 * arch/arm/plat-orion/include/plat/cache-feroceon-l2.h
3 *
4 * Copyright (C) 2008 Marvell Semiconductor
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11extern void __init feroceon_l2_init(int l2_wt_override);
diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h
new file mode 100644
index 000000000000..64343051095a
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/ehci-orion.h
@@ -0,0 +1,19 @@
1/*
2 * arch/arm/plat-orion/include/plat/ehci-orion.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __PLAT_EHCI_ORION_H
10#define __PLAT_EHCI_ORION_H
11
12#include <linux/mbus.h>
13
14struct orion_ehci_data {
15 struct mbus_dram_target_info *dram;
16};
17
18
19#endif
diff --git a/arch/arm/plat-orion/include/plat/irq.h b/arch/arm/plat-orion/include/plat/irq.h
new file mode 100644
index 000000000000..f05eeab94968
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/irq.h
@@ -0,0 +1,17 @@
1/*
2 * arch/arm/plat-orion/include/plat/irq.h
3 *
4 * Marvell Orion SoC IRQ handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __PLAT_IRQ_H
12#define __PLAT_IRQ_H
13
14void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);
15
16
17#endif
diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h
new file mode 100644
index 000000000000..bd5f3bdb4ae3
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/mv_xor.h
@@ -0,0 +1,30 @@
1/*
2 * arch/arm/plat-orion/include/plat/mv_xor.h
3 *
4 * Marvell XOR platform device data definition file.
5 */
6
7#ifndef __PLAT_MV_XOR_H
8#define __PLAT_MV_XOR_H
9
10#include <linux/dmaengine.h>
11#include <linux/mbus.h>
12
13#define MV_XOR_SHARED_NAME "mv_xor_shared"
14#define MV_XOR_NAME "mv_xor"
15
16struct mbus_dram_target_info;
17
18struct mv_xor_platform_shared_data {
19 struct mbus_dram_target_info *dram;
20};
21
22struct mv_xor_platform_data {
23 struct platform_device *shared;
24 int hw_id;
25 dma_cap_mask_t cap_mask;
26 size_t pool_size;
27};
28
29
30#endif
diff --git a/arch/arm/plat-orion/include/plat/orion_nand.h b/arch/arm/plat-orion/include/plat/orion_nand.h
new file mode 100644
index 000000000000..d6a4cfa37785
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/orion_nand.h
@@ -0,0 +1,25 @@
1/*
2 * arch/arm/plat-orion/include/plat/orion_nand.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __PLAT_ORION_NAND_H
10#define __PLAT_ORION_NAND_H
11
12/*
13 * Device bus NAND private data
14 */
15struct orion_nand_data {
16 struct mtd_partition *parts;
17 u32 nr_parts;
18 u8 ale; /* address line number connected to ALE */
19 u8 cle; /* address line number connected to CLE */
20 u8 width; /* buswidth */
21 u8 chip_delay;
22};
23
24
25#endif
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h
new file mode 100644
index 000000000000..3ebfef72b4e7
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/pcie.h
@@ -0,0 +1,32 @@
1/*
2 * arch/arm/plat-orion/include/plat/pcie.h
3 *
4 * Marvell Orion SoC PCIe handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __PLAT_PCIE_H
12#define __PLAT_PCIE_H
13
14u32 orion_pcie_dev_id(void __iomem *base);
15u32 orion_pcie_rev(void __iomem *base);
16int orion_pcie_link_up(void __iomem *base);
17int orion_pcie_x4_mode(void __iomem *base);
18int orion_pcie_get_local_bus_nr(void __iomem *base);
19void orion_pcie_set_local_bus_nr(void __iomem *base, int nr);
20void orion_pcie_setup(void __iomem *base,
21 struct mbus_dram_target_info *dram);
22int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus,
23 u32 devfn, int where, int size, u32 *val);
24int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus,
25 u32 devfn, int where, int size, u32 *val);
26int orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus,
27 u32 devfn, int where, int size, u32 *val);
28int orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus,
29 u32 devfn, int where, int size, u32 val);
30
31
32#endif
diff --git a/arch/arm/plat-orion/include/plat/time.h b/arch/arm/plat-orion/include/plat/time.h
new file mode 100644
index 000000000000..c06ca35f3613
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/time.h
@@ -0,0 +1,17 @@
1/*
2 * arch/arm/plat-orion/include/plat/time.h
3 *
4 * Marvell Orion SoC time handling.
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#ifndef __PLAT_TIME_H
12#define __PLAT_TIME_H
13
14void orion_time_init(unsigned int irq, unsigned int tclk);
15
16
17#endif
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index fe66a1835169..3f9d34fc738c 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/plat-orion/irq.h> 15#include <plat/irq.h>
16 16
17static void orion_irq_mask(u32 irq) 17static void orion_irq_mask(u32 irq)
18{ 18{
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index ca32c60e14d7..883902fead89 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -12,7 +12,7 @@
12#include <linux/pci.h> 12#include <linux/pci.h>
13#include <linux/mbus.h> 13#include <linux/mbus.h>
14#include <asm/mach/pci.h> 14#include <asm/mach/pci.h>
15#include <asm/plat-orion/pcie.h> 15#include <plat/pcie.h>
16 16
17/* 17/*
18 * PCIe unit register offsets. 18 * PCIe unit register offsets.