diff options
Diffstat (limited to 'arch/arm/plat-orion/irq.c')
-rw-r--r-- | arch/arm/plat-orion/irq.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c index c492e1b3dfdb..807df142444b 100644 --- a/arch/arm/plat-orion/irq.c +++ b/arch/arm/plat-orion/irq.c | |||
@@ -15,8 +15,51 @@ | |||
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <linux/of_address.h> | 16 | #include <linux/of_address.h> |
17 | #include <linux/of_irq.h> | 17 | #include <linux/of_irq.h> |
18 | #include <asm/exception.h> | ||
18 | #include <plat/irq.h> | 19 | #include <plat/irq.h> |
19 | #include <plat/orion-gpio.h> | 20 | #include <plat/orion-gpio.h> |
21 | #include <mach/bridge-regs.h> | ||
22 | |||
23 | #ifdef CONFIG_MULTI_IRQ_HANDLER | ||
24 | /* | ||
25 | * Compiling with both non-DT and DT support enabled, will | ||
26 | * break asm irq handler used by non-DT boards. Therefore, | ||
27 | * we provide a C-style irq handler even for non-DT boards, | ||
28 | * if MULTI_IRQ_HANDLER is set. | ||
29 | * | ||
30 | * Notes: | ||
31 | * - this is prepared for Kirkwood and Dove only, update | ||
32 | * accordingly if you add Orion5x or MV78x00. | ||
33 | * - Orion5x uses different macro names and has only one | ||
34 | * set of CAUSE/MASK registers. | ||
35 | * - MV78x00 uses the same macro names but has a third | ||
36 | * set of CAUSE/MASK registers. | ||
37 | * | ||
38 | */ | ||
39 | |||
40 | static void __iomem *orion_irq_base = IRQ_VIRT_BASE; | ||
41 | |||
42 | asmlinkage void | ||
43 | __exception_irq_entry orion_legacy_handle_irq(struct pt_regs *regs) | ||
44 | { | ||
45 | u32 stat; | ||
46 | |||
47 | stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_LOW_OFF); | ||
48 | stat &= readl_relaxed(orion_irq_base + IRQ_MASK_LOW_OFF); | ||
49 | if (stat) { | ||
50 | unsigned int hwirq = __fls(stat); | ||
51 | handle_IRQ(hwirq, regs); | ||
52 | return; | ||
53 | } | ||
54 | stat = readl_relaxed(orion_irq_base + IRQ_CAUSE_HIGH_OFF); | ||
55 | stat &= readl_relaxed(orion_irq_base + IRQ_MASK_HIGH_OFF); | ||
56 | if (stat) { | ||
57 | unsigned int hwirq = 32 + __fls(stat); | ||
58 | handle_IRQ(hwirq, regs); | ||
59 | return; | ||
60 | } | ||
61 | } | ||
62 | #endif | ||
20 | 63 | ||
21 | void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) | 64 | void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) |
22 | { | 65 | { |
@@ -35,6 +78,10 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) | |||
35 | ct->chip.irq_unmask = irq_gc_mask_set_bit; | 78 | ct->chip.irq_unmask = irq_gc_mask_set_bit; |
36 | irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE, | 79 | irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE, |
37 | IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); | 80 | IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); |
81 | |||
82 | #ifdef CONFIG_MULTI_IRQ_HANDLER | ||
83 | set_handle_irq(orion_legacy_handle_irq); | ||
84 | #endif | ||
38 | } | 85 | } |
39 | 86 | ||
40 | #ifdef CONFIG_OF | 87 | #ifdef CONFIG_OF |