diff options
Diffstat (limited to 'arch/arm/plat-omap')
| -rw-r--r-- | arch/arm/plat-omap/clock.c | 20 | ||||
| -rw-r--r-- | arch/arm/plat-omap/common.c | 26 | ||||
| -rw-r--r-- | arch/arm/plat-omap/cpu-omap.c | 1 | ||||
| -rw-r--r-- | arch/arm/plat-omap/dma.c | 2 | ||||
| -rw-r--r-- | arch/arm/plat-omap/dmtimer.c | 13 | ||||
| -rw-r--r-- | arch/arm/plat-omap/gpio.c | 63 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/board.h | 1 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/clock.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/control.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/cpu.h | 1 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/io.h | 36 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/irqs.h | 3 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/mux.h | 8 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/omap7xx.h | 3 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 | ||||
| -rw-r--r-- | arch/arm/plat-omap/io.c | 12 | ||||
| -rw-r--r-- | arch/arm/plat-omap/iommu.c | 2 | ||||
| -rw-r--r-- | arch/arm/plat-omap/mcbsp.c | 20 | ||||
| -rw-r--r-- | arch/arm/plat-omap/omap_device.c | 10 |
19 files changed, 173 insertions, 53 deletions
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 89cafc937249..4becbdd1935c 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
| @@ -36,10 +36,6 @@ static struct clk_functions *arch_clock; | |||
| 36 | * Standard clock functions defined in include/linux/clk.h | 36 | * Standard clock functions defined in include/linux/clk.h |
| 37 | *-------------------------------------------------------------------------*/ | 37 | *-------------------------------------------------------------------------*/ |
| 38 | 38 | ||
| 39 | /* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since | ||
| 40 | * clock framework is not up , it is defined here to avoid rework in | ||
| 41 | * every driver. Also dummy prcm reset function is added */ | ||
| 42 | |||
| 43 | int clk_enable(struct clk *clk) | 39 | int clk_enable(struct clk *clk) |
| 44 | { | 40 | { |
| 45 | unsigned long flags; | 41 | unsigned long flags; |
| @@ -305,7 +301,6 @@ void clk_enable_init_clocks(void) | |||
| 305 | clk_enable(clkp); | 301 | clk_enable(clkp); |
| 306 | } | 302 | } |
| 307 | } | 303 | } |
| 308 | EXPORT_SYMBOL(clk_enable_init_clocks); | ||
| 309 | 304 | ||
| 310 | /* | 305 | /* |
| 311 | * Low level helpers | 306 | * Low level helpers |
| @@ -334,7 +329,16 @@ void clk_init_cpufreq_table(struct cpufreq_frequency_table **table) | |||
| 334 | arch_clock->clk_init_cpufreq_table(table); | 329 | arch_clock->clk_init_cpufreq_table(table); |
| 335 | spin_unlock_irqrestore(&clockfw_lock, flags); | 330 | spin_unlock_irqrestore(&clockfw_lock, flags); |
| 336 | } | 331 | } |
| 337 | EXPORT_SYMBOL(clk_init_cpufreq_table); | 332 | |
| 333 | void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) | ||
| 334 | { | ||
| 335 | unsigned long flags; | ||
| 336 | |||
| 337 | spin_lock_irqsave(&clockfw_lock, flags); | ||
| 338 | if (arch_clock->clk_exit_cpufreq_table) | ||
| 339 | arch_clock->clk_exit_cpufreq_table(table); | ||
| 340 | spin_unlock_irqrestore(&clockfw_lock, flags); | ||
| 341 | } | ||
| 338 | #endif | 342 | #endif |
| 339 | 343 | ||
| 340 | /*-------------------------------------------------------------------------*/ | 344 | /*-------------------------------------------------------------------------*/ |
| @@ -387,7 +391,7 @@ static struct dentry *clk_debugfs_root; | |||
| 387 | static int clk_debugfs_register_one(struct clk *c) | 391 | static int clk_debugfs_register_one(struct clk *c) |
| 388 | { | 392 | { |
| 389 | int err; | 393 | int err; |
| 390 | struct dentry *d, *child; | 394 | struct dentry *d, *child, *child_tmp; |
| 391 | struct clk *pa = c->parent; | 395 | struct clk *pa = c->parent; |
| 392 | char s[255]; | 396 | char s[255]; |
| 393 | char *p = s; | 397 | char *p = s; |
| @@ -419,7 +423,7 @@ static int clk_debugfs_register_one(struct clk *c) | |||
| 419 | 423 | ||
| 420 | err_out: | 424 | err_out: |
| 421 | d = c->dent; | 425 | d = c->dent; |
| 422 | list_for_each_entry(child, &d->d_subdirs, d_u.d_child) | 426 | list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child) |
| 423 | debugfs_remove(child); | 427 | debugfs_remove(child); |
| 424 | debugfs_remove(c->dent); | 428 | debugfs_remove(c->dent); |
| 425 | return err; | 429 | return err; |
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c index bf1eaf3a27d4..dddc0273bc8b 100644 --- a/arch/arm/plat-omap/common.c +++ b/arch/arm/plat-omap/common.c | |||
| @@ -172,6 +172,32 @@ unsigned long long sched_clock(void) | |||
| 172 | clocksource_32k.mult, clocksource_32k.shift); | 172 | clocksource_32k.mult, clocksource_32k.shift); |
| 173 | } | 173 | } |
| 174 | 174 | ||
| 175 | /** | ||
| 176 | * read_persistent_clock - Return time from a persistent clock. | ||
| 177 | * | ||
| 178 | * Reads the time from a source which isn't disabled during PM, the | ||
| 179 | * 32k sync timer. Convert the cycles elapsed since last read into | ||
| 180 | * nsecs and adds to a monotonically increasing timespec. | ||
| 181 | */ | ||
| 182 | static struct timespec persistent_ts; | ||
| 183 | static cycles_t cycles, last_cycles; | ||
| 184 | void read_persistent_clock(struct timespec *ts) | ||
| 185 | { | ||
| 186 | unsigned long long nsecs; | ||
| 187 | cycles_t delta; | ||
| 188 | struct timespec *tsp = &persistent_ts; | ||
| 189 | |||
| 190 | last_cycles = cycles; | ||
| 191 | cycles = clocksource_32k.read(&clocksource_32k); | ||
| 192 | delta = cycles - last_cycles; | ||
| 193 | |||
| 194 | nsecs = clocksource_cyc2ns(delta, | ||
| 195 | clocksource_32k.mult, clocksource_32k.shift); | ||
| 196 | |||
| 197 | timespec_add_ns(tsp, nsecs); | ||
| 198 | *ts = *tsp; | ||
| 199 | } | ||
| 200 | |||
| 175 | static int __init omap_init_clocksource_32k(void) | 201 | static int __init omap_init_clocksource_32k(void) |
| 176 | { | 202 | { |
| 177 | static char err[] __initdata = KERN_ERR | 203 | static char err[] __initdata = KERN_ERR |
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c index f8ddbdd8b076..6d3d33360056 100644 --- a/arch/arm/plat-omap/cpu-omap.c +++ b/arch/arm/plat-omap/cpu-omap.c | |||
| @@ -134,6 +134,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy) | |||
| 134 | 134 | ||
| 135 | static int omap_cpu_exit(struct cpufreq_policy *policy) | 135 | static int omap_cpu_exit(struct cpufreq_policy *policy) |
| 136 | { | 136 | { |
| 137 | clk_exit_cpufreq_table(&freq_table); | ||
| 137 | clk_put(mpu_clk); | 138 | clk_put(mpu_clk); |
| 138 | return 0; | 139 | return 0; |
| 139 | } | 140 | } |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 09d82b3c66ce..728c64204184 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
| @@ -1183,7 +1183,7 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue) | |||
| 1183 | } | 1183 | } |
| 1184 | 1184 | ||
| 1185 | if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || | 1185 | if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || |
| 1186 | (dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) { | 1186 | (dma_chan[lch_queue].flags & OMAP_DMA_ACTIVE)) { |
| 1187 | printk(KERN_ERR "omap_dma: You need to stop the DMA channels " | 1187 | printk(KERN_ERR "omap_dma: You need to stop the DMA channels " |
| 1188 | "before unlinking\n"); | 1188 | "before unlinking\n"); |
| 1189 | dump_stack(); | 1189 | dump_stack(); |
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index 64f407ee0f4e..08ccf8922520 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
| @@ -551,6 +551,19 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer) | |||
| 551 | if (l & OMAP_TIMER_CTRL_ST) { | 551 | if (l & OMAP_TIMER_CTRL_ST) { |
| 552 | l &= ~0x1; | 552 | l &= ~0x1; |
| 553 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); | 553 | omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); |
| 554 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | ||
| 555 | defined(CONFIG_ARCH_OMAP4) | ||
| 556 | /* Readback to make sure write has completed */ | ||
| 557 | omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); | ||
| 558 | /* | ||
| 559 | * Wait for functional clock period x 3.5 to make sure that | ||
| 560 | * timer is stopped | ||
| 561 | */ | ||
| 562 | udelay(3500000 / clk_get_rate(timer->fclk) + 1); | ||
| 563 | /* Ack possibly pending interrupt */ | ||
| 564 | omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, | ||
| 565 | OMAP_TIMER_INT_OVERFLOW); | ||
| 566 | #endif | ||
| 554 | } | 567 | } |
| 555 | } | 568 | } |
| 556 | EXPORT_SYMBOL_GPL(omap_dm_timer_stop); | 569 | EXPORT_SYMBOL_GPL(omap_dm_timer_stop); |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 04846811d0aa..d2422c766cca 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
| @@ -192,6 +192,7 @@ struct gpio_bank { | |||
| 192 | u32 saved_risingdetect; | 192 | u32 saved_risingdetect; |
| 193 | #endif | 193 | #endif |
| 194 | u32 level_mask; | 194 | u32 level_mask; |
| 195 | u32 toggle_mask; | ||
| 195 | spinlock_t lock; | 196 | spinlock_t lock; |
| 196 | struct gpio_chip chip; | 197 | struct gpio_chip chip; |
| 197 | struct clk *dbck; | 198 | struct clk *dbck; |
| @@ -749,6 +750,44 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | |||
| 749 | } | 750 | } |
| 750 | #endif | 751 | #endif |
| 751 | 752 | ||
| 753 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 754 | /* | ||
| 755 | * This only applies to chips that can't do both rising and falling edge | ||
| 756 | * detection at once. For all other chips, this function is a noop. | ||
| 757 | */ | ||
| 758 | static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio) | ||
| 759 | { | ||
| 760 | void __iomem *reg = bank->base; | ||
| 761 | u32 l = 0; | ||
| 762 | |||
| 763 | switch (bank->method) { | ||
| 764 | case METHOD_MPUIO: | ||
| 765 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | ||
| 766 | break; | ||
| 767 | #ifdef CONFIG_ARCH_OMAP15XX | ||
| 768 | case METHOD_GPIO_1510: | ||
| 769 | reg += OMAP1510_GPIO_INT_CONTROL; | ||
| 770 | break; | ||
| 771 | #endif | ||
| 772 | #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) | ||
| 773 | case METHOD_GPIO_7XX: | ||
| 774 | reg += OMAP7XX_GPIO_INT_CONTROL; | ||
| 775 | break; | ||
| 776 | #endif | ||
| 777 | default: | ||
| 778 | return; | ||
| 779 | } | ||
| 780 | |||
| 781 | l = __raw_readl(reg); | ||
| 782 | if ((l >> gpio) & 1) | ||
| 783 | l &= ~(1 << gpio); | ||
| 784 | else | ||
| 785 | l |= 1 << gpio; | ||
| 786 | |||
| 787 | __raw_writel(l, reg); | ||
| 788 | } | ||
| 789 | #endif | ||
| 790 | |||
| 752 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | 791 | static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) |
| 753 | { | 792 | { |
| 754 | void __iomem *reg = bank->base; | 793 | void __iomem *reg = bank->base; |
| @@ -759,6 +798,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
| 759 | case METHOD_MPUIO: | 798 | case METHOD_MPUIO: |
| 760 | reg += OMAP_MPUIO_GPIO_INT_EDGE; | 799 | reg += OMAP_MPUIO_GPIO_INT_EDGE; |
| 761 | l = __raw_readl(reg); | 800 | l = __raw_readl(reg); |
| 801 | if (trigger & IRQ_TYPE_EDGE_BOTH) | ||
| 802 | bank->toggle_mask |= 1 << gpio; | ||
| 762 | if (trigger & IRQ_TYPE_EDGE_RISING) | 803 | if (trigger & IRQ_TYPE_EDGE_RISING) |
| 763 | l |= 1 << gpio; | 804 | l |= 1 << gpio; |
| 764 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | 805 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
| @@ -771,6 +812,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
| 771 | case METHOD_GPIO_1510: | 812 | case METHOD_GPIO_1510: |
| 772 | reg += OMAP1510_GPIO_INT_CONTROL; | 813 | reg += OMAP1510_GPIO_INT_CONTROL; |
| 773 | l = __raw_readl(reg); | 814 | l = __raw_readl(reg); |
| 815 | if (trigger & IRQ_TYPE_EDGE_BOTH) | ||
| 816 | bank->toggle_mask |= 1 << gpio; | ||
| 774 | if (trigger & IRQ_TYPE_EDGE_RISING) | 817 | if (trigger & IRQ_TYPE_EDGE_RISING) |
| 775 | l |= 1 << gpio; | 818 | l |= 1 << gpio; |
| 776 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | 819 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
| @@ -803,6 +846,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
| 803 | case METHOD_GPIO_7XX: | 846 | case METHOD_GPIO_7XX: |
| 804 | reg += OMAP7XX_GPIO_INT_CONTROL; | 847 | reg += OMAP7XX_GPIO_INT_CONTROL; |
| 805 | l = __raw_readl(reg); | 848 | l = __raw_readl(reg); |
| 849 | if (trigger & IRQ_TYPE_EDGE_BOTH) | ||
| 850 | bank->toggle_mask |= 1 << gpio; | ||
| 806 | if (trigger & IRQ_TYPE_EDGE_RISING) | 851 | if (trigger & IRQ_TYPE_EDGE_RISING) |
| 807 | l |= 1 << gpio; | 852 | l |= 1 << gpio; |
| 808 | else if (trigger & IRQ_TYPE_EDGE_FALLING) | 853 | else if (trigger & IRQ_TYPE_EDGE_FALLING) |
| @@ -1072,7 +1117,7 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena | |||
| 1072 | */ | 1117 | */ |
| 1073 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | 1118 | static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) |
| 1074 | { | 1119 | { |
| 1075 | unsigned long flags; | 1120 | unsigned long uninitialized_var(flags); |
| 1076 | 1121 | ||
| 1077 | switch (bank->method) { | 1122 | switch (bank->method) { |
| 1078 | #ifdef CONFIG_ARCH_OMAP16XX | 1123 | #ifdef CONFIG_ARCH_OMAP16XX |
| @@ -1217,7 +1262,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 1217 | { | 1262 | { |
| 1218 | void __iomem *isr_reg = NULL; | 1263 | void __iomem *isr_reg = NULL; |
| 1219 | u32 isr; | 1264 | u32 isr; |
| 1220 | unsigned int gpio_irq; | 1265 | unsigned int gpio_irq, gpio_index; |
| 1221 | struct gpio_bank *bank; | 1266 | struct gpio_bank *bank; |
| 1222 | u32 retrigger = 0; | 1267 | u32 retrigger = 0; |
| 1223 | int unmasked = 0; | 1268 | int unmasked = 0; |
| @@ -1284,9 +1329,23 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
| 1284 | 1329 | ||
| 1285 | gpio_irq = bank->virtual_irq_start; | 1330 | gpio_irq = bank->virtual_irq_start; |
| 1286 | for (; isr != 0; isr >>= 1, gpio_irq++) { | 1331 | for (; isr != 0; isr >>= 1, gpio_irq++) { |
| 1332 | gpio_index = get_gpio_index(irq_to_gpio(gpio_irq)); | ||
| 1333 | |||
| 1287 | if (!(isr & 1)) | 1334 | if (!(isr & 1)) |
| 1288 | continue; | 1335 | continue; |
| 1289 | 1336 | ||
| 1337 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 1338 | /* | ||
| 1339 | * Some chips can't respond to both rising and falling | ||
| 1340 | * at the same time. If this irq was requested with | ||
| 1341 | * both flags, we need to flip the ICR data for the IRQ | ||
| 1342 | * to respond to the IRQ for the opposite direction. | ||
| 1343 | * This will be indicated in the bank toggle_mask. | ||
| 1344 | */ | ||
| 1345 | if (bank->toggle_mask & (1 << gpio_index)) | ||
| 1346 | _toggle_gpio_edge_triggering(bank, gpio_index); | ||
| 1347 | #endif | ||
| 1348 | |||
| 1290 | generic_handle_irq(gpio_irq); | 1349 | generic_handle_irq(gpio_irq); |
| 1291 | } | 1350 | } |
| 1292 | } | 1351 | } |
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h index 376ce18216ff..5cd622039da0 100644 --- a/arch/arm/plat-omap/include/plat/board.h +++ b/arch/arm/plat-omap/include/plat/board.h | |||
| @@ -99,7 +99,6 @@ struct fb_info; | |||
| 99 | struct omap_backlight_config { | 99 | struct omap_backlight_config { |
| 100 | int default_intensity; | 100 | int default_intensity; |
| 101 | int (*set_power)(struct device *dev, int state); | 101 | int (*set_power)(struct device *dev, int state); |
| 102 | int (*check_fb)(struct fb_info *fb); | ||
| 103 | }; | 102 | }; |
| 104 | 103 | ||
| 105 | struct omap_fbmem_config { | 104 | struct omap_fbmem_config { |
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 309b6d1dccdb..94fe2a0ce40a 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h | |||
| @@ -119,6 +119,7 @@ struct clk_functions { | |||
| 119 | void (*clk_disable_unused)(struct clk *clk); | 119 | void (*clk_disable_unused)(struct clk *clk); |
| 120 | #ifdef CONFIG_CPU_FREQ | 120 | #ifdef CONFIG_CPU_FREQ |
| 121 | void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); | 121 | void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); |
| 122 | void (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **); | ||
| 122 | #endif | 123 | #endif |
| 123 | }; | 124 | }; |
| 124 | 125 | ||
| @@ -135,6 +136,7 @@ extern unsigned long followparent_recalc(struct clk *clk); | |||
| 135 | extern void clk_enable_init_clocks(void); | 136 | extern void clk_enable_init_clocks(void); |
| 136 | #ifdef CONFIG_CPU_FREQ | 137 | #ifdef CONFIG_CPU_FREQ |
| 137 | extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table); | 138 | extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table); |
| 139 | extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); | ||
| 138 | #endif | 140 | #endif |
| 139 | 141 | ||
| 140 | extern const struct clkops clkops_null; | 142 | extern const struct clkops clkops_null; |
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 2ae884378638..a745d62fad0d 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h | |||
| @@ -147,7 +147,7 @@ | |||
| 147 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) | 147 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) |
| 148 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) | 148 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) |
| 149 | #define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ | 149 | #define OMAP343X_CONTROL_DEBOBS(i) (OMAP2_CONTROL_GENERAL + 0x01B0 \ |
| 150 | + ((i) >> 1) * 4 + (!(i) & 1) * 2) | 150 | + ((i) >> 1) * 4 + (!((i) & 1)) * 2) |
| 151 | #define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) | 151 | #define OMAP343X_CONTROL_PROG_IO0 (OMAP2_CONTROL_GENERAL + 0x01D4) |
| 152 | #define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) | 152 | #define OMAP343X_CONTROL_PROG_IO1 (OMAP2_CONTROL_GENERAL + 0x01D8) |
| 153 | #define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) | 153 | #define OMAP343X_CONTROL_DSS_DPLL_SPREADING (OMAP2_CONTROL_GENERAL + 0x01E0) |
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 9a028bdebb06..a162f585b1e3 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h | |||
| @@ -434,6 +434,7 @@ IS_OMAP_TYPE(3517, 0x3517) | |||
| 434 | #define OMAP3430_REV_ES2_1 0x34302034 | 434 | #define OMAP3430_REV_ES2_1 0x34302034 |
| 435 | #define OMAP3430_REV_ES3_0 0x34303034 | 435 | #define OMAP3430_REV_ES3_0 0x34303034 |
| 436 | #define OMAP3430_REV_ES3_1 0x34304034 | 436 | #define OMAP3430_REV_ES3_1 0x34304034 |
| 437 | #define OMAP3430_REV_ES3_1_2 0x34305034 | ||
| 437 | 438 | ||
| 438 | #define OMAP3630_REV_ES1_0 0x36300034 | 439 | #define OMAP3630_REV_ES1_0 0x36300034 |
| 439 | 440 | ||
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h index 7e5319f907d1..a3e7b471bcba 100644 --- a/arch/arm/plat-omap/include/plat/io.h +++ b/arch/arm/plat-omap/include/plat/io.h | |||
| @@ -122,16 +122,21 @@ | |||
| 122 | #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) | 122 | #define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET) |
| 123 | #define OMAP243X_SMS_SIZE SZ_1M | 123 | #define OMAP243X_SMS_SIZE SZ_1M |
| 124 | 124 | ||
| 125 | /* DSP */ | 125 | /* 2420 IVA */ |
| 126 | #define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ | 126 | #define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE |
| 127 | #define DSP_MEM_24XX_VIRT 0xe0000000 | 127 | /* 0x58000000 --> 0xfc100000 */ |
| 128 | #define DSP_MEM_24XX_SIZE 0x28000 | 128 | #define DSP_MEM_2420_VIRT 0xfc100000 |
| 129 | #define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ | 129 | #define DSP_MEM_2420_SIZE 0x28000 |
| 130 | #define DSP_IPI_24XX_VIRT 0xe1000000 | 130 | #define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE |
| 131 | #define DSP_IPI_24XX_SIZE SZ_4K | 131 | /* 0x59000000 --> 0xfc128000 */ |
| 132 | #define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ | 132 | #define DSP_IPI_2420_VIRT 0xfc128000 |
| 133 | #define DSP_MMU_24XX_VIRT 0xe2000000 | 133 | #define DSP_IPI_2420_SIZE SZ_4K |
| 134 | #define DSP_MMU_24XX_SIZE SZ_4K | 134 | #define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE |
| 135 | /* 0x5a000000 --> 0xfc129000 */ | ||
| 136 | #define DSP_MMU_2420_VIRT 0xfc129000 | ||
| 137 | #define DSP_MMU_2420_SIZE SZ_4K | ||
| 138 | |||
| 139 | /* 2430 IVA2.1 - currently unmapped */ | ||
| 135 | 140 | ||
| 136 | /* | 141 | /* |
| 137 | * ---------------------------------------------------------------------------- | 142 | * ---------------------------------------------------------------------------- |
| @@ -182,16 +187,7 @@ | |||
| 182 | #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) | 187 | #define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET) |
| 183 | #define OMAP343X_SDRC_SIZE SZ_1M | 188 | #define OMAP343X_SDRC_SIZE SZ_1M |
| 184 | 189 | ||
| 185 | /* DSP */ | 190 | /* 3430 IVA - currently unmapped */ |
| 186 | #define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ | ||
| 187 | #define DSP_MEM_34XX_VIRT 0xe0000000 | ||
| 188 | #define DSP_MEM_34XX_SIZE 0x28000 | ||
| 189 | #define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */ | ||
| 190 | #define DSP_IPI_34XX_VIRT 0xe1000000 | ||
| 191 | #define DSP_IPI_34XX_SIZE SZ_4K | ||
| 192 | #define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */ | ||
| 193 | #define DSP_MMU_34XX_VIRT 0xe2000000 | ||
| 194 | #define DSP_MMU_34XX_SIZE SZ_4K | ||
| 195 | 191 | ||
| 196 | /* | 192 | /* |
| 197 | * ---------------------------------------------------------------------------- | 193 | * ---------------------------------------------------------------------------- |
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h index 97d6c50c3dcb..c0ab7c80f72e 100644 --- a/arch/arm/plat-omap/include/plat/irqs.h +++ b/arch/arm/plat-omap/include/plat/irqs.h | |||
| @@ -499,6 +499,9 @@ extern void omap_init_irq(void); | |||
| 499 | extern int omap_irq_pending(void); | 499 | extern int omap_irq_pending(void); |
| 500 | void omap_intc_save_context(void); | 500 | void omap_intc_save_context(void); |
| 501 | void omap_intc_restore_context(void); | 501 | void omap_intc_restore_context(void); |
| 502 | void omap3_intc_suspend(void); | ||
| 503 | void omap3_intc_prepare_idle(void); | ||
| 504 | void omap3_intc_resume_idle(void); | ||
| 502 | #endif | 505 | #endif |
| 503 | 506 | ||
| 504 | #include <mach/hardware.h> | 507 | #include <mach/hardware.h> |
diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h index 8f069cc80350..692c90e89ac3 100644 --- a/arch/arm/plat-omap/include/plat/mux.h +++ b/arch/arm/plat-omap/include/plat/mux.h | |||
| @@ -183,6 +183,14 @@ enum omap7xx_index { | |||
| 183 | /* I2C */ | 183 | /* I2C */ |
| 184 | I2C_7XX_SCL, | 184 | I2C_7XX_SCL, |
| 185 | I2C_7XX_SDA, | 185 | I2C_7XX_SDA, |
| 186 | |||
| 187 | /* SPI */ | ||
| 188 | SPI_7XX_1, | ||
| 189 | SPI_7XX_2, | ||
| 190 | SPI_7XX_3, | ||
| 191 | SPI_7XX_4, | ||
| 192 | SPI_7XX_5, | ||
| 193 | SPI_7XX_6, | ||
| 186 | }; | 194 | }; |
| 187 | 195 | ||
| 188 | enum omap1xxx_index { | 196 | enum omap1xxx_index { |
diff --git a/arch/arm/plat-omap/include/plat/omap7xx.h b/arch/arm/plat-omap/include/plat/omap7xx.h index 53f52414b0e9..48e4757e1e30 100644 --- a/arch/arm/plat-omap/include/plat/omap7xx.h +++ b/arch/arm/plat-omap/include/plat/omap7xx.h | |||
| @@ -46,6 +46,9 @@ | |||
| 46 | #define OMAP7XX_DSPREG_SIZE SZ_128K | 46 | #define OMAP7XX_DSPREG_SIZE SZ_128K |
| 47 | #define OMAP7XX_DSPREG_START 0xE1000000 | 47 | #define OMAP7XX_DSPREG_START 0xE1000000 |
| 48 | 48 | ||
| 49 | #define OMAP7XX_SPI1_BASE 0xfffc0800 | ||
| 50 | #define OMAP7XX_SPI2_BASE 0xfffc1000 | ||
| 51 | |||
| 49 | /* | 52 | /* |
| 50 | * ---------------------------------------------------------------------------- | 53 | * ---------------------------------------------------------------------------- |
| 51 | * OMAP7XX specific configuration registers | 54 | * OMAP7XX specific configuration registers |
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 007935a921ea..33933256a226 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
| @@ -227,6 +227,7 @@ struct omap_hwmod_ocp_if { | |||
| 227 | #define SYSC_HAS_SIDLEMODE (1 << 5) | 227 | #define SYSC_HAS_SIDLEMODE (1 << 5) |
| 228 | #define SYSC_HAS_MIDLEMODE (1 << 6) | 228 | #define SYSC_HAS_MIDLEMODE (1 << 6) |
| 229 | #define SYSS_MISSING (1 << 7) | 229 | #define SYSS_MISSING (1 << 7) |
| 230 | #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ | ||
| 230 | 231 | ||
| 231 | /* omap_hwmod_sysconfig.clockact flags */ | 232 | /* omap_hwmod_sysconfig.clockact flags */ |
| 232 | #define CLOCKACT_TEST_BOTH 0x0 | 233 | #define CLOCKACT_TEST_BOTH 0x0 |
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index 11f5d7961c73..0cfd54f519c4 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c | |||
| @@ -66,12 +66,12 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) | |||
| 66 | return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); | 66 | return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); |
| 67 | } | 67 | } |
| 68 | if (cpu_is_omap2420()) { | 68 | if (cpu_is_omap2420()) { |
| 69 | if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE)) | 69 | if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE)) |
| 70 | return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT); | 70 | return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT); |
| 71 | if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE)) | 71 | if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE)) |
| 72 | return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE); | 72 | return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE); |
| 73 | if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE)) | 73 | if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE)) |
| 74 | return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT); | 74 | return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT); |
| 75 | } | 75 | } |
| 76 | if (cpu_is_omap2430()) { | 76 | if (cpu_is_omap2430()) { |
| 77 | if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) | 77 | if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) |
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c index c0ff1e39d893..463d6386aff2 100644 --- a/arch/arm/plat-omap/iommu.c +++ b/arch/arm/plat-omap/iommu.c | |||
| @@ -827,7 +827,7 @@ EXPORT_SYMBOL_GPL(iommu_get); | |||
| 827 | **/ | 827 | **/ |
| 828 | void iommu_put(struct iommu *obj) | 828 | void iommu_put(struct iommu *obj) |
| 829 | { | 829 | { |
| 830 | if (!obj && IS_ERR(obj)) | 830 | if (!obj || IS_ERR(obj)) |
| 831 | return; | 831 | return; |
| 832 | 832 | ||
| 833 | mutex_lock(&obj->iommu_lock); | 833 | mutex_lock(&obj->iommu_lock); |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index 2cc1cc328bac..f75767278fc3 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
| @@ -436,7 +436,7 @@ int omap_mcbsp_request(unsigned int id) | |||
| 436 | dev_err(mcbsp->dev, "Unable to request TX IRQ %d " | 436 | dev_err(mcbsp->dev, "Unable to request TX IRQ %d " |
| 437 | "for McBSP%d\n", mcbsp->tx_irq, | 437 | "for McBSP%d\n", mcbsp->tx_irq, |
| 438 | mcbsp->id); | 438 | mcbsp->id); |
| 439 | return err; | 439 | goto error; |
| 440 | } | 440 | } |
| 441 | 441 | ||
| 442 | init_completion(&mcbsp->rx_irq_completion); | 442 | init_completion(&mcbsp->rx_irq_completion); |
| @@ -446,12 +446,26 @@ int omap_mcbsp_request(unsigned int id) | |||
| 446 | dev_err(mcbsp->dev, "Unable to request RX IRQ %d " | 446 | dev_err(mcbsp->dev, "Unable to request RX IRQ %d " |
| 447 | "for McBSP%d\n", mcbsp->rx_irq, | 447 | "for McBSP%d\n", mcbsp->rx_irq, |
| 448 | mcbsp->id); | 448 | mcbsp->id); |
| 449 | free_irq(mcbsp->tx_irq, (void *)mcbsp); | 449 | goto tx_irq; |
| 450 | return err; | ||
| 451 | } | 450 | } |
| 452 | } | 451 | } |
| 453 | 452 | ||
| 454 | return 0; | 453 | return 0; |
| 454 | tx_irq: | ||
| 455 | free_irq(mcbsp->tx_irq, (void *)mcbsp); | ||
| 456 | error: | ||
| 457 | if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) | ||
| 458 | mcbsp->pdata->ops->free(id); | ||
| 459 | |||
| 460 | /* Do procedure specific to omap34xx arch, if applicable */ | ||
| 461 | omap34xx_mcbsp_free(mcbsp); | ||
| 462 | |||
| 463 | clk_disable(mcbsp->fclk); | ||
| 464 | clk_disable(mcbsp->iclk); | ||
| 465 | |||
| 466 | mcbsp->free = 1; | ||
| 467 | |||
| 468 | return err; | ||
| 455 | } | 469 | } |
| 456 | EXPORT_SYMBOL(omap_mcbsp_request); | 470 | EXPORT_SYMBOL(omap_mcbsp_request); |
| 457 | 471 | ||
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c index 1e5648d3e3d8..2ed72013c2e2 100644 --- a/arch/arm/plat-omap/omap_device.c +++ b/arch/arm/plat-omap/omap_device.c | |||
| @@ -89,16 +89,6 @@ | |||
| 89 | #define USE_WAKEUP_LAT 0 | 89 | #define USE_WAKEUP_LAT 0 |
| 90 | #define IGNORE_WAKEUP_LAT 1 | 90 | #define IGNORE_WAKEUP_LAT 1 |
| 91 | 91 | ||
| 92 | /* XXX this should be moved into a separate file */ | ||
| 93 | #if defined(CONFIG_ARCH_OMAP2420) | ||
| 94 | # define OMAP_32KSYNCT_BASE 0x48004000 | ||
| 95 | #elif defined(CONFIG_ARCH_OMAP2430) | ||
| 96 | # define OMAP_32KSYNCT_BASE 0x49020000 | ||
| 97 | #elif defined(CONFIG_ARCH_OMAP3430) | ||
| 98 | # define OMAP_32KSYNCT_BASE 0x48320000 | ||
| 99 | #else | ||
| 100 | # error Unknown OMAP device | ||
| 101 | #endif | ||
| 102 | 92 | ||
| 103 | /* Private functions */ | 93 | /* Private functions */ |
| 104 | 94 | ||
