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-rw-r--r--arch/arm/plat-omap/clock.c7
-rw-r--r--arch/arm/plat-omap/common.c4
-rw-r--r--arch/arm/plat-omap/dma.c13
-rw-r--r--arch/arm/plat-omap/dmtimer.c28
-rw-r--r--arch/arm/plat-omap/gpio.c20
-rw-r--r--arch/arm/plat-omap/include/mach/dmtimer.h2
-rw-r--r--arch/arm/plat-omap/include/mach/eac.h100
-rw-r--r--arch/arm/plat-omap/include/mach/gpioexpander.h35
-rw-r--r--arch/arm/plat-omap/include/mach/irda.h4
-rw-r--r--arch/arm/plat-omap/include/mach/mmc.h1
-rw-r--r--arch/arm/plat-omap/include/mach/timer-gp.h17
11 files changed, 59 insertions, 172 deletions
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 2e0614552ac8..29efc279287a 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -239,6 +239,13 @@ void recalculate_root_clocks(void)
239 } 239 }
240} 240}
241 241
242/**
243 * clk_init_one - initialize any fields in the struct clk before clk init
244 * @clk: struct clk * to initialize
245 *
246 * Initialize any struct clk fields needed before normal clk initialization
247 * can run. No return value.
248 */
242void clk_init_one(struct clk *clk) 249void clk_init_one(struct clk *clk)
243{ 250{
244 INIT_LIST_HEAD(&clk->children); 251 INIT_LIST_HEAD(&clk->children);
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index d1797147732f..433021f3d7cc 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -185,7 +185,7 @@ console_initcall(omap_add_serial_console);
185 185
186#include <linux/clocksource.h> 186#include <linux/clocksource.h>
187 187
188static cycle_t omap_32k_read(void) 188static cycle_t omap_32k_read(struct clocksource *cs)
189{ 189{
190 return omap_readl(TIMER_32K_SYNCHRONIZED); 190 return omap_readl(TIMER_32K_SYNCHRONIZED);
191} 191}
@@ -207,7 +207,7 @@ unsigned long long sched_clock(void)
207{ 207{
208 unsigned long long ret; 208 unsigned long long ret;
209 209
210 ret = (unsigned long long)omap_32k_read(); 210 ret = (unsigned long long)omap_32k_read(&clocksource_32k);
211 ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift; 211 ret = (ret * clocksource_32k.mult_orig) >> clocksource_32k.shift;
212 return ret; 212 return ret;
213} 213}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 21cc0142b97a..7fc8c045ad5d 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -760,19 +760,12 @@ void omap_free_dma(int lch)
760{ 760{
761 unsigned long flags; 761 unsigned long flags;
762 762
763 spin_lock_irqsave(&dma_chan_lock, flags);
764 if (dma_chan[lch].dev_id == -1) { 763 if (dma_chan[lch].dev_id == -1) {
765 pr_err("omap_dma: trying to free unallocated DMA channel %d\n", 764 pr_err("omap_dma: trying to free unallocated DMA channel %d\n",
766 lch); 765 lch);
767 spin_unlock_irqrestore(&dma_chan_lock, flags);
768 return; 766 return;
769 } 767 }
770 768
771 dma_chan[lch].dev_id = -1;
772 dma_chan[lch].next_lch = -1;
773 dma_chan[lch].callback = NULL;
774 spin_unlock_irqrestore(&dma_chan_lock, flags);
775
776 if (cpu_class_is_omap1()) { 769 if (cpu_class_is_omap1()) {
777 /* Disable all DMA interrupts for the channel. */ 770 /* Disable all DMA interrupts for the channel. */
778 dma_write(0, CICR(lch)); 771 dma_write(0, CICR(lch));
@@ -798,6 +791,12 @@ void omap_free_dma(int lch)
798 dma_write(0, CCR(lch)); 791 dma_write(0, CCR(lch));
799 omap_clear_dma(lch); 792 omap_clear_dma(lch);
800 } 793 }
794
795 spin_lock_irqsave(&dma_chan_lock, flags);
796 dma_chan[lch].dev_id = -1;
797 dma_chan[lch].next_lch = -1;
798 dma_chan[lch].callback = NULL;
799 spin_unlock_irqrestore(&dma_chan_lock, flags);
801} 800}
802EXPORT_SYMBOL(omap_free_dma); 801EXPORT_SYMBOL(omap_free_dma);
803 802
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index bfd47570cc91..55bb99631292 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -238,7 +238,7 @@ static struct omap_dm_timer omap3_dm_timers[] = {
238 { .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 }, 238 { .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 },
239 { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 }, 239 { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
240 { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 }, 240 { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
241 { .phys_base = 0x48304000, .irq = INT_24XX_GPTIMER12 }, 241 { .phys_base = 0x48304000, .irq = INT_34XX_GPT12_IRQ },
242}; 242};
243 243
244static const char *omap3_dm_source_names[] __initdata = { 244static const char *omap3_dm_source_names[] __initdata = {
@@ -321,11 +321,9 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
321 l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ 321 l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */
322 322
323 /* 323 /*
324 * Enable wake-up only for GPT1 on OMAP2 CPUs. 324 * Enable wake-up on OMAP2 CPUs.
325 * FIXME: All timers should have wake-up enabled and clear
326 * PRCM status.
327 */ 325 */
328 if (cpu_class_is_omap2() && (timer == &dm_timers[0])) 326 if (cpu_class_is_omap2())
329 l |= 1 << 2; 327 l |= 1 << 2;
330 omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l); 328 omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l);
331 329
@@ -511,7 +509,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
511 509
512#ifdef CONFIG_ARCH_OMAP1 510#ifdef CONFIG_ARCH_OMAP1
513 511
514void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) 512int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
515{ 513{
516 int n = (timer - dm_timers) << 1; 514 int n = (timer - dm_timers) << 1;
517 u32 l; 515 u32 l;
@@ -519,23 +517,31 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
519 l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); 517 l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
520 l |= source << n; 518 l |= source << n;
521 omap_writel(l, MOD_CONF_CTRL_1); 519 omap_writel(l, MOD_CONF_CTRL_1);
520
521 return 0;
522} 522}
523EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); 523EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
524 524
525#else 525#else
526 526
527void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) 527int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
528{ 528{
529 int ret = -EINVAL;
530
529 if (source < 0 || source >= 3) 531 if (source < 0 || source >= 3)
530 return; 532 return -EINVAL;
531 533
532 clk_disable(timer->fclk); 534 clk_disable(timer->fclk);
533 clk_set_parent(timer->fclk, dm_source_clocks[source]); 535 ret = clk_set_parent(timer->fclk, dm_source_clocks[source]);
534 clk_enable(timer->fclk); 536 clk_enable(timer->fclk);
535 537
536 /* When the functional clock disappears, too quick writes seem to 538 /*
537 * cause an abort. */ 539 * When the functional clock disappears, too quick writes seem
540 * to cause an abort. XXX Is this still necessary?
541 */
538 __delay(150000); 542 __delay(150000);
543
544 return ret;
539} 545}
540EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); 546EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
541 547
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index d3fa41e3d8c5..17d7afe42b83 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -758,8 +758,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
758 758
759 /* Workaround for clearing DSP GPIO interrupts to allow retention */ 759 /* Workaround for clearing DSP GPIO interrupts to allow retention */
760#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 760#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
761 reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
761 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 762 if (cpu_is_omap24xx() || cpu_is_omap34xx())
762 __raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2); 763 __raw_writel(gpio_mask, reg);
764
765 /* Flush posted write for the irq status to avoid spurious interrupts */
766 __raw_readl(reg);
763#endif 767#endif
764} 768}
765 769
@@ -921,13 +925,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
921 case METHOD_MPUIO: 925 case METHOD_MPUIO:
922 case METHOD_GPIO_1610: 926 case METHOD_GPIO_1610:
923 spin_lock_irqsave(&bank->lock, flags); 927 spin_lock_irqsave(&bank->lock, flags);
924 if (enable) { 928 if (enable)
925 bank->suspend_wakeup |= (1 << gpio); 929 bank->suspend_wakeup |= (1 << gpio);
926 enable_irq_wake(bank->irq); 930 else
927 } else {
928 disable_irq_wake(bank->irq);
929 bank->suspend_wakeup &= ~(1 << gpio); 931 bank->suspend_wakeup &= ~(1 << gpio);
930 }
931 spin_unlock_irqrestore(&bank->lock, flags); 932 spin_unlock_irqrestore(&bank->lock, flags);
932 return 0; 933 return 0;
933#endif 934#endif
@@ -940,13 +941,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
940 return -EINVAL; 941 return -EINVAL;
941 } 942 }
942 spin_lock_irqsave(&bank->lock, flags); 943 spin_lock_irqsave(&bank->lock, flags);
943 if (enable) { 944 if (enable)
944 bank->suspend_wakeup |= (1 << gpio); 945 bank->suspend_wakeup |= (1 << gpio);
945 enable_irq_wake(bank->irq); 946 else
946 } else {
947 disable_irq_wake(bank->irq);
948 bank->suspend_wakeup &= ~(1 << gpio); 947 bank->suspend_wakeup &= ~(1 << gpio);
949 }
950 spin_unlock_irqrestore(&bank->lock, flags); 948 spin_unlock_irqrestore(&bank->lock, flags);
951 return 0; 949 return 0;
952#endif 950#endif
diff --git a/arch/arm/plat-omap/include/mach/dmtimer.h b/arch/arm/plat-omap/include/mach/dmtimer.h
index 6dc703138210..20f1054c0a80 100644
--- a/arch/arm/plat-omap/include/mach/dmtimer.h
+++ b/arch/arm/plat-omap/include/mach/dmtimer.h
@@ -64,7 +64,7 @@ void omap_dm_timer_trigger(struct omap_dm_timer *timer);
64void omap_dm_timer_start(struct omap_dm_timer *timer); 64void omap_dm_timer_start(struct omap_dm_timer *timer);
65void omap_dm_timer_stop(struct omap_dm_timer *timer); 65void omap_dm_timer_stop(struct omap_dm_timer *timer);
66 66
67void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); 67int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
68void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value); 68void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
69void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value); 69void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
70void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match); 70void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
diff --git a/arch/arm/plat-omap/include/mach/eac.h b/arch/arm/plat-omap/include/mach/eac.h
deleted file mode 100644
index 9e62cf030270..000000000000
--- a/arch/arm/plat-omap/include/mach/eac.h
+++ /dev/null
@@ -1,100 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach2/eac.h
3 *
4 * Defines for Enhanced Audio Controller
5 *
6 * Contact: Jarkko Nikula <jarkko.nikula@nokia.com>
7 *
8 * Copyright (C) 2006 Nokia Corporation
9 * Copyright (C) 2004 Texas Instruments, Inc.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 * 02110-1301 USA
24 *
25 */
26
27#ifndef __ASM_ARM_ARCH_OMAP2_EAC_H
28#define __ASM_ARM_ARCH_OMAP2_EAC_H
29
30#include <mach/io.h>
31#include <mach/hardware.h>
32#include <asm/irq.h>
33
34#include <sound/core.h>
35
36/* master codec clock source */
37#define EAC_MCLK_EXT_MASK 0x100
38enum eac_mclk_src {
39 EAC_MCLK_INT_11290000, /* internal 96 MHz / 8.5 = 11.29 Mhz */
40 EAC_MCLK_EXT_11289600 = EAC_MCLK_EXT_MASK,
41 EAC_MCLK_EXT_12288000,
42 EAC_MCLK_EXT_2x11289600,
43 EAC_MCLK_EXT_2x12288000,
44};
45
46/* codec port interface mode */
47enum eac_codec_mode {
48 EAC_CODEC_PCM,
49 EAC_CODEC_AC97,
50 EAC_CODEC_I2S_MASTER, /* codec port, I.e. EAC is the master */
51 EAC_CODEC_I2S_SLAVE,
52};
53
54/* configuration structure for I2S mode */
55struct eac_i2s_conf {
56 /* if enabled, then first data slot (left channel) is signaled as
57 * positive level of frame sync EAC.AC_FS */
58 unsigned polarity_changed_mode:1;
59 /* if enabled, then serial data starts one clock cycle after the
60 * of EAC.AC_FS for first audio slot */
61 unsigned sync_delay_enable:1;
62};
63
64/* configuration structure for EAC codec port */
65struct eac_codec {
66 enum eac_mclk_src mclk_src;
67
68 enum eac_codec_mode codec_mode;
69 union {
70 struct eac_i2s_conf i2s;
71 } codec_conf;
72
73 int default_rate; /* audio sampling rate */
74
75 int (* set_power)(void *private_data, int dac, int adc);
76 int (* register_controls)(void *private_data,
77 struct snd_card *card);
78 const char *short_name;
79
80 void *private_data;
81};
82
83/* structure for passing platform dependent data to the EAC driver */
84struct eac_platform_data {
85 int (* init)(struct device *eac_dev);
86 void (* cleanup)(struct device *eac_dev);
87 /* these callbacks are used to configure & control external MCLK
88 * source. NULL if not used */
89 int (* enable_ext_clocks)(struct device *eac_dev);
90 void (* disable_ext_clocks)(struct device *eac_dev);
91};
92
93extern void omap_init_eac(struct eac_platform_data *pdata);
94
95extern int eac_register_codec(struct device *eac_dev, struct eac_codec *codec);
96extern void eac_unregister_codec(struct device *eac_dev);
97
98extern int eac_set_mode(struct device *eac_dev, int play, int rec);
99
100#endif /* __ASM_ARM_ARCH_OMAP2_EAC_H */
diff --git a/arch/arm/plat-omap/include/mach/gpioexpander.h b/arch/arm/plat-omap/include/mach/gpioexpander.h
deleted file mode 100644
index 90444a0d6b1a..000000000000
--- a/arch/arm/plat-omap/include/mach/gpioexpander.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/gpioexpander.h
3 *
4 *
5 * Copyright (C) 2004 Texas Instruments, Inc.
6 *
7 * This package is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
12 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
13 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
14 */
15
16#ifndef __ASM_ARCH_OMAP_GPIOEXPANDER_H
17#define __ASM_ARCH_OMAP_GPIOEXPANDER_H
18
19/* Function Prototypes for GPIO Expander functions */
20
21#ifdef CONFIG_GPIOEXPANDER_OMAP
22int read_gpio_expa(u8 *, int);
23int write_gpio_expa(u8 , int);
24#else
25static inline int read_gpio_expa(u8 *val, int addr)
26{
27 return 0;
28}
29static inline int write_gpio_expa(u8 val, int addr)
30{
31 return 0;
32}
33#endif
34
35#endif /* __ASM_ARCH_OMAP_GPIOEXPANDER_H */
diff --git a/arch/arm/plat-omap/include/mach/irda.h b/arch/arm/plat-omap/include/mach/irda.h
index 8372a00d8e0b..40f60339d1c6 100644
--- a/arch/arm/plat-omap/include/mach/irda.h
+++ b/arch/arm/plat-omap/include/mach/irda.h
@@ -21,10 +21,6 @@ struct omap_irda_config {
21 int transceiver_cap; 21 int transceiver_cap;
22 int (*transceiver_mode)(struct device *dev, int mode); 22 int (*transceiver_mode)(struct device *dev, int mode);
23 int (*select_irda)(struct device *dev, int state); 23 int (*select_irda)(struct device *dev, int state);
24 /* Very specific to the needs of some platforms (h3,h4)
25 * having calls which can sleep in irda_set_speed.
26 */
27 struct delayed_work gpio_expa;
28 int rx_channel; 24 int rx_channel;
29 int tx_channel; 25 int tx_channel;
30 unsigned long dest_start; 26 unsigned long dest_start;
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index 4435bd434e17..81d5b36534b3 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -79,7 +79,6 @@ struct omap_mmc_platform_data {
79 79
80 /* use the internal clock */ 80 /* use the internal clock */
81 unsigned internal_clock:1; 81 unsigned internal_clock:1;
82 s16 power_pin;
83 82
84 int switch_pin; /* gpio (card detect) */ 83 int switch_pin; /* gpio (card detect) */
85 int gpio_wp; /* gpio (write protect) */ 84 int gpio_wp; /* gpio (write protect) */
diff --git a/arch/arm/plat-omap/include/mach/timer-gp.h b/arch/arm/plat-omap/include/mach/timer-gp.h
new file mode 100644
index 000000000000..c88d346b59d9
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/timer-gp.h
@@ -0,0 +1,17 @@
1/*
2 * OMAP2/3 GPTIMER support.headers
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
12#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H
13
14int __init omap2_gp_clockevent_set_gptimer(u8 id);
15
16#endif
17