aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-omap
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/Makefile1
-rw-r--r--arch/arm/plat-omap/common.c3
-rw-r--r--arch/arm/plat-omap/cpu-omap.c171
-rw-r--r--arch/arm/plat-omap/dma.c22
-rw-r--r--arch/arm/plat-omap/include/plat/am33xx.h25
-rw-r--r--arch/arm/plat-omap/include/plat/clkdev_omap.h1
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h4
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h56
-rw-r--r--arch/arm/plat-omap/include/plat/hardware.h3
-rw-r--r--arch/arm/plat-omap/include/plat/io.h12
-rw-r--r--arch/arm/plat-omap/include/plat/iommu.h31
-rw-r--r--arch/arm/plat-omap/include/plat/iovmm.h12
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h2
-rw-r--r--arch/arm/plat-omap/include/plat/mmc.h1
-rw-r--r--arch/arm/plat-omap/include/plat/omap-secure.h13
-rw-r--r--arch/arm/plat-omap/include/plat/omap-serial.h37
-rw-r--r--arch/arm/plat-omap/include/plat/omap34xx.h2
-rw-r--r--arch/arm/plat-omap/include/plat/omap44xx.h1
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h6
-rw-r--r--arch/arm/plat-omap/include/plat/serial.h27
-rw-r--r--arch/arm/plat-omap/include/plat/sram.h6
-rw-r--r--arch/arm/plat-omap/include/plat/ti81xx.h (renamed from arch/arm/plat-omap/include/plat/ti816x.h)18
-rw-r--r--arch/arm/plat-omap/include/plat/uncompress.h11
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h35
-rw-r--r--arch/arm/plat-omap/sram.c17
25 files changed, 291 insertions, 226 deletions
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 3df04d944e4d..9a584614e7e6 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -19,7 +19,6 @@ obj-$(CONFIG_ARCH_OMAP4) += omap_device.o
19 19
20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o 20obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
21 21
22obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
23obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o 22obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
24obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o 23obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
25obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o 24obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 2ee6341fffdb..06383b51e655 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -22,6 +22,8 @@
22#include <plat/vram.h> 22#include <plat/vram.h>
23#include <plat/dsp.h> 23#include <plat/dsp.h>
24 24
25#include <plat/omap-secure.h>
26
25 27
26#define NO_LENGTH_CHECK 0xffffffff 28#define NO_LENGTH_CHECK 0xffffffff
27 29
@@ -66,6 +68,7 @@ void __init omap_reserve(void)
66 omapfb_reserve_sdram_memblock(); 68 omapfb_reserve_sdram_memblock();
67 omap_vram_reserve_sdram_memblock(); 69 omap_vram_reserve_sdram_memblock();
68 omap_dsp_reserve_sdram_memblock(); 70 omap_dsp_reserve_sdram_memblock();
71 omap_secure_ram_reserve_memblock();
69} 72}
70 73
71void __init omap_init_consistent_dma_size(void) 74void __init omap_init_consistent_dma_size(void)
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
deleted file mode 100644
index da4f68dbba1d..000000000000
--- a/arch/arm/plat-omap/cpu-omap.c
+++ /dev/null
@@ -1,171 +0,0 @@
1/*
2 * linux/arch/arm/plat-omap/cpu-omap.c
3 *
4 * CPU frequency scaling for OMAP
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *
9 * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/cpufreq.h>
19#include <linux/delay.h>
20#include <linux/init.h>
21#include <linux/err.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24
25#include <mach/hardware.h>
26#include <plat/clock.h>
27#include <asm/system.h>
28
29#define VERY_HI_RATE 900000000
30
31static struct cpufreq_frequency_table *freq_table;
32
33#ifdef CONFIG_ARCH_OMAP1
34#define MPU_CLK "mpu"
35#else
36#define MPU_CLK "virt_prcm_set"
37#endif
38
39static struct clk *mpu_clk;
40
41/* TODO: Add support for SDRAM timing changes */
42
43static int omap_verify_speed(struct cpufreq_policy *policy)
44{
45 if (freq_table)
46 return cpufreq_frequency_table_verify(policy, freq_table);
47
48 if (policy->cpu)
49 return -EINVAL;
50
51 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
52 policy->cpuinfo.max_freq);
53
54 policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000;
55 policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000;
56 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
57 policy->cpuinfo.max_freq);
58 return 0;
59}
60
61static unsigned int omap_getspeed(unsigned int cpu)
62{
63 unsigned long rate;
64
65 if (cpu)
66 return 0;
67
68 rate = clk_get_rate(mpu_clk) / 1000;
69 return rate;
70}
71
72static int omap_target(struct cpufreq_policy *policy,
73 unsigned int target_freq,
74 unsigned int relation)
75{
76 struct cpufreq_freqs freqs;
77 int ret = 0;
78
79 /* Ensure desired rate is within allowed range. Some govenors
80 * (ondemand) will just pass target_freq=0 to get the minimum. */
81 if (target_freq < policy->min)
82 target_freq = policy->min;
83 if (target_freq > policy->max)
84 target_freq = policy->max;
85
86 freqs.old = omap_getspeed(0);
87 freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000;
88 freqs.cpu = 0;
89
90 if (freqs.old == freqs.new)
91 return ret;
92
93 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
94#ifdef CONFIG_CPU_FREQ_DEBUG
95 printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n",
96 freqs.old, freqs.new);
97#endif
98 ret = clk_set_rate(mpu_clk, freqs.new * 1000);
99 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
100
101 return ret;
102}
103
104static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
105{
106 int result = 0;
107
108 mpu_clk = clk_get(NULL, MPU_CLK);
109 if (IS_ERR(mpu_clk))
110 return PTR_ERR(mpu_clk);
111
112 if (policy->cpu != 0)
113 return -EINVAL;
114
115 policy->cur = policy->min = policy->max = omap_getspeed(0);
116
117 clk_init_cpufreq_table(&freq_table);
118 if (freq_table) {
119 result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
120 if (!result)
121 cpufreq_frequency_table_get_attr(freq_table,
122 policy->cpu);
123 } else {
124 policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000;
125 policy->cpuinfo.max_freq = clk_round_rate(mpu_clk,
126 VERY_HI_RATE) / 1000;
127 }
128
129 /* FIXME: what's the actual transition time? */
130 policy->cpuinfo.transition_latency = 300 * 1000;
131
132 return 0;
133}
134
135static int omap_cpu_exit(struct cpufreq_policy *policy)
136{
137 clk_exit_cpufreq_table(&freq_table);
138 clk_put(mpu_clk);
139 return 0;
140}
141
142static struct freq_attr *omap_cpufreq_attr[] = {
143 &cpufreq_freq_attr_scaling_available_freqs,
144 NULL,
145};
146
147static struct cpufreq_driver omap_driver = {
148 .flags = CPUFREQ_STICKY,
149 .verify = omap_verify_speed,
150 .target = omap_target,
151 .get = omap_getspeed,
152 .init = omap_cpu_init,
153 .exit = omap_cpu_exit,
154 .name = "omap",
155 .attr = omap_cpufreq_attr,
156};
157
158static int __init omap_cpufreq_init(void)
159{
160 return cpufreq_register_driver(&omap_driver);
161}
162
163arch_initcall(omap_cpufreq_init);
164
165/*
166 * if ever we want to remove this, upon cleanup call:
167 *
168 * cpufreq_unregister_driver()
169 * cpufreq_frequency_table_put_attr()
170 */
171
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index c22217c2ee5f..002fb4d96bbc 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1034,6 +1034,18 @@ dma_addr_t omap_get_dma_src_pos(int lch)
1034 if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0) 1034 if (IS_DMA_ERRATA(DMA_ERRATA_3_3) && offset == 0)
1035 offset = p->dma_read(CSAC, lch); 1035 offset = p->dma_read(CSAC, lch);
1036 1036
1037 if (!cpu_is_omap15xx()) {
1038 /*
1039 * CDAC == 0 indicates that the DMA transfer on the channel has
1040 * not been started (no data has been transferred so far).
1041 * Return the programmed source start address in this case.
1042 */
1043 if (likely(p->dma_read(CDAC, lch)))
1044 offset = p->dma_read(CSAC, lch);
1045 else
1046 offset = p->dma_read(CSSA, lch);
1047 }
1048
1037 if (cpu_class_is_omap1()) 1049 if (cpu_class_is_omap1())
1038 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000); 1050 offset |= (p->dma_read(CSSA, lch) & 0xFFFF0000);
1039 1051
@@ -1062,8 +1074,16 @@ dma_addr_t omap_get_dma_dst_pos(int lch)
1062 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is 1074 * omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
1063 * read before the DMA controller finished disabling the channel. 1075 * read before the DMA controller finished disabling the channel.
1064 */ 1076 */
1065 if (!cpu_is_omap15xx() && offset == 0) 1077 if (!cpu_is_omap15xx() && offset == 0) {
1066 offset = p->dma_read(CDAC, lch); 1078 offset = p->dma_read(CDAC, lch);
1079 /*
1080 * CDAC == 0 indicates that the DMA transfer on the channel has
1081 * not been started (no data has been transferred so far).
1082 * Return the programmed destination start address in this case.
1083 */
1084 if (unlikely(!offset))
1085 offset = p->dma_read(CDSA, lch);
1086 }
1067 1087
1068 if (cpu_class_is_omap1()) 1088 if (cpu_class_is_omap1())
1069 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000); 1089 offset |= (p->dma_read(CDSA, lch) & 0xFFFF0000);
diff --git a/arch/arm/plat-omap/include/plat/am33xx.h b/arch/arm/plat-omap/include/plat/am33xx.h
new file mode 100644
index 000000000000..06c19bb7bca6
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/am33xx.h
@@ -0,0 +1,25 @@
1/*
2 * This file contains the address info for various AM33XX modules.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __ASM_ARCH_AM33XX_H
17#define __ASM_ARCH_AM33XX_H
18
19#define L4_SLOW_AM33XX_BASE 0x48000000
20
21#define AM33XX_SCM_BASE 0x44E10000
22#define AM33XX_CTRL_BASE AM33XX_SCM_BASE
23#define AM33XX_PRCM_BASE 0x44E00000
24
25#endif /* __ASM_ARCH_AM33XX_H */
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
index 387a9638991b..b299b8d201c8 100644
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h
@@ -40,6 +40,7 @@ struct omap_clk {
40#define CK_443X (1 << 11) 40#define CK_443X (1 << 11)
41#define CK_TI816X (1 << 12) 41#define CK_TI816X (1 << 12)
42#define CK_446X (1 << 13) 42#define CK_446X (1 << 13)
43#define CK_1710 (1 << 15) /* 1710 extra for rate selection */
43 44
44 45
45#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS) 46#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index eb73ab40e955..240a7b9fd946 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -59,6 +59,8 @@ struct clkops {
59#define RATE_IN_4430 (1 << 5) 59#define RATE_IN_4430 (1 << 5)
60#define RATE_IN_TI816X (1 << 6) 60#define RATE_IN_TI816X (1 << 6)
61#define RATE_IN_4460 (1 << 7) 61#define RATE_IN_4460 (1 << 7)
62#define RATE_IN_AM33XX (1 << 8)
63#define RATE_IN_TI814X (1 << 9)
62 64
63#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) 65#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
64#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS) 66#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
@@ -84,7 +86,7 @@ struct clkops {
84struct clksel_rate { 86struct clksel_rate {
85 u32 val; 87 u32 val;
86 u8 div; 88 u8 div;
87 u8 flags; 89 u16 flags;
88}; 90};
89 91
90/** 92/**
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 408a12f79205..6b51086fce18 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -69,6 +69,7 @@ unsigned int omap_rev(void);
69 * cpu_is_omap343x(): True for OMAP3430 69 * cpu_is_omap343x(): True for OMAP3430
70 * cpu_is_omap443x(): True for OMAP4430 70 * cpu_is_omap443x(): True for OMAP4430
71 * cpu_is_omap446x(): True for OMAP4460 71 * cpu_is_omap446x(): True for OMAP4460
72 * cpu_is_omap447x(): True for OMAP4470
72 */ 73 */
73#define GET_OMAP_CLASS (omap_rev() & 0xff) 74#define GET_OMAP_CLASS (omap_rev() & 0xff)
74 75
@@ -78,6 +79,22 @@ static inline int is_omap ##class (void) \
78 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ 79 return (GET_OMAP_CLASS == (id)) ? 1 : 0; \
79} 80}
80 81
82#define GET_AM_CLASS ((omap_rev() >> 24) & 0xff)
83
84#define IS_AM_CLASS(class, id) \
85static inline int is_am ##class (void) \
86{ \
87 return (GET_AM_CLASS == (id)) ? 1 : 0; \
88}
89
90#define GET_TI_CLASS ((omap_rev() >> 24) & 0xff)
91
92#define IS_TI_CLASS(class, id) \
93static inline int is_ti ##class (void) \
94{ \
95 return (GET_TI_CLASS == (id)) ? 1 : 0; \
96}
97
81#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff) 98#define GET_OMAP_SUBCLASS ((omap_rev() >> 20) & 0x0fff)
82 99
83#define IS_OMAP_SUBCLASS(subclass, id) \ 100#define IS_OMAP_SUBCLASS(subclass, id) \
@@ -92,12 +109,21 @@ static inline int is_ti ##subclass (void) \
92 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ 109 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
93} 110}
94 111
112#define IS_AM_SUBCLASS(subclass, id) \
113static inline int is_am ##subclass (void) \
114{ \
115 return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
116}
117
95IS_OMAP_CLASS(7xx, 0x07) 118IS_OMAP_CLASS(7xx, 0x07)
96IS_OMAP_CLASS(15xx, 0x15) 119IS_OMAP_CLASS(15xx, 0x15)
97IS_OMAP_CLASS(16xx, 0x16) 120IS_OMAP_CLASS(16xx, 0x16)
98IS_OMAP_CLASS(24xx, 0x24) 121IS_OMAP_CLASS(24xx, 0x24)
99IS_OMAP_CLASS(34xx, 0x34) 122IS_OMAP_CLASS(34xx, 0x34)
100IS_OMAP_CLASS(44xx, 0x44) 123IS_OMAP_CLASS(44xx, 0x44)
124IS_AM_CLASS(33xx, 0x33)
125
126IS_TI_CLASS(81xx, 0x81)
101 127
102IS_OMAP_SUBCLASS(242x, 0x242) 128IS_OMAP_SUBCLASS(242x, 0x242)
103IS_OMAP_SUBCLASS(243x, 0x243) 129IS_OMAP_SUBCLASS(243x, 0x243)
@@ -105,8 +131,11 @@ IS_OMAP_SUBCLASS(343x, 0x343)
105IS_OMAP_SUBCLASS(363x, 0x363) 131IS_OMAP_SUBCLASS(363x, 0x363)
106IS_OMAP_SUBCLASS(443x, 0x443) 132IS_OMAP_SUBCLASS(443x, 0x443)
107IS_OMAP_SUBCLASS(446x, 0x446) 133IS_OMAP_SUBCLASS(446x, 0x446)
134IS_OMAP_SUBCLASS(447x, 0x447)
108 135
109IS_TI_SUBCLASS(816x, 0x816) 136IS_TI_SUBCLASS(816x, 0x816)
137IS_TI_SUBCLASS(814x, 0x814)
138IS_AM_SUBCLASS(335x, 0x335)
110 139
111#define cpu_is_omap7xx() 0 140#define cpu_is_omap7xx() 0
112#define cpu_is_omap15xx() 0 141#define cpu_is_omap15xx() 0
@@ -116,10 +145,15 @@ IS_TI_SUBCLASS(816x, 0x816)
116#define cpu_is_omap243x() 0 145#define cpu_is_omap243x() 0
117#define cpu_is_omap34xx() 0 146#define cpu_is_omap34xx() 0
118#define cpu_is_omap343x() 0 147#define cpu_is_omap343x() 0
148#define cpu_is_ti81xx() 0
119#define cpu_is_ti816x() 0 149#define cpu_is_ti816x() 0
150#define cpu_is_ti814x() 0
151#define cpu_is_am33xx() 0
152#define cpu_is_am335x() 0
120#define cpu_is_omap44xx() 0 153#define cpu_is_omap44xx() 0
121#define cpu_is_omap443x() 0 154#define cpu_is_omap443x() 0
122#define cpu_is_omap446x() 0 155#define cpu_is_omap446x() 0
156#define cpu_is_omap447x() 0
123 157
124#if defined(MULTI_OMAP1) 158#if defined(MULTI_OMAP1)
125# if defined(CONFIG_ARCH_OMAP730) 159# if defined(CONFIG_ARCH_OMAP730)
@@ -322,7 +356,11 @@ IS_OMAP_TYPE(3517, 0x3517)
322# undef cpu_is_omap3530 356# undef cpu_is_omap3530
323# undef cpu_is_omap3505 357# undef cpu_is_omap3505
324# undef cpu_is_omap3517 358# undef cpu_is_omap3517
359# undef cpu_is_ti81xx
325# undef cpu_is_ti816x 360# undef cpu_is_ti816x
361# undef cpu_is_ti814x
362# undef cpu_is_am33xx
363# undef cpu_is_am335x
326# define cpu_is_omap3430() is_omap3430() 364# define cpu_is_omap3430() is_omap3430()
327# define cpu_is_omap3503() (cpu_is_omap3430() && \ 365# define cpu_is_omap3503() (cpu_is_omap3430() && \
328 (!omap3_has_iva()) && \ 366 (!omap3_has_iva()) && \
@@ -339,16 +377,22 @@ IS_OMAP_TYPE(3517, 0x3517)
339 !omap3_has_sgx()) 377 !omap3_has_sgx())
340# undef cpu_is_omap3630 378# undef cpu_is_omap3630
341# define cpu_is_omap3630() is_omap363x() 379# define cpu_is_omap3630() is_omap363x()
380# define cpu_is_ti81xx() is_ti81xx()
342# define cpu_is_ti816x() is_ti816x() 381# define cpu_is_ti816x() is_ti816x()
382# define cpu_is_ti814x() is_ti814x()
383# define cpu_is_am33xx() is_am33xx()
384# define cpu_is_am335x() is_am335x()
343#endif 385#endif
344 386
345# if defined(CONFIG_ARCH_OMAP4) 387# if defined(CONFIG_ARCH_OMAP4)
346# undef cpu_is_omap44xx 388# undef cpu_is_omap44xx
347# undef cpu_is_omap443x 389# undef cpu_is_omap443x
348# undef cpu_is_omap446x 390# undef cpu_is_omap446x
391# undef cpu_is_omap447x
349# define cpu_is_omap44xx() is_omap44xx() 392# define cpu_is_omap44xx() is_omap44xx()
350# define cpu_is_omap443x() is_omap443x() 393# define cpu_is_omap443x() is_omap443x()
351# define cpu_is_omap446x() is_omap446x() 394# define cpu_is_omap446x() is_omap446x()
395# define cpu_is_omap447x() is_omap447x()
352# endif 396# endif
353 397
354/* Macros to detect if we have OMAP1 or OMAP2 */ 398/* Macros to detect if we have OMAP1 or OMAP2 */
@@ -386,15 +430,27 @@ IS_OMAP_TYPE(3517, 0x3517)
386#define TI8168_REV_ES1_0 TI816X_CLASS 430#define TI8168_REV_ES1_0 TI816X_CLASS
387#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8)) 431#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
388 432
433#define TI814X_CLASS 0x81400034
434#define TI8148_REV_ES1_0 TI814X_CLASS
435#define TI8148_REV_ES2_0 (TI814X_CLASS | (0x1 << 8))
436#define TI8148_REV_ES2_1 (TI814X_CLASS | (0x2 << 8))
437
438#define AM335X_CLASS 0x33500034
439#define AM335X_REV_ES1_0 AM335X_CLASS
440
389#define OMAP443X_CLASS 0x44300044 441#define OMAP443X_CLASS 0x44300044
390#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8)) 442#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
391#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8)) 443#define OMAP4430_REV_ES2_0 (OMAP443X_CLASS | (0x20 << 8))
392#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8)) 444#define OMAP4430_REV_ES2_1 (OMAP443X_CLASS | (0x21 << 8))
393#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8)) 445#define OMAP4430_REV_ES2_2 (OMAP443X_CLASS | (0x22 << 8))
446#define OMAP4430_REV_ES2_3 (OMAP443X_CLASS | (0x23 << 8))
394 447
395#define OMAP446X_CLASS 0x44600044 448#define OMAP446X_CLASS 0x44600044
396#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8)) 449#define OMAP4460_REV_ES1_0 (OMAP446X_CLASS | (0x10 << 8))
397 450
451#define OMAP447X_CLASS 0x44700044
452#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
453
398void omap2_check_revision(void); 454void omap2_check_revision(void);
399 455
400/* 456/*
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index e87efe1499b8..e897978371c2 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -286,6 +286,7 @@
286#include <plat/omap24xx.h> 286#include <plat/omap24xx.h>
287#include <plat/omap34xx.h> 287#include <plat/omap34xx.h>
288#include <plat/omap44xx.h> 288#include <plat/omap44xx.h>
289#include <plat/ti816x.h> 289#include <plat/ti81xx.h>
290#include <plat/am33xx.h>
290 291
291#endif /* __ASM_ARCH_OMAP_HARDWARE_H */ 292#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 1234944a4da0..0696bae1818b 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -73,6 +73,9 @@
73#define OMAP4_L3_IO_OFFSET 0xb4000000 73#define OMAP4_L3_IO_OFFSET 0xb4000000
74#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */ 74#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
75 75
76#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
77#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
78
76#define OMAP4_L3_PER_IO_OFFSET 0xb1100000 79#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
77#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET) 80#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
78 81
@@ -154,6 +157,15 @@
154#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ 157#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
155 158
156/* 159/*
160 * ----------------------------------------------------------------------------
161 * AM33XX specific IO mapping
162 * ----------------------------------------------------------------------------
163 */
164#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
165#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
166#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
167
168/*
157 * Need to look at the Size 4M for L4. 169 * Need to look at the Size 4M for L4.
158 * VPOM3430 was not working for Int controller 170 * VPOM3430 was not working for Int controller
159 */ 171 */
diff --git a/arch/arm/plat-omap/include/plat/iommu.h b/arch/arm/plat-omap/include/plat/iommu.h
index a1d79ee19250..88be3e628b33 100644
--- a/arch/arm/plat-omap/include/plat/iommu.h
+++ b/arch/arm/plat-omap/include/plat/iommu.h
@@ -111,6 +111,32 @@ struct iommu_platform_data {
111 u32 da_end; 111 u32 da_end;
112}; 112};
113 113
114/**
115 * struct iommu_arch_data - omap iommu private data
116 * @name: name of the iommu device
117 * @iommu_dev: handle of the iommu device
118 *
119 * This is an omap iommu private data object, which binds an iommu user
120 * to its iommu device. This object should be placed at the iommu user's
121 * dev_archdata so generic IOMMU API can be used without having to
122 * utilize omap-specific plumbing anymore.
123 */
124struct omap_iommu_arch_data {
125 const char *name;
126 struct omap_iommu *iommu_dev;
127};
128
129/**
130 * dev_to_omap_iommu() - retrieves an omap iommu object from a user device
131 * @dev: iommu client device
132 */
133static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
134{
135 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
136
137 return arch_data->iommu_dev;
138}
139
114/* IOMMU errors */ 140/* IOMMU errors */
115#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0) 141#define OMAP_IOMMU_ERR_TLB_MISS (1 << 0)
116#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1) 142#define OMAP_IOMMU_ERR_TRANS_FAULT (1 << 1)
@@ -163,8 +189,8 @@ extern int omap_iommu_set_isr(const char *name,
163 void *priv), 189 void *priv),
164 void *isr_priv); 190 void *isr_priv);
165 191
166extern void omap_iommu_save_ctx(struct omap_iommu *obj); 192extern void omap_iommu_save_ctx(struct device *dev);
167extern void omap_iommu_restore_ctx(struct omap_iommu *obj); 193extern void omap_iommu_restore_ctx(struct device *dev);
168 194
169extern int omap_install_iommu_arch(const struct iommu_functions *ops); 195extern int omap_install_iommu_arch(const struct iommu_functions *ops);
170extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops); 196extern void omap_uninstall_iommu_arch(const struct iommu_functions *ops);
@@ -176,6 +202,5 @@ extern ssize_t
176omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len); 202omap_iommu_dump_ctx(struct omap_iommu *obj, char *buf, ssize_t len);
177extern size_t 203extern size_t
178omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len); 204omap_dump_tlb_entries(struct omap_iommu *obj, char *buf, ssize_t len);
179struct device *omap_find_iommu_device(const char *name);
180 205
181#endif /* __MACH_IOMMU_H */ 206#endif /* __MACH_IOMMU_H */
diff --git a/arch/arm/plat-omap/include/plat/iovmm.h b/arch/arm/plat-omap/include/plat/iovmm.h
index 6af1a91c0f36..498e57cda6cd 100644
--- a/arch/arm/plat-omap/include/plat/iovmm.h
+++ b/arch/arm/plat-omap/include/plat/iovmm.h
@@ -72,18 +72,18 @@ struct iovm_struct {
72#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT)) 72#define IOVMF_DA_FIXED (1 << (4 + IOVMF_SW_SHIFT))
73 73
74 74
75extern struct iovm_struct *omap_find_iovm_area(struct omap_iommu *obj, u32 da); 75extern struct iovm_struct *omap_find_iovm_area(struct device *dev, u32 da);
76extern u32 76extern u32
77omap_iommu_vmap(struct iommu_domain *domain, struct omap_iommu *obj, u32 da, 77omap_iommu_vmap(struct iommu_domain *domain, struct device *dev, u32 da,
78 const struct sg_table *sgt, u32 flags); 78 const struct sg_table *sgt, u32 flags);
79extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain, 79extern struct sg_table *omap_iommu_vunmap(struct iommu_domain *domain,
80 struct omap_iommu *obj, u32 da); 80 struct device *dev, u32 da);
81extern u32 81extern u32
82omap_iommu_vmalloc(struct iommu_domain *domain, struct omap_iommu *obj, 82omap_iommu_vmalloc(struct iommu_domain *domain, struct device *dev,
83 u32 da, size_t bytes, u32 flags); 83 u32 da, size_t bytes, u32 flags);
84extern void 84extern void
85omap_iommu_vfree(struct iommu_domain *domain, struct omap_iommu *obj, 85omap_iommu_vfree(struct iommu_domain *domain, struct device *dev,
86 const u32 da); 86 const u32 da);
87extern void *omap_da_to_va(struct omap_iommu *obj, u32 da); 87extern void *omap_da_to_va(struct device *dev, u32 da);
88 88
89#endif /* __IOMMU_MMAP_H */ 89#endif /* __IOMMU_MMAP_H */
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index ebda7382c65b..2efd6454bce0 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -357,7 +357,7 @@
357#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69 357#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69
358#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70 358#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70
359#define INT_35XX_USBOTG_IRQ 71 359#define INT_35XX_USBOTG_IRQ 71
360#define INT_35XX_UART4 84 360#define INT_35XX_UART4_IRQ 84
361#define INT_35XX_CCDC_VD0_IRQ 88 361#define INT_35XX_CCDC_VD0_IRQ 88
362#define INT_35XX_CCDC_VD1_IRQ 92 362#define INT_35XX_CCDC_VD1_IRQ 92
363#define INT_35XX_CCDC_VD2_IRQ 93 363#define INT_35XX_CCDC_VD2_IRQ 93
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 94cf70afb236..f75946c3293d 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -96,6 +96,7 @@ struct omap_mmc_platform_data {
96 */ 96 */
97 u8 wires; /* Used for the MMC driver on omap1 and 2420 */ 97 u8 wires; /* Used for the MMC driver on omap1 and 2420 */
98 u32 caps; /* Used for the MMC driver on 2430 and later */ 98 u32 caps; /* Used for the MMC driver on 2430 and later */
99 u32 pm_caps; /* PM capabilities of the mmc */
99 100
100 /* 101 /*
101 * nomux means "standard" muxing is wrong on this board, and 102 * nomux means "standard" muxing is wrong on this board, and
diff --git a/arch/arm/plat-omap/include/plat/omap-secure.h b/arch/arm/plat-omap/include/plat/omap-secure.h
new file mode 100644
index 000000000000..64f9d1c7f1bb
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/omap-secure.h
@@ -0,0 +1,13 @@
1#ifndef __OMAP_SECURE_H__
2#define __OMAP_SECURE_H__
3
4#include <linux/types.h>
5
6#ifdef CONFIG_ARCH_OMAP2PLUS
7extern int omap_secure_ram_reserve_memblock(void);
8#else
9static inline void omap_secure_ram_reserve_memblock(void)
10{ }
11#endif
12
13#endif /* __OMAP_SECURE_H__ */
diff --git a/arch/arm/plat-omap/include/plat/omap-serial.h b/arch/arm/plat-omap/include/plat/omap-serial.h
index 2682043f5a5b..9ff444469f3d 100644
--- a/arch/arm/plat-omap/include/plat/omap-serial.h
+++ b/arch/arm/plat-omap/include/plat/omap-serial.h
@@ -19,6 +19,7 @@
19 19
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/pm_qos.h>
22 23
23#include <plat/mux.h> 24#include <plat/mux.h>
24 25
@@ -33,6 +34,8 @@
33 34
34#define OMAP_MODE13X_SPEED 230400 35#define OMAP_MODE13X_SPEED 230400
35 36
37#define OMAP_UART_SCR_TX_EMPTY 0x08
38
36/* WER = 0x7F 39/* WER = 0x7F
37 * Enable module level wakeup in WER reg 40 * Enable module level wakeup in WER reg
38 */ 41 */
@@ -51,18 +54,27 @@
51 54
52#define OMAP_UART_DMA_CH_FREE -1 55#define OMAP_UART_DMA_CH_FREE -1
53 56
54#define RX_TIMEOUT (3 * HZ)
55#define OMAP_MAX_HSUART_PORTS 4 57#define OMAP_MAX_HSUART_PORTS 4
56 58
57#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA 59#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
58 60
61#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
62#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
63
59struct omap_uart_port_info { 64struct omap_uart_port_info {
60 bool dma_enabled; /* To specify DMA Mode */ 65 bool dma_enabled; /* To specify DMA Mode */
61 unsigned int uartclk; /* UART clock rate */ 66 unsigned int uartclk; /* UART clock rate */
62 void __iomem *membase; /* ioremap cookie or NULL */
63 resource_size_t mapbase; /* resource base */
64 unsigned long irqflags; /* request_irq flags */
65 upf_t flags; /* UPF_* flags */ 67 upf_t flags; /* UPF_* flags */
68 u32 errata;
69 unsigned int dma_rx_buf_size;
70 unsigned int dma_rx_timeout;
71 unsigned int autosuspend_timeout;
72 unsigned int dma_rx_poll_rate;
73
74 int (*get_context_loss_count)(struct device *);
75 void (*set_forceidle)(struct platform_device *);
76 void (*set_noidle)(struct platform_device *);
77 void (*enable_wakeup)(struct platform_device *, bool);
66}; 78};
67 79
68struct uart_omap_dma { 80struct uart_omap_dma {
@@ -86,8 +98,9 @@ struct uart_omap_dma {
86 spinlock_t rx_lock; 98 spinlock_t rx_lock;
87 /* timer to poll activity on rx dma */ 99 /* timer to poll activity on rx dma */
88 struct timer_list rx_timer; 100 struct timer_list rx_timer;
89 int rx_buf_size; 101 unsigned int rx_buf_size;
90 int rx_timeout; 102 unsigned int rx_poll_rate;
103 unsigned int rx_timeout;
91}; 104};
92 105
93struct uart_omap_port { 106struct uart_omap_port {
@@ -100,6 +113,10 @@ struct uart_omap_port {
100 unsigned char mcr; 113 unsigned char mcr;
101 unsigned char fcr; 114 unsigned char fcr;
102 unsigned char efr; 115 unsigned char efr;
116 unsigned char dll;
117 unsigned char dlh;
118 unsigned char mdr1;
119 unsigned char scr;
103 120
104 int use_dma; 121 int use_dma;
105 /* 122 /*
@@ -111,6 +128,14 @@ struct uart_omap_port {
111 unsigned char msr_saved_flags; 128 unsigned char msr_saved_flags;
112 char name[20]; 129 char name[20];
113 unsigned long port_activity; 130 unsigned long port_activity;
131 u32 context_loss_cnt;
132 u32 errata;
133 u8 wakeups_enabled;
134
135 struct pm_qos_request pm_qos_request;
136 u32 latency;
137 u32 calc_latency;
138 struct work_struct qos_work;
114}; 139};
115 140
116#endif /* __OMAP_SERIAL_H__ */ 141#endif /* __OMAP_SERIAL_H__ */
diff --git a/arch/arm/plat-omap/include/plat/omap34xx.h b/arch/arm/plat-omap/include/plat/omap34xx.h
index b9e85886b9d6..0d818acf3917 100644
--- a/arch/arm/plat-omap/include/plat/omap34xx.h
+++ b/arch/arm/plat-omap/include/plat/omap34xx.h
@@ -35,6 +35,8 @@
35#define L4_EMU_34XX_BASE 0x54000000 35#define L4_EMU_34XX_BASE 0x54000000
36#define L3_34XX_BASE 0x68000000 36#define L3_34XX_BASE 0x68000000
37 37
38#define L4_WK_AM33XX_BASE 0x44C00000
39
38#define OMAP3430_32KSYNCT_BASE 0x48320000 40#define OMAP3430_32KSYNCT_BASE 0x48320000
39#define OMAP3430_CM_BASE 0x48004800 41#define OMAP3430_CM_BASE 0x48004800
40#define OMAP3430_PRM_BASE 0x48306800 42#define OMAP3430_PRM_BASE 0x48306800
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h
index ea2b8a6306e7..c0d478e55c84 100644
--- a/arch/arm/plat-omap/include/plat/omap44xx.h
+++ b/arch/arm/plat-omap/include/plat/omap44xx.h
@@ -45,6 +45,7 @@
45#define OMAP44XX_WKUPGEN_BASE 0x48281000 45#define OMAP44XX_WKUPGEN_BASE 0x48281000
46#define OMAP44XX_MCPDM_BASE 0x40132000 46#define OMAP44XX_MCPDM_BASE 0x40132000
47#define OMAP44XX_MCPDM_L3_BASE 0x49032000 47#define OMAP44XX_MCPDM_L3_BASE 0x49032000
48#define OMAP44XX_SAR_RAM_BASE 0x4a326000
48 49
49#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000) 50#define OMAP44XX_MAILBOX_BASE (L4_44XX_BASE + 0xF4000)
50#define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000) 51#define OMAP44XX_HSUSB_OTG_BASE (L4_44XX_BASE + 0xAB000)
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 8b372ede17c1..647010109afa 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -97,6 +97,7 @@ struct omap_hwmod_mux_info {
97 struct omap_device_pad *pads; 97 struct omap_device_pad *pads;
98 int nr_pads_dynamic; 98 int nr_pads_dynamic;
99 struct omap_device_pad **pads_dynamic; 99 struct omap_device_pad **pads_dynamic;
100 int *irqs;
100 bool enabled; 101 bool enabled;
101}; 102};
102 103
@@ -416,10 +417,13 @@ struct omap_hwmod_omap4_prcm {
416 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module 417 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
417 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP 418 * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
418 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached 419 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
420 * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) -
421 * causes the first call to _enable() to only update the pinmux
419 */ 422 */
420#define _HWMOD_NO_MPU_PORT (1 << 0) 423#define _HWMOD_NO_MPU_PORT (1 << 0)
421#define _HWMOD_WAKEUP_ENABLED (1 << 1) 424#define _HWMOD_WAKEUP_ENABLED (1 << 1)
422#define _HWMOD_SYSCONFIG_LOADED (1 << 2) 425#define _HWMOD_SYSCONFIG_LOADED (1 << 2)
426#define _HWMOD_SKIP_ENABLE (1 << 3)
423 427
424/* 428/*
425 * omap_hwmod._state definitions 429 * omap_hwmod._state definitions
@@ -604,6 +608,8 @@ int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
604 608
605int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); 609int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
606 610
611int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
612
607/* 613/*
608 * Chip variant-specific hwmod init routines - XXX should be converted 614 * Chip variant-specific hwmod init routines - XXX should be converted
609 * to use initcalls once the initial boot ordering is straightened out 615 * to use initcalls once the initial boot ordering is straightened out
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 1ab9fd6abe6d..198d1e6a4a6c 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -2,7 +2,7 @@
2 * arch/arm/plat-omap/include/mach/serial.h 2 * arch/arm/plat-omap/include/mach/serial.h
3 * 3 *
4 * Copyright (C) 2009 Texas Instruments 4 * Copyright (C) 2009 Texas Instruments
5 * Addded OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com> 5 * Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * 6 *
7 * This program is distributed in the hope that it will be useful, 7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -44,6 +44,7 @@
44#define OMAP3_UART2_BASE OMAP2_UART2_BASE 44#define OMAP3_UART2_BASE OMAP2_UART2_BASE
45#define OMAP3_UART3_BASE 0x49020000 45#define OMAP3_UART3_BASE 0x49020000
46#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */ 46#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
47#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
47 48
48/* OMAP4 serial ports */ 49/* OMAP4 serial ports */
49#define OMAP4_UART1_BASE OMAP2_UART1_BASE 50#define OMAP4_UART1_BASE OMAP2_UART1_BASE
@@ -51,10 +52,10 @@
51#define OMAP4_UART3_BASE 0x48020000 52#define OMAP4_UART3_BASE 0x48020000
52#define OMAP4_UART4_BASE 0x4806e000 53#define OMAP4_UART4_BASE 0x4806e000
53 54
54/* TI816X serial ports */ 55/* TI81XX serial ports */
55#define TI816X_UART1_BASE 0x48020000 56#define TI81XX_UART1_BASE 0x48020000
56#define TI816X_UART2_BASE 0x48022000 57#define TI81XX_UART2_BASE 0x48022000
57#define TI816X_UART3_BASE 0x48024000 58#define TI81XX_UART3_BASE 0x48024000
58 59
59/* AM3505/3517 UART4 */ 60/* AM3505/3517 UART4 */
60#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */ 61#define AM35XX_UART4_BASE 0x4809E000 /* Only on AM3505/3517 */
@@ -89,9 +90,9 @@
89#define OMAP4UART2 OMAP2UART2 90#define OMAP4UART2 OMAP2UART2
90#define OMAP4UART3 43 91#define OMAP4UART3 43
91#define OMAP4UART4 44 92#define OMAP4UART4 44
92#define TI816XUART1 81 93#define TI81XXUART1 81
93#define TI816XUART2 82 94#define TI81XXUART2 82
94#define TI816XUART3 83 95#define TI81XXUART3 83
95#define ZOOM_UART 95 /* Only on zoom2/3 */ 96#define ZOOM_UART 95 /* Only on zoom2/3 */
96 97
97/* This is only used by 8250.c for omap1510 */ 98/* This is only used by 8250.c for omap1510 */
@@ -106,15 +107,13 @@
106#ifndef __ASSEMBLER__ 107#ifndef __ASSEMBLER__
107 108
108struct omap_board_data; 109struct omap_board_data;
110struct omap_uart_port_info;
109 111
110extern void omap_serial_init(void); 112extern void omap_serial_init(void);
111extern void omap_serial_init_port(struct omap_board_data *bdata);
112extern int omap_uart_can_sleep(void); 113extern int omap_uart_can_sleep(void);
113extern void omap_uart_check_wakeup(void); 114extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
114extern void omap_uart_prepare_suspend(void); 115extern void omap_serial_init_port(struct omap_board_data *bdata,
115extern void omap_uart_prepare_idle(int num); 116 struct omap_uart_port_info *platform_data);
116extern void omap_uart_resume_idle(int num);
117extern void omap_uart_enable_irqs(int enable);
118#endif 117#endif
119 118
120#endif 119#endif
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
index f500fc34d065..75aa1b2bef51 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -95,6 +95,10 @@ static inline void omap_push_sram_idle(void) {}
95 */ 95 */
96#define OMAP2_SRAM_PA 0x40200000 96#define OMAP2_SRAM_PA 0x40200000
97#define OMAP3_SRAM_PA 0x40200000 97#define OMAP3_SRAM_PA 0x40200000
98#ifdef CONFIG_OMAP4_ERRATA_I688
99#define OMAP4_SRAM_PA 0x40304000
100#define OMAP4_SRAM_VA 0xfe404000
101#else
98#define OMAP4_SRAM_PA 0x40300000 102#define OMAP4_SRAM_PA 0x40300000
99 103#endif
100#endif 104#endif
diff --git a/arch/arm/plat-omap/include/plat/ti816x.h b/arch/arm/plat-omap/include/plat/ti81xx.h
index 50510f5dda1e..8f9843f78422 100644
--- a/arch/arm/plat-omap/include/plat/ti816x.h
+++ b/arch/arm/plat-omap/include/plat/ti81xx.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * This file contains the address data for various TI816X modules. 2 * This file contains the address data for various TI81XX modules.
3 * 3 *
4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ 4 * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
5 * 5 *
@@ -13,15 +13,15 @@
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 */ 14 */
15 15
16#ifndef __ASM_ARCH_TI816X_H 16#ifndef __ASM_ARCH_TI81XX_H
17#define __ASM_ARCH_TI816X_H 17#define __ASM_ARCH_TI81XX_H
18 18
19#define L4_SLOW_TI816X_BASE 0x48000000 19#define L4_SLOW_TI81XX_BASE 0x48000000
20 20
21#define TI816X_SCM_BASE 0x48140000 21#define TI81XX_SCM_BASE 0x48140000
22#define TI816X_CTRL_BASE TI816X_SCM_BASE 22#define TI81XX_CTRL_BASE TI81XX_SCM_BASE
23#define TI816X_PRCM_BASE 0x48180000 23#define TI81XX_PRCM_BASE 0x48180000
24 24
25#define TI816X_ARM_INTC_BASE 0x48200000 25#define TI81XX_ARM_INTC_BASE 0x48200000
26 26
27#endif /* __ASM_ARCH_TI816X_H */ 27#endif /* __ASM_ARCH_TI81XX_H */
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h
index 2f472e989ec6..6ee90495ca4c 100644
--- a/arch/arm/plat-omap/include/plat/uncompress.h
+++ b/arch/arm/plat-omap/include/plat/uncompress.h
@@ -99,9 +99,9 @@ static inline void flush(void)
99#define DEBUG_LL_ZOOM(mach) \ 99#define DEBUG_LL_ZOOM(mach) \
100 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART) 100 _DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
101 101
102#define DEBUG_LL_TI816X(p, mach) \ 102#define DEBUG_LL_TI81XX(p, mach) \
103 _DEBUG_LL_ENTRY(mach, TI816X_UART##p##_BASE, OMAP_PORT_SHIFT, \ 103 _DEBUG_LL_ENTRY(mach, TI81XX_UART##p##_BASE, OMAP_PORT_SHIFT, \
104 TI816XUART##p) 104 TI81XXUART##p)
105 105
106static inline void __arch_decomp_setup(unsigned long arch_id) 106static inline void __arch_decomp_setup(unsigned long arch_id)
107{ 107{
@@ -177,7 +177,10 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
177 DEBUG_LL_ZOOM(omap_zoom3); 177 DEBUG_LL_ZOOM(omap_zoom3);
178 178
179 /* TI8168 base boards using UART3 */ 179 /* TI8168 base boards using UART3 */
180 DEBUG_LL_TI816X(3, ti8168evm); 180 DEBUG_LL_TI81XX(3, ti8168evm);
181
182 /* TI8148 base boards using UART1 */
183 DEBUG_LL_TI81XX(1, ti8148evm);
181 184
182 } while (0); 185 } while (0);
183} 186}
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 17d3c939775c..dc864b580da0 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -100,9 +100,6 @@ extern void usb_musb_init(struct omap_musb_board_data *board_data);
100 100
101extern void usbhs_init(const struct usbhs_omap_board_data *pdata); 101extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
102 102
103extern int omap_usbhs_enable(struct device *dev);
104extern void omap_usbhs_disable(struct device *dev);
105
106extern int omap4430_phy_power(struct device *dev, int ID, int on); 103extern int omap4430_phy_power(struct device *dev, int ID, int on);
107extern int omap4430_phy_set_clk(struct device *dev, int on); 104extern int omap4430_phy_set_clk(struct device *dev, int on);
108extern int omap4430_phy_init(struct device *dev); 105extern int omap4430_phy_init(struct device *dev);
@@ -114,6 +111,7 @@ extern void am35x_musb_reset(void);
114extern void am35x_musb_phy_power(u8 on); 111extern void am35x_musb_phy_power(u8 on);
115extern void am35x_musb_clear_irq(void); 112extern void am35x_musb_clear_irq(void);
116extern void am35x_set_mode(u8 musb_mode); 113extern void am35x_set_mode(u8 musb_mode);
114extern void ti81xx_musb_phy_power(u8 on);
117 115
118/* 116/*
119 * FIXME correct answer depends on hmc_mode, 117 * FIXME correct answer depends on hmc_mode,
@@ -273,6 +271,37 @@ static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
273#define CONF2_OTGPWRDN (1 << 2) 271#define CONF2_OTGPWRDN (1 << 2)
274#define CONF2_DATPOL (1 << 1) 272#define CONF2_DATPOL (1 << 1)
275 273
274/* TI81XX specific definitions */
275#define USBCTRL0 0x620
276#define USBSTAT0 0x624
277
278/* TI816X PHY controls bits */
279#define TI816X_USBPHY0_NORMAL_MODE (1 << 0)
280#define TI816X_USBPHY_REFCLK_OSC (1 << 8)
281
282/* TI814X PHY controls bits */
283#define USBPHY_CM_PWRDN (1 << 0)
284#define USBPHY_OTG_PWRDN (1 << 1)
285#define USBPHY_CHGDET_DIS (1 << 2)
286#define USBPHY_CHGDET_RSTRT (1 << 3)
287#define USBPHY_SRCONDM (1 << 4)
288#define USBPHY_SINKONDP (1 << 5)
289#define USBPHY_CHGISINK_EN (1 << 6)
290#define USBPHY_CHGVSRC_EN (1 << 7)
291#define USBPHY_DMPULLUP (1 << 8)
292#define USBPHY_DPPULLUP (1 << 9)
293#define USBPHY_CDET_EXTCTL (1 << 10)
294#define USBPHY_GPIO_MODE (1 << 12)
295#define USBPHY_DPOPBUFCTL (1 << 13)
296#define USBPHY_DMOPBUFCTL (1 << 14)
297#define USBPHY_DPINPUT (1 << 15)
298#define USBPHY_DMINPUT (1 << 16)
299#define USBPHY_DPGPIO_PD (1 << 17)
300#define USBPHY_DMGPIO_PD (1 << 18)
301#define USBPHY_OTGVDET_EN (1 << 19)
302#define USBPHY_OTGSESSEND_EN (1 << 20)
303#define USBPHY_DATA_POLARITY (1 << 23)
304
276#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB) 305#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_USB)
277u32 omap1_usb0_init(unsigned nwires, unsigned is_device); 306u32 omap1_usb0_init(unsigned nwires, unsigned is_device);
278u32 omap1_usb1_init(unsigned nwires); 307u32 omap1_usb1_init(unsigned nwires);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 8b28664d1c62..4243bdcc87bc 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -40,7 +40,11 @@
40#define OMAP1_SRAM_PA 0x20000000 40#define OMAP1_SRAM_PA 0x20000000
41#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) 41#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
42#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000) 42#define OMAP3_SRAM_PUB_PA (OMAP3_SRAM_PA + 0x8000)
43#ifdef CONFIG_OMAP4_ERRATA_I688
44#define OMAP4_SRAM_PUB_PA OMAP4_SRAM_PA
45#else
43#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) 46#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
47#endif
44 48
45#if defined(CONFIG_ARCH_OMAP2PLUS) 49#if defined(CONFIG_ARCH_OMAP2PLUS)
46#define SRAM_BOOTLOADER_SZ 0x00 50#define SRAM_BOOTLOADER_SZ 0x00
@@ -141,11 +145,9 @@ static void __init omap_detect_sram(void)
141 omap_sram_size = 0x32000; /* 200K */ 145 omap_sram_size = 0x32000; /* 200K */
142 else if (cpu_is_omap15xx()) 146 else if (cpu_is_omap15xx())
143 omap_sram_size = 0x30000; /* 192K */ 147 omap_sram_size = 0x30000; /* 192K */
144 else if (cpu_is_omap1610() || cpu_is_omap1621() || 148 else if (cpu_is_omap1610() || cpu_is_omap1611() ||
145 cpu_is_omap1710()) 149 cpu_is_omap1621() || cpu_is_omap1710())
146 omap_sram_size = 0x4000; /* 16K */ 150 omap_sram_size = 0x4000; /* 16K */
147 else if (cpu_is_omap1611())
148 omap_sram_size = SZ_256K;
149 else { 151 else {
150 pr_err("Could not detect SRAM size\n"); 152 pr_err("Could not detect SRAM size\n");
151 omap_sram_size = 0x4000; 153 omap_sram_size = 0x4000;
@@ -163,6 +165,10 @@ static void __init omap_map_sram(void)
163 if (omap_sram_size == 0) 165 if (omap_sram_size == 0)
164 return; 166 return;
165 167
168#ifdef CONFIG_OMAP4_ERRATA_I688
169 omap_sram_start += PAGE_SIZE;
170 omap_sram_size -= SZ_16K;
171#endif
166 if (cpu_is_omap34xx()) { 172 if (cpu_is_omap34xx()) {
167 /* 173 /*
168 * SRAM must be marked as non-cached on OMAP3 since the 174 * SRAM must be marked as non-cached on OMAP3 since the
@@ -224,6 +230,9 @@ static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
224void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) 230void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
225{ 231{
226 BUG_ON(!_omap_sram_reprogram_clock); 232 BUG_ON(!_omap_sram_reprogram_clock);
233 /* On 730, bit 13 must always be 1 */
234 if (cpu_is_omap7xx())
235 ckctl |= 0x2000;
227 _omap_sram_reprogram_clock(dpllctl, ckctl); 236 _omap_sram_reprogram_clock(dpllctl, ckctl);
228} 237}
229 238
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-16 14:57:03 -0500