9 files changed, 142 insertions, 46 deletions

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 7fc8c045ad5d..06e9cbe8b8eb 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -310,41 +310,62 @@ EXPORT_SYMBOL(omap_set_dma_transfer_params);
 
 void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
 {
-        u16 w;
-
         BUG_ON(omap_dma_in_1510_mode());
 
-        if (cpu_class_is_omap2()) {
-                REVISIT_24XX();
-                return;
-        }
+        if (cpu_class_is_omap1()) {
+                u16 w;
 
-        w = dma_read(CCR2(lch));
-        w &= ~0x03;
+                w = dma_read(CCR2(lch));
+                w &= ~0x03;
 
-        switch (mode) {
-        case OMAP_DMA_CONSTANT_FILL:
-                w |= 0x01;
-                break;
-        case OMAP_DMA_TRANSPARENT_COPY:
-                w |= 0x02;
-                break;
-        case OMAP_DMA_COLOR_DIS:
-                break;
-        default:
-                BUG();
+                switch (mode) {
+                case OMAP_DMA_CONSTANT_FILL:
+                        w |= 0x01;
+                        break;
+                case OMAP_DMA_TRANSPARENT_COPY:
+                        w |= 0x02;
+                        break;
+                case OMAP_DMA_COLOR_DIS:
+                        break;
+                default:
+                        BUG();
+                }
+                dma_write(w, CCR2(lch));
+
+                w = dma_read(LCH_CTRL(lch));
+                w &= ~0x0f;
+                /* Default is channel type 2D */
+                if (mode) {
+                        dma_write((u16)color, COLOR_L(lch));
+                        dma_write((u16)(color >> 16), COLOR_U(lch));
+                        w |= 1;         /* Channel type G */
+                }
+                dma_write(w, LCH_CTRL(lch));
         }
-        dma_write(w, CCR2(lch));
 
-        w = dma_read(LCH_CTRL(lch));
-        w &= ~0x0f;
-        /* Default is channel type 2D */
-        if (mode) {
-                dma_write((u16)color, COLOR_L(lch));
-                dma_write((u16)(color >> 16), COLOR_U(lch));
-                w |= 1;         /* Channel type G */
+        if (cpu_class_is_omap2()) {
+                u32 val;
+
+                val = dma_read(CCR(lch));
+                val &= ~((1 << 17) | (1 << 16));
+
+                switch (mode) {
+                case OMAP_DMA_CONSTANT_FILL:
+                        val |= 1 << 16;
+                        break;
+                case OMAP_DMA_TRANSPARENT_COPY:
+                        val |= 1 << 17;
+                        break;
+                case OMAP_DMA_COLOR_DIS:
+                        break;
+                default:
+                        BUG();
+                }
+                dma_write(val, CCR(lch));
+
+                color &= 0xffffff;
+                dma_write(color, COLOR(lch));
         }
-        dma_write(w, LCH_CTRL(lch));
 }
 EXPORT_SYMBOL(omap_set_dma_color_mode);
 
@@ -1199,7 +1220,7 @@ static void create_dma_lch_chain(int lch_head, int lch_queue)
  *           Failure: -EINVAL/-ENOMEM
  */
 int omap_request_dma_chain(int dev_id, const char *dev_name,
-                           void (*callback) (int chain_id, u16 ch_status,
+                           void (*callback) (int lch, u16 ch_status,
                                              void *data),
                            int *chain_id, int no_of_chans, int chain_mode,
                            struct omap_dma_channel_params params)
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a303071d5e36..8b848391f0c8 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -5,7 +5,7 @@
  *
  * Copyright (C) 2007 Nokia Corporation.
  *
- * Contact: Jarkko Nikula <jarkko.nikula@nokia.com>
+ * Contact: Jarkko Nikula <jhnikula@gmail.com>
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
diff --git a/arch/arm/plat-omap/include/mach/dma.h b/arch/arm/plat-omap/include/mach/dma.h
index 54fe9665b182..19df76f97ab3 100644
--- a/arch/arm/plat-omap/include/mach/dma.h
+++ b/arch/arm/plat-omap/include/mach/dma.h
@@ -144,6 +144,7 @@
 #define OMAP_DMA4_CSSA_U(n)             0
 #define OMAP_DMA4_CDSA_L(n)             0
 #define OMAP_DMA4_CDSA_U(n)             0
+#define OMAP1_DMA_COLOR(n)              0
 
 /*----------------------------------------------------------------------------*/
 
@@ -531,7 +532,7 @@ extern int omap_get_dma_index(int lch, int *ei, int *fi);
 /* Chaining APIs */
 #ifndef CONFIG_ARCH_OMAP1
 extern int omap_request_dma_chain(int dev_id, const char *dev_name,
-                                  void (*callback) (int chain_id, u16 ch_status,
+                                  void (*callback) (int lch, u16 ch_status,
                                                     void *data),
                                   int *chain_id, int no_of_chans,
                                   int chain_mode,
diff --git a/arch/arm/plat-omap/include/mach/gpmc-smc91x.h b/arch/arm/plat-omap/include/mach/gpmc-smc91x.h
new file mode 100644
index 000000000000..b64fbee4d567
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/gpmc-smc91x.h
@@ -0,0 +1,42 @@
+/*
+ * arch/arm/plat-omap/include/mach/gpmc-smc91x.h
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_OMAP_GPMC_SMC91X_H__
+
+#define GPMC_TIMINGS_SMC91C96   (1 << 4)
+#define GPMC_MUX_ADD_DATA       (1 << 5) /* GPMC_CONFIG1_MUXADDDATA */
+#define GPMC_READ_MON           (1 << 6) /* GPMC_CONFIG1_WAIT_READ_MON */
+#define GPMC_WRITE_MON          (1 << 7) /* GPMC_CONFIG1_WAIT_WRITE_MON */
+
+struct omap_smc91x_platform_data {
+        int     cs;
+        int     gpio_irq;
+        int     gpio_pwrdwn;
+        int     gpio_reset;
+        int     wait_pin;       /* Optional GPMC_CONFIG1_WAITPINSELECT */
+        u32     flags;
+        int     (*retime)(void);
+};
+
+#if defined(CONFIG_SMC91X) || \
+        defined(CONFIG_SMC91X_MODULE)
+
+extern void gpmc_smc91x_init(struct omap_smc91x_platform_data *d);
+
+#else
+
+#define board_smc91x_data       NULL
+
+static inline void gpmc_smc91x_init(struct omap_smc91x_platform_data *d)
+{
+}
+
+#endif
+#endif
diff --git a/arch/arm/plat-omap/include/mach/hwa742.h b/arch/arm/plat-omap/include/mach/hwa742.h
index 577f492f2d3c..886248d32b49 100644
--- a/arch/arm/plat-omap/include/mach/hwa742.h
+++ b/arch/arm/plat-omap/include/mach/hwa742.h
@@ -2,10 +2,6 @@
 #define _HWA742_H
 
 struct hwa742_platform_data {
-        void            (*power_up)(struct device *dev);
-        void            (*power_down)(struct device *dev);
-        unsigned long   (*get_clock_rate)(struct device *dev);
-
         unsigned        te_connected:1;
 };
 
diff --git a/arch/arm/plat-omap/include/mach/onenand.h b/arch/arm/plat-omap/include/mach/onenand.h
index 4649d302c263..72f433d7d827 100644
--- a/arch/arm/plat-omap/include/mach/onenand.h
+++ b/arch/arm/plat-omap/include/mach/onenand.h
@@ -9,8 +9,12 @@
  * published by the Free Software Foundation.
  */
 
+#include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 
+#define ONENAND_SYNC_READ       (1 << 0)
+#define ONENAND_SYNC_READWRITE  (1 << 1)
+
 struct omap_onenand_platform_data {
         int                     cs;
         int                     gpio_irq;
@@ -18,8 +22,22 @@ struct omap_onenand_platform_data {
         int                     nr_parts;
         int                     (*onenand_setup)(void __iomem *, int freq);
         int                     dma_channel;
+        u8                      flags;
 };
 
-int omap2_onenand_rephase(void);
-
 #define ONENAND_MAX_PARTITIONS 8
+
+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+        defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
+
+extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
+
+#else
+
+#define board_onenand_data      NULL
+
+static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
+{
+}
+
+#endif
diff --git a/arch/arm/plat-omap/include/mach/vmalloc.h b/arch/arm/plat-omap/include/mach/vmalloc.h
index dc104cd96197..b97dfafeebda 100644
--- a/arch/arm/plat-omap/include/mach/vmalloc.h
+++ b/arch/arm/plat-omap/include/mach/vmalloc.h
@@ -17,5 +17,5 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
-#define VMALLOC_END       (PAGE_OFFSET + 0x10000000)
+#define VMALLOC_END       (PAGE_OFFSET + 0x18000000)
 
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 28b0a824b8cf..efa0e0111f38 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -91,11 +91,20 @@ static void omap_mcbsp_dump_reg(u8 id)
 static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
 {
         struct omap_mcbsp *mcbsp_tx = dev_id;
+        u16 irqst_spcr2;
 
-        dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n",
-                OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2));
+        irqst_spcr2 = OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2);
+        dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2);
 
-        complete(&mcbsp_tx->tx_irq_completion);
+        if (irqst_spcr2 & XSYNC_ERR) {
+                dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n",
+                        irqst_spcr2);
+                /* Writing zero to XSYNC_ERR clears the IRQ */
+                OMAP_MCBSP_WRITE(mcbsp_tx->io_base, SPCR2,
+                        irqst_spcr2 & ~(XSYNC_ERR));
+        } else {
+                complete(&mcbsp_tx->tx_irq_completion);
+        }
 
         return IRQ_HANDLED;
 }
@@ -103,11 +112,20 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
 static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
 {
         struct omap_mcbsp *mcbsp_rx = dev_id;
+        u16 irqst_spcr1;
 
-        dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n",
-                OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2));
+        irqst_spcr1 = OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR1);
+        dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1);
 
-        complete(&mcbsp_rx->rx_irq_completion);
+        if (irqst_spcr1 & RSYNC_ERR) {
+                dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n",
+                        irqst_spcr1);
+                /* Writing zero to RSYNC_ERR clears the IRQ */
+                OMAP_MCBSP_WRITE(mcbsp_rx->io_base, SPCR1,
+                        irqst_spcr1 & ~(RSYNC_ERR));
+        } else {
+                complete(&mcbsp_rx->tx_irq_completion);
+        }
 
         return IRQ_HANDLED;
 }
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 4f0145d26246..bd44d1a9df9c 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -38,8 +38,8 @@
 #define OMAP1_SRAM_VA           VMALLOC_END
 #define OMAP2_SRAM_PA           0x40200000
 #define OMAP2_SRAM_PUB_PA       0x4020f800
-#define OMAP2_SRAM_VA           VMALLOC_END
-#define OMAP2_SRAM_PUB_VA       (VMALLOC_END + 0x800)
+#define OMAP2_SRAM_VA           0xe3000000
+#define OMAP2_SRAM_PUB_VA       (OMAP2_SRAM_VA + 0x800)
 #define OMAP3_SRAM_PA           0x40200000
 #define OMAP3_SRAM_VA           0xd7000000
 #define OMAP3_SRAM_PUB_PA       0x40208000