diff options
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/fb.c | 49 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/display.h | 575 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omapfb.h | 398 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/sdrc.h | 9 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/vram.h | 62 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/vrfb.h | 50 | ||||
-rw-r--r-- | arch/arm/plat-omap/sram.c | 8 |
7 files changed, 750 insertions, 401 deletions
diff --git a/arch/arm/plat-omap/fb.c b/arch/arm/plat-omap/fb.c index 78a4ce538dbd..d3eea4f47533 100644 --- a/arch/arm/plat-omap/fb.c +++ b/arch/arm/plat-omap/fb.c | |||
@@ -28,13 +28,13 @@ | |||
28 | #include <linux/platform_device.h> | 28 | #include <linux/platform_device.h> |
29 | #include <linux/bootmem.h> | 29 | #include <linux/bootmem.h> |
30 | #include <linux/io.h> | 30 | #include <linux/io.h> |
31 | #include <linux/omapfb.h> | ||
31 | 32 | ||
32 | #include <mach/hardware.h> | 33 | #include <mach/hardware.h> |
33 | #include <asm/mach/map.h> | 34 | #include <asm/mach/map.h> |
34 | 35 | ||
35 | #include <plat/board.h> | 36 | #include <plat/board.h> |
36 | #include <plat/sram.h> | 37 | #include <plat/sram.h> |
37 | #include <plat/omapfb.h> | ||
38 | 38 | ||
39 | #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) | 39 | #if defined(CONFIG_FB_OMAP) || defined(CONFIG_FB_OMAP_MODULE) |
40 | 40 | ||
@@ -55,6 +55,10 @@ static struct platform_device omap_fb_device = { | |||
55 | .num_resources = 0, | 55 | .num_resources = 0, |
56 | }; | 56 | }; |
57 | 57 | ||
58 | void omapfb_set_platform_data(struct omapfb_platform_data *data) | ||
59 | { | ||
60 | } | ||
61 | |||
58 | static inline int ranges_overlap(unsigned long start1, unsigned long size1, | 62 | static inline int ranges_overlap(unsigned long start1, unsigned long size1, |
59 | unsigned long start2, unsigned long size2) | 63 | unsigned long start2, unsigned long size2) |
60 | { | 64 | { |
@@ -327,7 +331,33 @@ static inline int omap_init_fb(void) | |||
327 | 331 | ||
328 | arch_initcall(omap_init_fb); | 332 | arch_initcall(omap_init_fb); |
329 | 333 | ||
330 | #else | 334 | #elif defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) |
335 | |||
336 | static u64 omap_fb_dma_mask = ~(u32)0; | ||
337 | static struct omapfb_platform_data omapfb_config; | ||
338 | |||
339 | static struct platform_device omap_fb_device = { | ||
340 | .name = "omapfb", | ||
341 | .id = -1, | ||
342 | .dev = { | ||
343 | .dma_mask = &omap_fb_dma_mask, | ||
344 | .coherent_dma_mask = ~(u32)0, | ||
345 | .platform_data = &omapfb_config, | ||
346 | }, | ||
347 | .num_resources = 0, | ||
348 | }; | ||
349 | |||
350 | void omapfb_set_platform_data(struct omapfb_platform_data *data) | ||
351 | { | ||
352 | omapfb_config = *data; | ||
353 | } | ||
354 | |||
355 | static inline int omap_init_fb(void) | ||
356 | { | ||
357 | return platform_device_register(&omap_fb_device); | ||
358 | } | ||
359 | |||
360 | arch_initcall(omap_init_fb); | ||
331 | 361 | ||
332 | void omapfb_reserve_sdram(void) {} | 362 | void omapfb_reserve_sdram(void) {} |
333 | unsigned long omapfb_reserve_sram(unsigned long sram_pstart, | 363 | unsigned long omapfb_reserve_sram(unsigned long sram_pstart, |
@@ -339,5 +369,20 @@ unsigned long omapfb_reserve_sram(unsigned long sram_pstart, | |||
339 | return 0; | 369 | return 0; |
340 | } | 370 | } |
341 | 371 | ||
372 | #else | ||
373 | |||
374 | void omapfb_set_platform_data(struct omapfb_platform_data *data) | ||
375 | { | ||
376 | } | ||
377 | |||
378 | void omapfb_reserve_sdram(void) {} | ||
379 | unsigned long omapfb_reserve_sram(unsigned long sram_pstart, | ||
380 | unsigned long sram_vstart, | ||
381 | unsigned long sram_size, | ||
382 | unsigned long start_avail, | ||
383 | unsigned long size_avail) | ||
384 | { | ||
385 | return 0; | ||
386 | } | ||
342 | 387 | ||
343 | #endif | 388 | #endif |
diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h new file mode 100644 index 000000000000..c66e464732df --- /dev/null +++ b/arch/arm/plat-omap/include/plat/display.h | |||
@@ -0,0 +1,575 @@ | |||
1 | /* | ||
2 | * linux/include/asm-arm/arch-omap/display.h | ||
3 | * | ||
4 | * Copyright (C) 2008 Nokia Corporation | ||
5 | * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License version 2 as published by | ||
9 | * the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | * more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along with | ||
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | ||
18 | */ | ||
19 | |||
20 | #ifndef __ASM_ARCH_OMAP_DISPLAY_H | ||
21 | #define __ASM_ARCH_OMAP_DISPLAY_H | ||
22 | |||
23 | #include <linux/list.h> | ||
24 | #include <linux/kobject.h> | ||
25 | #include <linux/device.h> | ||
26 | #include <asm/atomic.h> | ||
27 | |||
28 | #define DISPC_IRQ_FRAMEDONE (1 << 0) | ||
29 | #define DISPC_IRQ_VSYNC (1 << 1) | ||
30 | #define DISPC_IRQ_EVSYNC_EVEN (1 << 2) | ||
31 | #define DISPC_IRQ_EVSYNC_ODD (1 << 3) | ||
32 | #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4) | ||
33 | #define DISPC_IRQ_PROG_LINE_NUM (1 << 5) | ||
34 | #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6) | ||
35 | #define DISPC_IRQ_GFX_END_WIN (1 << 7) | ||
36 | #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8) | ||
37 | #define DISPC_IRQ_OCP_ERR (1 << 9) | ||
38 | #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10) | ||
39 | #define DISPC_IRQ_VID1_END_WIN (1 << 11) | ||
40 | #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12) | ||
41 | #define DISPC_IRQ_VID2_END_WIN (1 << 13) | ||
42 | #define DISPC_IRQ_SYNC_LOST (1 << 14) | ||
43 | #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15) | ||
44 | #define DISPC_IRQ_WAKEUP (1 << 16) | ||
45 | |||
46 | struct omap_dss_device; | ||
47 | struct omap_overlay_manager; | ||
48 | |||
49 | enum omap_display_type { | ||
50 | OMAP_DISPLAY_TYPE_NONE = 0, | ||
51 | OMAP_DISPLAY_TYPE_DPI = 1 << 0, | ||
52 | OMAP_DISPLAY_TYPE_DBI = 1 << 1, | ||
53 | OMAP_DISPLAY_TYPE_SDI = 1 << 2, | ||
54 | OMAP_DISPLAY_TYPE_DSI = 1 << 3, | ||
55 | OMAP_DISPLAY_TYPE_VENC = 1 << 4, | ||
56 | }; | ||
57 | |||
58 | enum omap_plane { | ||
59 | OMAP_DSS_GFX = 0, | ||
60 | OMAP_DSS_VIDEO1 = 1, | ||
61 | OMAP_DSS_VIDEO2 = 2 | ||
62 | }; | ||
63 | |||
64 | enum omap_channel { | ||
65 | OMAP_DSS_CHANNEL_LCD = 0, | ||
66 | OMAP_DSS_CHANNEL_DIGIT = 1, | ||
67 | }; | ||
68 | |||
69 | enum omap_color_mode { | ||
70 | OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */ | ||
71 | OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */ | ||
72 | OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */ | ||
73 | OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */ | ||
74 | OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */ | ||
75 | OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */ | ||
76 | OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */ | ||
77 | OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */ | ||
78 | OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */ | ||
79 | OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */ | ||
80 | OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */ | ||
81 | OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */ | ||
82 | OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */ | ||
83 | OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */ | ||
84 | |||
85 | OMAP_DSS_COLOR_GFX_OMAP2 = | ||
86 | OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | | ||
87 | OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | | ||
88 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | | ||
89 | OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P, | ||
90 | |||
91 | OMAP_DSS_COLOR_VID_OMAP2 = | ||
92 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | | ||
93 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | | ||
94 | OMAP_DSS_COLOR_UYVY, | ||
95 | |||
96 | OMAP_DSS_COLOR_GFX_OMAP3 = | ||
97 | OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 | | ||
98 | OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 | | ||
99 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | | ||
100 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | | ||
101 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 | | ||
102 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, | ||
103 | |||
104 | OMAP_DSS_COLOR_VID1_OMAP3 = | ||
105 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 | | ||
106 | OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P | | ||
107 | OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY, | ||
108 | |||
109 | OMAP_DSS_COLOR_VID2_OMAP3 = | ||
110 | OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 | | ||
111 | OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U | | ||
112 | OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 | | ||
113 | OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 | | ||
114 | OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32, | ||
115 | }; | ||
116 | |||
117 | enum omap_lcd_display_type { | ||
118 | OMAP_DSS_LCD_DISPLAY_STN, | ||
119 | OMAP_DSS_LCD_DISPLAY_TFT, | ||
120 | }; | ||
121 | |||
122 | enum omap_dss_load_mode { | ||
123 | OMAP_DSS_LOAD_CLUT_AND_FRAME = 0, | ||
124 | OMAP_DSS_LOAD_CLUT_ONLY = 1, | ||
125 | OMAP_DSS_LOAD_FRAME_ONLY = 2, | ||
126 | OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3, | ||
127 | }; | ||
128 | |||
129 | enum omap_dss_trans_key_type { | ||
130 | OMAP_DSS_COLOR_KEY_GFX_DST = 0, | ||
131 | OMAP_DSS_COLOR_KEY_VID_SRC = 1, | ||
132 | }; | ||
133 | |||
134 | enum omap_rfbi_te_mode { | ||
135 | OMAP_DSS_RFBI_TE_MODE_1 = 1, | ||
136 | OMAP_DSS_RFBI_TE_MODE_2 = 2, | ||
137 | }; | ||
138 | |||
139 | enum omap_panel_config { | ||
140 | OMAP_DSS_LCD_IVS = 1<<0, | ||
141 | OMAP_DSS_LCD_IHS = 1<<1, | ||
142 | OMAP_DSS_LCD_IPC = 1<<2, | ||
143 | OMAP_DSS_LCD_IEO = 1<<3, | ||
144 | OMAP_DSS_LCD_RF = 1<<4, | ||
145 | OMAP_DSS_LCD_ONOFF = 1<<5, | ||
146 | |||
147 | OMAP_DSS_LCD_TFT = 1<<20, | ||
148 | }; | ||
149 | |||
150 | enum omap_dss_venc_type { | ||
151 | OMAP_DSS_VENC_TYPE_COMPOSITE, | ||
152 | OMAP_DSS_VENC_TYPE_SVIDEO, | ||
153 | }; | ||
154 | |||
155 | enum omap_display_caps { | ||
156 | OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0, | ||
157 | OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1, | ||
158 | }; | ||
159 | |||
160 | enum omap_dss_update_mode { | ||
161 | OMAP_DSS_UPDATE_DISABLED = 0, | ||
162 | OMAP_DSS_UPDATE_AUTO, | ||
163 | OMAP_DSS_UPDATE_MANUAL, | ||
164 | }; | ||
165 | |||
166 | enum omap_dss_display_state { | ||
167 | OMAP_DSS_DISPLAY_DISABLED = 0, | ||
168 | OMAP_DSS_DISPLAY_ACTIVE, | ||
169 | OMAP_DSS_DISPLAY_SUSPENDED, | ||
170 | }; | ||
171 | |||
172 | /* XXX perhaps this should be removed */ | ||
173 | enum omap_dss_overlay_managers { | ||
174 | OMAP_DSS_OVL_MGR_LCD, | ||
175 | OMAP_DSS_OVL_MGR_TV, | ||
176 | }; | ||
177 | |||
178 | enum omap_dss_rotation_type { | ||
179 | OMAP_DSS_ROT_DMA = 0, | ||
180 | OMAP_DSS_ROT_VRFB = 1, | ||
181 | }; | ||
182 | |||
183 | /* clockwise rotation angle */ | ||
184 | enum omap_dss_rotation_angle { | ||
185 | OMAP_DSS_ROT_0 = 0, | ||
186 | OMAP_DSS_ROT_90 = 1, | ||
187 | OMAP_DSS_ROT_180 = 2, | ||
188 | OMAP_DSS_ROT_270 = 3, | ||
189 | }; | ||
190 | |||
191 | enum omap_overlay_caps { | ||
192 | OMAP_DSS_OVL_CAP_SCALE = 1 << 0, | ||
193 | OMAP_DSS_OVL_CAP_DISPC = 1 << 1, | ||
194 | }; | ||
195 | |||
196 | enum omap_overlay_manager_caps { | ||
197 | OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0, | ||
198 | }; | ||
199 | |||
200 | /* RFBI */ | ||
201 | |||
202 | struct rfbi_timings { | ||
203 | int cs_on_time; | ||
204 | int cs_off_time; | ||
205 | int we_on_time; | ||
206 | int we_off_time; | ||
207 | int re_on_time; | ||
208 | int re_off_time; | ||
209 | int we_cycle_time; | ||
210 | int re_cycle_time; | ||
211 | int cs_pulse_width; | ||
212 | int access_time; | ||
213 | |||
214 | int clk_div; | ||
215 | |||
216 | u32 tim[5]; /* set by rfbi_convert_timings() */ | ||
217 | |||
218 | int converted; | ||
219 | }; | ||
220 | |||
221 | void omap_rfbi_write_command(const void *buf, u32 len); | ||
222 | void omap_rfbi_read_data(void *buf, u32 len); | ||
223 | void omap_rfbi_write_data(const void *buf, u32 len); | ||
224 | void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width, | ||
225 | u16 x, u16 y, | ||
226 | u16 w, u16 h); | ||
227 | int omap_rfbi_enable_te(bool enable, unsigned line); | ||
228 | int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode, | ||
229 | unsigned hs_pulse_time, unsigned vs_pulse_time, | ||
230 | int hs_pol_inv, int vs_pol_inv, int extif_div); | ||
231 | |||
232 | /* DSI */ | ||
233 | void dsi_bus_lock(void); | ||
234 | void dsi_bus_unlock(void); | ||
235 | int dsi_vc_dcs_write(int channel, u8 *data, int len); | ||
236 | int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len); | ||
237 | int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen); | ||
238 | int dsi_vc_set_max_rx_packet_size(int channel, u16 len); | ||
239 | int dsi_vc_send_null(int channel); | ||
240 | int dsi_vc_send_bta_sync(int channel); | ||
241 | |||
242 | /* Board specific data */ | ||
243 | struct omap_dss_board_info { | ||
244 | int (*get_last_off_on_transaction_id)(struct device *dev); | ||
245 | int num_devices; | ||
246 | struct omap_dss_device **devices; | ||
247 | struct omap_dss_device *default_device; | ||
248 | }; | ||
249 | |||
250 | struct omap_video_timings { | ||
251 | /* Unit: pixels */ | ||
252 | u16 x_res; | ||
253 | /* Unit: pixels */ | ||
254 | u16 y_res; | ||
255 | /* Unit: KHz */ | ||
256 | u32 pixel_clock; | ||
257 | /* Unit: pixel clocks */ | ||
258 | u16 hsw; /* Horizontal synchronization pulse width */ | ||
259 | /* Unit: pixel clocks */ | ||
260 | u16 hfp; /* Horizontal front porch */ | ||
261 | /* Unit: pixel clocks */ | ||
262 | u16 hbp; /* Horizontal back porch */ | ||
263 | /* Unit: line clocks */ | ||
264 | u16 vsw; /* Vertical synchronization pulse width */ | ||
265 | /* Unit: line clocks */ | ||
266 | u16 vfp; /* Vertical front porch */ | ||
267 | /* Unit: line clocks */ | ||
268 | u16 vbp; /* Vertical back porch */ | ||
269 | }; | ||
270 | |||
271 | #ifdef CONFIG_OMAP2_DSS_VENC | ||
272 | /* Hardcoded timings for tv modes. Venc only uses these to | ||
273 | * identify the mode, and does not actually use the configs | ||
274 | * itself. However, the configs should be something that | ||
275 | * a normal monitor can also show */ | ||
276 | const extern struct omap_video_timings omap_dss_pal_timings; | ||
277 | const extern struct omap_video_timings omap_dss_ntsc_timings; | ||
278 | #endif | ||
279 | |||
280 | struct omap_overlay_info { | ||
281 | bool enabled; | ||
282 | |||
283 | u32 paddr; | ||
284 | void __iomem *vaddr; | ||
285 | u16 screen_width; | ||
286 | u16 width; | ||
287 | u16 height; | ||
288 | enum omap_color_mode color_mode; | ||
289 | u8 rotation; | ||
290 | enum omap_dss_rotation_type rotation_type; | ||
291 | bool mirror; | ||
292 | |||
293 | u16 pos_x; | ||
294 | u16 pos_y; | ||
295 | u16 out_width; /* if 0, out_width == width */ | ||
296 | u16 out_height; /* if 0, out_height == height */ | ||
297 | u8 global_alpha; | ||
298 | }; | ||
299 | |||
300 | struct omap_overlay { | ||
301 | struct kobject kobj; | ||
302 | struct list_head list; | ||
303 | |||
304 | /* static fields */ | ||
305 | const char *name; | ||
306 | int id; | ||
307 | enum omap_color_mode supported_modes; | ||
308 | enum omap_overlay_caps caps; | ||
309 | |||
310 | /* dynamic fields */ | ||
311 | struct omap_overlay_manager *manager; | ||
312 | struct omap_overlay_info info; | ||
313 | |||
314 | /* if true, info has been changed, but not applied() yet */ | ||
315 | bool info_dirty; | ||
316 | |||
317 | int (*set_manager)(struct omap_overlay *ovl, | ||
318 | struct omap_overlay_manager *mgr); | ||
319 | int (*unset_manager)(struct omap_overlay *ovl); | ||
320 | |||
321 | int (*set_overlay_info)(struct omap_overlay *ovl, | ||
322 | struct omap_overlay_info *info); | ||
323 | void (*get_overlay_info)(struct omap_overlay *ovl, | ||
324 | struct omap_overlay_info *info); | ||
325 | |||
326 | int (*wait_for_go)(struct omap_overlay *ovl); | ||
327 | }; | ||
328 | |||
329 | struct omap_overlay_manager_info { | ||
330 | u32 default_color; | ||
331 | |||
332 | enum omap_dss_trans_key_type trans_key_type; | ||
333 | u32 trans_key; | ||
334 | bool trans_enabled; | ||
335 | |||
336 | bool alpha_enabled; | ||
337 | }; | ||
338 | |||
339 | struct omap_overlay_manager { | ||
340 | struct kobject kobj; | ||
341 | struct list_head list; | ||
342 | |||
343 | /* static fields */ | ||
344 | const char *name; | ||
345 | int id; | ||
346 | enum omap_overlay_manager_caps caps; | ||
347 | int num_overlays; | ||
348 | struct omap_overlay **overlays; | ||
349 | enum omap_display_type supported_displays; | ||
350 | |||
351 | /* dynamic fields */ | ||
352 | struct omap_dss_device *device; | ||
353 | struct omap_overlay_manager_info info; | ||
354 | |||
355 | bool device_changed; | ||
356 | /* if true, info has been changed but not applied() yet */ | ||
357 | bool info_dirty; | ||
358 | |||
359 | int (*set_device)(struct omap_overlay_manager *mgr, | ||
360 | struct omap_dss_device *dssdev); | ||
361 | int (*unset_device)(struct omap_overlay_manager *mgr); | ||
362 | |||
363 | int (*set_manager_info)(struct omap_overlay_manager *mgr, | ||
364 | struct omap_overlay_manager_info *info); | ||
365 | void (*get_manager_info)(struct omap_overlay_manager *mgr, | ||
366 | struct omap_overlay_manager_info *info); | ||
367 | |||
368 | int (*apply)(struct omap_overlay_manager *mgr); | ||
369 | int (*wait_for_go)(struct omap_overlay_manager *mgr); | ||
370 | }; | ||
371 | |||
372 | struct omap_dss_device { | ||
373 | struct device dev; | ||
374 | |||
375 | enum omap_display_type type; | ||
376 | |||
377 | union { | ||
378 | struct { | ||
379 | u8 data_lines; | ||
380 | } dpi; | ||
381 | |||
382 | struct { | ||
383 | u8 channel; | ||
384 | u8 data_lines; | ||
385 | } rfbi; | ||
386 | |||
387 | struct { | ||
388 | u8 datapairs; | ||
389 | } sdi; | ||
390 | |||
391 | struct { | ||
392 | u8 clk_lane; | ||
393 | u8 clk_pol; | ||
394 | u8 data1_lane; | ||
395 | u8 data1_pol; | ||
396 | u8 data2_lane; | ||
397 | u8 data2_pol; | ||
398 | |||
399 | struct { | ||
400 | u16 regn; | ||
401 | u16 regm; | ||
402 | u16 regm3; | ||
403 | u16 regm4; | ||
404 | |||
405 | u16 lp_clk_div; | ||
406 | |||
407 | u16 lck_div; | ||
408 | u16 pck_div; | ||
409 | } div; | ||
410 | |||
411 | bool ext_te; | ||
412 | u8 ext_te_gpio; | ||
413 | } dsi; | ||
414 | |||
415 | struct { | ||
416 | enum omap_dss_venc_type type; | ||
417 | bool invert_polarity; | ||
418 | } venc; | ||
419 | } phy; | ||
420 | |||
421 | struct { | ||
422 | struct omap_video_timings timings; | ||
423 | |||
424 | int acbi; /* ac-bias pin transitions per interrupt */ | ||
425 | /* Unit: line clocks */ | ||
426 | int acb; /* ac-bias pin frequency */ | ||
427 | |||
428 | enum omap_panel_config config; | ||
429 | |||
430 | u8 recommended_bpp; | ||
431 | |||
432 | struct omap_dss_device *ctrl; | ||
433 | } panel; | ||
434 | |||
435 | struct { | ||
436 | u8 pixel_size; | ||
437 | struct rfbi_timings rfbi_timings; | ||
438 | struct omap_dss_device *panel; | ||
439 | } ctrl; | ||
440 | |||
441 | int reset_gpio; | ||
442 | |||
443 | int max_backlight_level; | ||
444 | |||
445 | const char *name; | ||
446 | |||
447 | /* used to match device to driver */ | ||
448 | const char *driver_name; | ||
449 | |||
450 | void *data; | ||
451 | |||
452 | struct omap_dss_driver *driver; | ||
453 | |||
454 | /* helper variable for driver suspend/resume */ | ||
455 | bool activate_after_resume; | ||
456 | |||
457 | enum omap_display_caps caps; | ||
458 | |||
459 | struct omap_overlay_manager *manager; | ||
460 | |||
461 | enum omap_dss_display_state state; | ||
462 | |||
463 | int (*enable)(struct omap_dss_device *dssdev); | ||
464 | void (*disable)(struct omap_dss_device *dssdev); | ||
465 | |||
466 | int (*suspend)(struct omap_dss_device *dssdev); | ||
467 | int (*resume)(struct omap_dss_device *dssdev); | ||
468 | |||
469 | void (*get_resolution)(struct omap_dss_device *dssdev, | ||
470 | u16 *xres, u16 *yres); | ||
471 | int (*get_recommended_bpp)(struct omap_dss_device *dssdev); | ||
472 | |||
473 | int (*check_timings)(struct omap_dss_device *dssdev, | ||
474 | struct omap_video_timings *timings); | ||
475 | void (*set_timings)(struct omap_dss_device *dssdev, | ||
476 | struct omap_video_timings *timings); | ||
477 | void (*get_timings)(struct omap_dss_device *dssdev, | ||
478 | struct omap_video_timings *timings); | ||
479 | int (*update)(struct omap_dss_device *dssdev, | ||
480 | u16 x, u16 y, u16 w, u16 h); | ||
481 | int (*sync)(struct omap_dss_device *dssdev); | ||
482 | int (*wait_vsync)(struct omap_dss_device *dssdev); | ||
483 | |||
484 | int (*set_update_mode)(struct omap_dss_device *dssdev, | ||
485 | enum omap_dss_update_mode); | ||
486 | enum omap_dss_update_mode (*get_update_mode) | ||
487 | (struct omap_dss_device *dssdev); | ||
488 | |||
489 | int (*enable_te)(struct omap_dss_device *dssdev, bool enable); | ||
490 | int (*get_te)(struct omap_dss_device *dssdev); | ||
491 | |||
492 | u8 (*get_rotate)(struct omap_dss_device *dssdev); | ||
493 | int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate); | ||
494 | |||
495 | bool (*get_mirror)(struct omap_dss_device *dssdev); | ||
496 | int (*set_mirror)(struct omap_dss_device *dssdev, bool enable); | ||
497 | |||
498 | int (*run_test)(struct omap_dss_device *dssdev, int test); | ||
499 | int (*memory_read)(struct omap_dss_device *dssdev, | ||
500 | void *buf, size_t size, | ||
501 | u16 x, u16 y, u16 w, u16 h); | ||
502 | |||
503 | int (*set_wss)(struct omap_dss_device *dssdev, u32 wss); | ||
504 | u32 (*get_wss)(struct omap_dss_device *dssdev); | ||
505 | |||
506 | /* platform specific */ | ||
507 | int (*platform_enable)(struct omap_dss_device *dssdev); | ||
508 | void (*platform_disable)(struct omap_dss_device *dssdev); | ||
509 | int (*set_backlight)(struct omap_dss_device *dssdev, int level); | ||
510 | int (*get_backlight)(struct omap_dss_device *dssdev); | ||
511 | }; | ||
512 | |||
513 | struct omap_dss_driver { | ||
514 | struct device_driver driver; | ||
515 | |||
516 | int (*probe)(struct omap_dss_device *); | ||
517 | void (*remove)(struct omap_dss_device *); | ||
518 | |||
519 | int (*enable)(struct omap_dss_device *display); | ||
520 | void (*disable)(struct omap_dss_device *display); | ||
521 | int (*suspend)(struct omap_dss_device *display); | ||
522 | int (*resume)(struct omap_dss_device *display); | ||
523 | int (*run_test)(struct omap_dss_device *display, int test); | ||
524 | |||
525 | void (*setup_update)(struct omap_dss_device *dssdev, | ||
526 | u16 x, u16 y, u16 w, u16 h); | ||
527 | |||
528 | int (*enable_te)(struct omap_dss_device *dssdev, bool enable); | ||
529 | int (*wait_for_te)(struct omap_dss_device *dssdev); | ||
530 | |||
531 | u8 (*get_rotate)(struct omap_dss_device *dssdev); | ||
532 | int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate); | ||
533 | |||
534 | bool (*get_mirror)(struct omap_dss_device *dssdev); | ||
535 | int (*set_mirror)(struct omap_dss_device *dssdev, bool enable); | ||
536 | |||
537 | int (*memory_read)(struct omap_dss_device *dssdev, | ||
538 | void *buf, size_t size, | ||
539 | u16 x, u16 y, u16 w, u16 h); | ||
540 | }; | ||
541 | |||
542 | int omap_dss_register_driver(struct omap_dss_driver *); | ||
543 | void omap_dss_unregister_driver(struct omap_dss_driver *); | ||
544 | |||
545 | int omap_dss_register_device(struct omap_dss_device *); | ||
546 | void omap_dss_unregister_device(struct omap_dss_device *); | ||
547 | |||
548 | void omap_dss_get_device(struct omap_dss_device *dssdev); | ||
549 | void omap_dss_put_device(struct omap_dss_device *dssdev); | ||
550 | #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL) | ||
551 | struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from); | ||
552 | struct omap_dss_device *omap_dss_find_device(void *data, | ||
553 | int (*match)(struct omap_dss_device *dssdev, void *data)); | ||
554 | |||
555 | int omap_dss_start_device(struct omap_dss_device *dssdev); | ||
556 | void omap_dss_stop_device(struct omap_dss_device *dssdev); | ||
557 | |||
558 | int omap_dss_get_num_overlay_managers(void); | ||
559 | struct omap_overlay_manager *omap_dss_get_overlay_manager(int num); | ||
560 | |||
561 | int omap_dss_get_num_overlays(void); | ||
562 | struct omap_overlay *omap_dss_get_overlay(int num); | ||
563 | |||
564 | typedef void (*omap_dispc_isr_t) (void *arg, u32 mask); | ||
565 | int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask); | ||
566 | int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask); | ||
567 | |||
568 | int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout); | ||
569 | int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask, | ||
570 | unsigned long timeout); | ||
571 | |||
572 | #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver) | ||
573 | #define to_dss_device(x) container_of((x), struct omap_dss_device, dev) | ||
574 | |||
575 | #endif | ||
diff --git a/arch/arm/plat-omap/include/plat/omapfb.h b/arch/arm/plat-omap/include/plat/omapfb.h deleted file mode 100644 index bfef7ab95f17..000000000000 --- a/arch/arm/plat-omap/include/plat/omapfb.h +++ /dev/null | |||
@@ -1,398 +0,0 @@ | |||
1 | /* | ||
2 | * File: arch/arm/plat-omap/include/mach/omapfb.h | ||
3 | * | ||
4 | * Framebuffer driver for TI OMAP boards | ||
5 | * | ||
6 | * Copyright (C) 2004 Nokia Corporation | ||
7 | * Author: Imre Deak <imre.deak@nokia.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, but | ||
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
17 | * General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License along | ||
20 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
21 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
22 | */ | ||
23 | |||
24 | #ifndef __OMAPFB_H | ||
25 | #define __OMAPFB_H | ||
26 | |||
27 | #include <asm/ioctl.h> | ||
28 | #include <asm/types.h> | ||
29 | |||
30 | /* IOCTL commands. */ | ||
31 | |||
32 | #define OMAP_IOW(num, dtype) _IOW('O', num, dtype) | ||
33 | #define OMAP_IOR(num, dtype) _IOR('O', num, dtype) | ||
34 | #define OMAP_IOWR(num, dtype) _IOWR('O', num, dtype) | ||
35 | #define OMAP_IO(num) _IO('O', num) | ||
36 | |||
37 | #define OMAPFB_MIRROR OMAP_IOW(31, int) | ||
38 | #define OMAPFB_SYNC_GFX OMAP_IO(37) | ||
39 | #define OMAPFB_VSYNC OMAP_IO(38) | ||
40 | #define OMAPFB_SET_UPDATE_MODE OMAP_IOW(40, int) | ||
41 | #define OMAPFB_GET_CAPS OMAP_IOR(42, struct omapfb_caps) | ||
42 | #define OMAPFB_GET_UPDATE_MODE OMAP_IOW(43, int) | ||
43 | #define OMAPFB_LCD_TEST OMAP_IOW(45, int) | ||
44 | #define OMAPFB_CTRL_TEST OMAP_IOW(46, int) | ||
45 | #define OMAPFB_UPDATE_WINDOW_OLD OMAP_IOW(47, struct omapfb_update_window_old) | ||
46 | #define OMAPFB_SET_COLOR_KEY OMAP_IOW(50, struct omapfb_color_key) | ||
47 | #define OMAPFB_GET_COLOR_KEY OMAP_IOW(51, struct omapfb_color_key) | ||
48 | #define OMAPFB_SETUP_PLANE OMAP_IOW(52, struct omapfb_plane_info) | ||
49 | #define OMAPFB_QUERY_PLANE OMAP_IOW(53, struct omapfb_plane_info) | ||
50 | #define OMAPFB_UPDATE_WINDOW OMAP_IOW(54, struct omapfb_update_window) | ||
51 | #define OMAPFB_SETUP_MEM OMAP_IOW(55, struct omapfb_mem_info) | ||
52 | #define OMAPFB_QUERY_MEM OMAP_IOW(56, struct omapfb_mem_info) | ||
53 | |||
54 | #define OMAPFB_CAPS_GENERIC_MASK 0x00000fff | ||
55 | #define OMAPFB_CAPS_LCDC_MASK 0x00fff000 | ||
56 | #define OMAPFB_CAPS_PANEL_MASK 0xff000000 | ||
57 | |||
58 | #define OMAPFB_CAPS_MANUAL_UPDATE 0x00001000 | ||
59 | #define OMAPFB_CAPS_TEARSYNC 0x00002000 | ||
60 | #define OMAPFB_CAPS_PLANE_RELOCATE_MEM 0x00004000 | ||
61 | #define OMAPFB_CAPS_PLANE_SCALE 0x00008000 | ||
62 | #define OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE 0x00010000 | ||
63 | #define OMAPFB_CAPS_WINDOW_SCALE 0x00020000 | ||
64 | #define OMAPFB_CAPS_WINDOW_OVERLAY 0x00040000 | ||
65 | #define OMAPFB_CAPS_WINDOW_ROTATE 0x00080000 | ||
66 | #define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000 | ||
67 | |||
68 | /* Values from DSP must map to lower 16-bits */ | ||
69 | #define OMAPFB_FORMAT_MASK 0x00ff | ||
70 | #define OMAPFB_FORMAT_FLAG_DOUBLE 0x0100 | ||
71 | #define OMAPFB_FORMAT_FLAG_TEARSYNC 0x0200 | ||
72 | #define OMAPFB_FORMAT_FLAG_FORCE_VSYNC 0x0400 | ||
73 | #define OMAPFB_FORMAT_FLAG_ENABLE_OVERLAY 0x0800 | ||
74 | #define OMAPFB_FORMAT_FLAG_DISABLE_OVERLAY 0x1000 | ||
75 | |||
76 | #define OMAPFB_EVENT_READY 1 | ||
77 | #define OMAPFB_EVENT_DISABLED 2 | ||
78 | |||
79 | #define OMAPFB_MEMTYPE_SDRAM 0 | ||
80 | #define OMAPFB_MEMTYPE_SRAM 1 | ||
81 | #define OMAPFB_MEMTYPE_MAX 1 | ||
82 | |||
83 | enum omapfb_color_format { | ||
84 | OMAPFB_COLOR_RGB565 = 0, | ||
85 | OMAPFB_COLOR_YUV422, | ||
86 | OMAPFB_COLOR_YUV420, | ||
87 | OMAPFB_COLOR_CLUT_8BPP, | ||
88 | OMAPFB_COLOR_CLUT_4BPP, | ||
89 | OMAPFB_COLOR_CLUT_2BPP, | ||
90 | OMAPFB_COLOR_CLUT_1BPP, | ||
91 | OMAPFB_COLOR_RGB444, | ||
92 | OMAPFB_COLOR_YUY422, | ||
93 | }; | ||
94 | |||
95 | struct omapfb_update_window { | ||
96 | __u32 x, y; | ||
97 | __u32 width, height; | ||
98 | __u32 format; | ||
99 | __u32 out_x, out_y; | ||
100 | __u32 out_width, out_height; | ||
101 | __u32 reserved[8]; | ||
102 | }; | ||
103 | |||
104 | struct omapfb_update_window_old { | ||
105 | __u32 x, y; | ||
106 | __u32 width, height; | ||
107 | __u32 format; | ||
108 | }; | ||
109 | |||
110 | enum omapfb_plane { | ||
111 | OMAPFB_PLANE_GFX = 0, | ||
112 | OMAPFB_PLANE_VID1, | ||
113 | OMAPFB_PLANE_VID2, | ||
114 | }; | ||
115 | |||
116 | enum omapfb_channel_out { | ||
117 | OMAPFB_CHANNEL_OUT_LCD = 0, | ||
118 | OMAPFB_CHANNEL_OUT_DIGIT, | ||
119 | }; | ||
120 | |||
121 | struct omapfb_plane_info { | ||
122 | __u32 pos_x; | ||
123 | __u32 pos_y; | ||
124 | __u8 enabled; | ||
125 | __u8 channel_out; | ||
126 | __u8 mirror; | ||
127 | __u8 reserved1; | ||
128 | __u32 out_width; | ||
129 | __u32 out_height; | ||
130 | __u32 reserved2[12]; | ||
131 | }; | ||
132 | |||
133 | struct omapfb_mem_info { | ||
134 | __u32 size; | ||
135 | __u8 type; | ||
136 | __u8 reserved[3]; | ||
137 | }; | ||
138 | |||
139 | struct omapfb_caps { | ||
140 | __u32 ctrl; | ||
141 | __u32 plane_color; | ||
142 | __u32 wnd_color; | ||
143 | }; | ||
144 | |||
145 | enum omapfb_color_key_type { | ||
146 | OMAPFB_COLOR_KEY_DISABLED = 0, | ||
147 | OMAPFB_COLOR_KEY_GFX_DST, | ||
148 | OMAPFB_COLOR_KEY_VID_SRC, | ||
149 | }; | ||
150 | |||
151 | struct omapfb_color_key { | ||
152 | __u8 channel_out; | ||
153 | __u32 background; | ||
154 | __u32 trans_key; | ||
155 | __u8 key_type; | ||
156 | }; | ||
157 | |||
158 | enum omapfb_update_mode { | ||
159 | OMAPFB_UPDATE_DISABLED = 0, | ||
160 | OMAPFB_AUTO_UPDATE, | ||
161 | OMAPFB_MANUAL_UPDATE | ||
162 | }; | ||
163 | |||
164 | #ifdef __KERNEL__ | ||
165 | |||
166 | #include <linux/completion.h> | ||
167 | #include <linux/interrupt.h> | ||
168 | #include <linux/fb.h> | ||
169 | #include <linux/mutex.h> | ||
170 | |||
171 | #include <plat/board.h> | ||
172 | |||
173 | #define OMAP_LCDC_INV_VSYNC 0x0001 | ||
174 | #define OMAP_LCDC_INV_HSYNC 0x0002 | ||
175 | #define OMAP_LCDC_INV_PIX_CLOCK 0x0004 | ||
176 | #define OMAP_LCDC_INV_OUTPUT_EN 0x0008 | ||
177 | #define OMAP_LCDC_HSVS_RISING_EDGE 0x0010 | ||
178 | #define OMAP_LCDC_HSVS_OPPOSITE 0x0020 | ||
179 | |||
180 | #define OMAP_LCDC_SIGNAL_MASK 0x003f | ||
181 | |||
182 | #define OMAP_LCDC_PANEL_TFT 0x0100 | ||
183 | |||
184 | #define OMAPFB_PLANE_XRES_MIN 8 | ||
185 | #define OMAPFB_PLANE_YRES_MIN 8 | ||
186 | |||
187 | #ifdef CONFIG_ARCH_OMAP1 | ||
188 | #define OMAPFB_PLANE_NUM 1 | ||
189 | #else | ||
190 | #define OMAPFB_PLANE_NUM 3 | ||
191 | #endif | ||
192 | |||
193 | struct omapfb_device; | ||
194 | |||
195 | struct lcd_panel { | ||
196 | const char *name; | ||
197 | int config; /* TFT/STN, signal inversion */ | ||
198 | int bpp; /* Pixel format in fb mem */ | ||
199 | int data_lines; /* Lines on LCD HW interface */ | ||
200 | |||
201 | int x_res, y_res; | ||
202 | int pixel_clock; /* In kHz */ | ||
203 | int hsw; /* Horizontal synchronization | ||
204 | pulse width */ | ||
205 | int hfp; /* Horizontal front porch */ | ||
206 | int hbp; /* Horizontal back porch */ | ||
207 | int vsw; /* Vertical synchronization | ||
208 | pulse width */ | ||
209 | int vfp; /* Vertical front porch */ | ||
210 | int vbp; /* Vertical back porch */ | ||
211 | int acb; /* ac-bias pin frequency */ | ||
212 | int pcd; /* pixel clock divider. | ||
213 | Obsolete use pixel_clock instead */ | ||
214 | |||
215 | int (*init) (struct lcd_panel *panel, | ||
216 | struct omapfb_device *fbdev); | ||
217 | void (*cleanup) (struct lcd_panel *panel); | ||
218 | int (*enable) (struct lcd_panel *panel); | ||
219 | void (*disable) (struct lcd_panel *panel); | ||
220 | unsigned long (*get_caps) (struct lcd_panel *panel); | ||
221 | int (*set_bklight_level)(struct lcd_panel *panel, | ||
222 | unsigned int level); | ||
223 | unsigned int (*get_bklight_level)(struct lcd_panel *panel); | ||
224 | unsigned int (*get_bklight_max) (struct lcd_panel *panel); | ||
225 | int (*run_test) (struct lcd_panel *panel, int test_num); | ||
226 | }; | ||
227 | |||
228 | struct extif_timings { | ||
229 | int cs_on_time; | ||
230 | int cs_off_time; | ||
231 | int we_on_time; | ||
232 | int we_off_time; | ||
233 | int re_on_time; | ||
234 | int re_off_time; | ||
235 | int we_cycle_time; | ||
236 | int re_cycle_time; | ||
237 | int cs_pulse_width; | ||
238 | int access_time; | ||
239 | |||
240 | int clk_div; | ||
241 | |||
242 | u32 tim[5]; /* set by extif->convert_timings */ | ||
243 | |||
244 | int converted; | ||
245 | }; | ||
246 | |||
247 | struct lcd_ctrl_extif { | ||
248 | int (*init) (struct omapfb_device *fbdev); | ||
249 | void (*cleanup) (void); | ||
250 | void (*get_clk_info) (u32 *clk_period, u32 *max_clk_div); | ||
251 | unsigned long (*get_max_tx_rate)(void); | ||
252 | int (*convert_timings) (struct extif_timings *timings); | ||
253 | void (*set_timings) (const struct extif_timings *timings); | ||
254 | void (*set_bits_per_cycle)(int bpc); | ||
255 | void (*write_command) (const void *buf, unsigned int len); | ||
256 | void (*read_data) (void *buf, unsigned int len); | ||
257 | void (*write_data) (const void *buf, unsigned int len); | ||
258 | void (*transfer_area) (int width, int height, | ||
259 | void (callback)(void * data), void *data); | ||
260 | int (*setup_tearsync) (unsigned pin_cnt, | ||
261 | unsigned hs_pulse_time, unsigned vs_pulse_time, | ||
262 | int hs_pol_inv, int vs_pol_inv, int div); | ||
263 | int (*enable_tearsync) (int enable, unsigned line); | ||
264 | |||
265 | unsigned long max_transmit_size; | ||
266 | }; | ||
267 | |||
268 | struct omapfb_notifier_block { | ||
269 | struct notifier_block nb; | ||
270 | void *data; | ||
271 | int plane_idx; | ||
272 | }; | ||
273 | |||
274 | typedef int (*omapfb_notifier_callback_t)(struct notifier_block *, | ||
275 | unsigned long event, | ||
276 | void *fbi); | ||
277 | |||
278 | struct omapfb_mem_region { | ||
279 | u32 paddr; | ||
280 | void __iomem *vaddr; | ||
281 | unsigned long size; | ||
282 | u8 type; /* OMAPFB_PLANE_MEM_* */ | ||
283 | unsigned alloc:1; /* allocated by the driver */ | ||
284 | unsigned map:1; /* kernel mapped by the driver */ | ||
285 | }; | ||
286 | |||
287 | struct omapfb_mem_desc { | ||
288 | int region_cnt; | ||
289 | struct omapfb_mem_region region[OMAPFB_PLANE_NUM]; | ||
290 | }; | ||
291 | |||
292 | struct lcd_ctrl { | ||
293 | const char *name; | ||
294 | void *data; | ||
295 | |||
296 | int (*init) (struct omapfb_device *fbdev, | ||
297 | int ext_mode, | ||
298 | struct omapfb_mem_desc *req_md); | ||
299 | void (*cleanup) (void); | ||
300 | void (*bind_client) (struct omapfb_notifier_block *nb); | ||
301 | void (*get_caps) (int plane, struct omapfb_caps *caps); | ||
302 | int (*set_update_mode)(enum omapfb_update_mode mode); | ||
303 | enum omapfb_update_mode (*get_update_mode)(void); | ||
304 | int (*setup_plane) (int plane, int channel_out, | ||
305 | unsigned long offset, | ||
306 | int screen_width, | ||
307 | int pos_x, int pos_y, int width, | ||
308 | int height, int color_mode); | ||
309 | int (*set_rotate) (int angle); | ||
310 | int (*setup_mem) (int plane, size_t size, | ||
311 | int mem_type, unsigned long *paddr); | ||
312 | int (*mmap) (struct fb_info *info, | ||
313 | struct vm_area_struct *vma); | ||
314 | int (*set_scale) (int plane, | ||
315 | int orig_width, int orig_height, | ||
316 | int out_width, int out_height); | ||
317 | int (*enable_plane) (int plane, int enable); | ||
318 | int (*update_window) (struct fb_info *fbi, | ||
319 | struct omapfb_update_window *win, | ||
320 | void (*callback)(void *), | ||
321 | void *callback_data); | ||
322 | void (*sync) (void); | ||
323 | void (*suspend) (void); | ||
324 | void (*resume) (void); | ||
325 | int (*run_test) (int test_num); | ||
326 | int (*setcolreg) (u_int regno, u16 red, u16 green, | ||
327 | u16 blue, u16 transp, | ||
328 | int update_hw_mem); | ||
329 | int (*set_color_key) (struct omapfb_color_key *ck); | ||
330 | int (*get_color_key) (struct omapfb_color_key *ck); | ||
331 | }; | ||
332 | |||
333 | enum omapfb_state { | ||
334 | OMAPFB_DISABLED = 0, | ||
335 | OMAPFB_SUSPENDED= 99, | ||
336 | OMAPFB_ACTIVE = 100 | ||
337 | }; | ||
338 | |||
339 | struct omapfb_plane_struct { | ||
340 | int idx; | ||
341 | struct omapfb_plane_info info; | ||
342 | enum omapfb_color_format color_mode; | ||
343 | struct omapfb_device *fbdev; | ||
344 | }; | ||
345 | |||
346 | struct omapfb_device { | ||
347 | int state; | ||
348 | int ext_lcdc; /* Using external | ||
349 | LCD controller */ | ||
350 | struct mutex rqueue_mutex; | ||
351 | |||
352 | int palette_size; | ||
353 | u32 pseudo_palette[17]; | ||
354 | |||
355 | struct lcd_panel *panel; /* LCD panel */ | ||
356 | const struct lcd_ctrl *ctrl; /* LCD controller */ | ||
357 | const struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ | ||
358 | struct lcd_ctrl_extif *ext_if; /* LCD ctrl external | ||
359 | interface */ | ||
360 | struct device *dev; | ||
361 | struct fb_var_screeninfo new_var; /* for mode changes */ | ||
362 | |||
363 | struct omapfb_mem_desc mem_desc; | ||
364 | struct fb_info *fb_info[OMAPFB_PLANE_NUM]; | ||
365 | }; | ||
366 | |||
367 | struct omapfb_platform_data { | ||
368 | struct omap_lcd_config lcd; | ||
369 | struct omapfb_mem_desc mem_desc; | ||
370 | void *ctrl_platform_data; | ||
371 | }; | ||
372 | |||
373 | #ifdef CONFIG_ARCH_OMAP1 | ||
374 | extern struct lcd_ctrl omap1_lcd_ctrl; | ||
375 | #else | ||
376 | extern struct lcd_ctrl omap2_disp_ctrl; | ||
377 | #endif | ||
378 | |||
379 | extern void omapfb_reserve_sdram(void); | ||
380 | extern void omapfb_register_panel(struct lcd_panel *panel); | ||
381 | extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval); | ||
382 | extern void omapfb_notify_clients(struct omapfb_device *fbdev, | ||
383 | unsigned long event); | ||
384 | extern int omapfb_register_client(struct omapfb_notifier_block *nb, | ||
385 | omapfb_notifier_callback_t callback, | ||
386 | void *callback_data); | ||
387 | extern int omapfb_unregister_client(struct omapfb_notifier_block *nb); | ||
388 | extern int omapfb_update_window_async(struct fb_info *fbi, | ||
389 | struct omapfb_update_window *win, | ||
390 | void (*callback)(void *), | ||
391 | void *callback_data); | ||
392 | |||
393 | /* in arch/arm/plat-omap/fb.c */ | ||
394 | extern void omapfb_set_ctrl_platform_data(void *pdata); | ||
395 | |||
396 | #endif /* __KERNEL__ */ | ||
397 | |||
398 | #endif /* __OMAPFB_H */ | ||
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h index f704030d2a70..7b76f50564ba 100644 --- a/arch/arm/plat-omap/include/plat/sdrc.h +++ b/arch/arm/plat-omap/include/plat/sdrc.h | |||
@@ -94,7 +94,10 @@ | |||
94 | 94 | ||
95 | /* SMS register offsets - read/write with sms_{read,write}_reg() */ | 95 | /* SMS register offsets - read/write with sms_{read,write}_reg() */ |
96 | 96 | ||
97 | #define SMS_SYSCONFIG 0x010 | 97 | #define SMS_SYSCONFIG 0x010 |
98 | #define SMS_ROT_CONTROL(context) (0x180 + 0x10 * context) | ||
99 | #define SMS_ROT_SIZE(context) (0x184 + 0x10 * context) | ||
100 | #define SMS_ROT_PHYSICAL_BA(context) (0x188 + 0x10 * context) | ||
98 | /* REVISIT: fill in other SMS registers here */ | 101 | /* REVISIT: fill in other SMS registers here */ |
99 | 102 | ||
100 | 103 | ||
@@ -129,6 +132,10 @@ int omap2_sdrc_get_params(unsigned long r, | |||
129 | void omap2_sms_save_context(void); | 132 | void omap2_sms_save_context(void); |
130 | void omap2_sms_restore_context(void); | 133 | void omap2_sms_restore_context(void); |
131 | 134 | ||
135 | void omap2_sms_write_rot_control(u32 val, unsigned ctx); | ||
136 | void omap2_sms_write_rot_size(u32 val, unsigned ctx); | ||
137 | void omap2_sms_write_rot_physical_ba(u32 val, unsigned ctx); | ||
138 | |||
132 | #ifdef CONFIG_ARCH_OMAP2 | 139 | #ifdef CONFIG_ARCH_OMAP2 |
133 | 140 | ||
134 | struct memory_timings { | 141 | struct memory_timings { |
diff --git a/arch/arm/plat-omap/include/plat/vram.h b/arch/arm/plat-omap/include/plat/vram.h new file mode 100644 index 000000000000..edd4987758a6 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/vram.h | |||
@@ -0,0 +1,62 @@ | |||
1 | /* | ||
2 | * VRAM manager for OMAP | ||
3 | * | ||
4 | * Copyright (C) 2009 Nokia Corporation | ||
5 | * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but | ||
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
14 | * General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
19 | */ | ||
20 | |||
21 | #ifndef __OMAP_VRAM_H__ | ||
22 | #define __OMAP_VRAM_H__ | ||
23 | |||
24 | #include <linux/types.h> | ||
25 | |||
26 | #define OMAP_VRAM_MEMTYPE_SDRAM 0 | ||
27 | #define OMAP_VRAM_MEMTYPE_SRAM 1 | ||
28 | #define OMAP_VRAM_MEMTYPE_MAX 1 | ||
29 | |||
30 | extern int omap_vram_add_region(unsigned long paddr, size_t size); | ||
31 | extern int omap_vram_free(unsigned long paddr, size_t size); | ||
32 | extern int omap_vram_alloc(int mtype, size_t size, unsigned long *paddr); | ||
33 | extern int omap_vram_reserve(unsigned long paddr, size_t size); | ||
34 | extern void omap_vram_get_info(unsigned long *vram, unsigned long *free_vram, | ||
35 | unsigned long *largest_free_block); | ||
36 | |||
37 | #ifdef CONFIG_OMAP2_VRAM | ||
38 | extern void omap_vram_set_sdram_vram(u32 size, u32 start); | ||
39 | extern void omap_vram_set_sram_vram(u32 size, u32 start); | ||
40 | |||
41 | extern void omap_vram_reserve_sdram(void); | ||
42 | extern unsigned long omap_vram_reserve_sram(unsigned long sram_pstart, | ||
43 | unsigned long sram_vstart, | ||
44 | unsigned long sram_size, | ||
45 | unsigned long pstart_avail, | ||
46 | unsigned long size_avail); | ||
47 | #else | ||
48 | static inline void omap_vram_set_sdram_vram(u32 size, u32 start) { } | ||
49 | static inline void omap_vram_set_sram_vram(u32 size, u32 start) { } | ||
50 | |||
51 | static inline void omap_vram_reserve_sdram(void) { } | ||
52 | static inline unsigned long omap_vram_reserve_sram(unsigned long sram_pstart, | ||
53 | unsigned long sram_vstart, | ||
54 | unsigned long sram_size, | ||
55 | unsigned long pstart_avail, | ||
56 | unsigned long size_avail) | ||
57 | { | ||
58 | return 0; | ||
59 | } | ||
60 | #endif | ||
61 | |||
62 | #endif | ||
diff --git a/arch/arm/plat-omap/include/plat/vrfb.h b/arch/arm/plat-omap/include/plat/vrfb.h new file mode 100644 index 000000000000..d8a03ced3b10 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/vrfb.h | |||
@@ -0,0 +1,50 @@ | |||
1 | /* | ||
2 | * VRFB Rotation Engine | ||
3 | * | ||
4 | * Copyright (C) 2009 Nokia Corporation | ||
5 | * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but | ||
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
14 | * General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
19 | */ | ||
20 | |||
21 | #ifndef __OMAP_VRFB_H__ | ||
22 | #define __OMAP_VRFB_H__ | ||
23 | |||
24 | #define OMAP_VRFB_LINE_LEN 2048 | ||
25 | |||
26 | struct vrfb { | ||
27 | u8 context; | ||
28 | void __iomem *vaddr[4]; | ||
29 | unsigned long paddr[4]; | ||
30 | u16 xres; | ||
31 | u16 yres; | ||
32 | u16 xoffset; | ||
33 | u16 yoffset; | ||
34 | u8 bytespp; | ||
35 | bool yuv_mode; | ||
36 | }; | ||
37 | |||
38 | extern int omap_vrfb_request_ctx(struct vrfb *vrfb); | ||
39 | extern void omap_vrfb_release_ctx(struct vrfb *vrfb); | ||
40 | extern void omap_vrfb_adjust_size(u16 *width, u16 *height, | ||
41 | u8 bytespp); | ||
42 | extern u32 omap_vrfb_min_phys_size(u16 width, u16 height, u8 bytespp); | ||
43 | extern u16 omap_vrfb_max_height(u32 phys_size, u16 width, u8 bytespp); | ||
44 | extern void omap_vrfb_setup(struct vrfb *vrfb, unsigned long paddr, | ||
45 | u16 width, u16 height, | ||
46 | unsigned bytespp, bool yuv_mode); | ||
47 | extern int omap_vrfb_map_angle(struct vrfb *vrfb, u16 height, u8 rot); | ||
48 | extern void omap_vrfb_restore_context(void); | ||
49 | |||
50 | #endif /* __VRFB_H */ | ||
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 3e923668778d..ad2bf07d30b5 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <plat/sram.h> | 28 | #include <plat/sram.h> |
29 | #include <plat/board.h> | 29 | #include <plat/board.h> |
30 | #include <plat/cpu.h> | 30 | #include <plat/cpu.h> |
31 | #include <plat/vram.h> | ||
31 | 32 | ||
32 | #include <plat/control.h> | 33 | #include <plat/control.h> |
33 | 34 | ||
@@ -185,6 +186,13 @@ void __init omap_detect_sram(void) | |||
185 | omap_sram_start + SRAM_BOOTLOADER_SZ, | 186 | omap_sram_start + SRAM_BOOTLOADER_SZ, |
186 | omap_sram_size - SRAM_BOOTLOADER_SZ); | 187 | omap_sram_size - SRAM_BOOTLOADER_SZ); |
187 | omap_sram_size -= reserved; | 188 | omap_sram_size -= reserved; |
189 | |||
190 | reserved = omap_vram_reserve_sram(omap_sram_start, omap_sram_base, | ||
191 | omap_sram_size, | ||
192 | omap_sram_start + SRAM_BOOTLOADER_SZ, | ||
193 | omap_sram_size - SRAM_BOOTLOADER_SZ); | ||
194 | omap_sram_size -= reserved; | ||
195 | |||
188 | omap_sram_ceil = omap_sram_base + omap_sram_size; | 196 | omap_sram_ceil = omap_sram_base + omap_sram_size; |
189 | } | 197 | } |
190 | 198 | ||