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-rw-r--r--arch/arm/plat-omap/cpu-omap.c2
-rw-r--r--arch/arm/plat-omap/dma.c47
-rw-r--r--arch/arm/plat-omap/gpio.c2
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h37
-rw-r--r--arch/arm/plat-omap/include/mach/keypad.h5
-rw-r--r--arch/arm/plat-omap/include/mach/powerdomain.h2
-rw-r--r--arch/arm/plat-omap/iommu.c2
-rw-r--r--arch/arm/plat-omap/iovmm.c9
-rw-r--r--arch/arm/plat-omap/mcbsp.c2
-rw-r--r--arch/arm/plat-omap/sram.c3
10 files changed, 62 insertions, 49 deletions
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index 1868c0d8f9b5..341235c278ac 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -127,7 +127,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy)
127 } 127 }
128 128
129 /* FIXME: what's the actual transition time? */ 129 /* FIXME: what's the actual transition time? */
130 policy->cpuinfo.transition_latency = 10 * 1000 * 1000; 130 policy->cpuinfo.transition_latency = 300 * 1000;
131 131
132 return 0; 132 return 0;
133} 133}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index fd3154ae69b1..68eaae324b6a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -691,13 +691,16 @@ static inline void disable_lnk(int lch)
691static inline void omap2_enable_irq_lch(int lch) 691static inline void omap2_enable_irq_lch(int lch)
692{ 692{
693 u32 val; 693 u32 val;
694 unsigned long flags;
694 695
695 if (!cpu_class_is_omap2()) 696 if (!cpu_class_is_omap2())
696 return; 697 return;
697 698
699 spin_lock_irqsave(&dma_chan_lock, flags);
698 val = dma_read(IRQENABLE_L0); 700 val = dma_read(IRQENABLE_L0);
699 val |= 1 << lch; 701 val |= 1 << lch;
700 dma_write(val, IRQENABLE_L0); 702 dma_write(val, IRQENABLE_L0);
703 spin_unlock_irqrestore(&dma_chan_lock, flags);
701} 704}
702 705
703int omap_request_dma(int dev_id, const char *dev_name, 706int omap_request_dma(int dev_id, const char *dev_name,
@@ -799,10 +802,13 @@ void omap_free_dma(int lch)
799 802
800 if (cpu_class_is_omap2()) { 803 if (cpu_class_is_omap2()) {
801 u32 val; 804 u32 val;
805
806 spin_lock_irqsave(&dma_chan_lock, flags);
802 /* Disable interrupts */ 807 /* Disable interrupts */
803 val = dma_read(IRQENABLE_L0); 808 val = dma_read(IRQENABLE_L0);
804 val &= ~(1 << lch); 809 val &= ~(1 << lch);
805 dma_write(val, IRQENABLE_L0); 810 dma_write(val, IRQENABLE_L0);
811 spin_unlock_irqrestore(&dma_chan_lock, flags);
806 812
807 /* Clear the CSR register and IRQ status register */ 813 /* Clear the CSR register and IRQ status register */
808 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch)); 814 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
@@ -829,10 +835,10 @@ EXPORT_SYMBOL(omap_free_dma);
829 * 835 *
830 * @param arb_rate 836 * @param arb_rate
831 * @param max_fifo_depth 837 * @param max_fifo_depth
832 * @param tparams - Number of thereads to reserve : DMA_THREAD_RESERVE_NORM 838 * @param tparams - Number of threads to reserve : DMA_THREAD_RESERVE_NORM
833 * DMA_THREAD_RESERVE_ONET 839 * DMA_THREAD_RESERVE_ONET
834 * DMA_THREAD_RESERVE_TWOT 840 * DMA_THREAD_RESERVE_TWOT
835 * DMA_THREAD_RESERVE_THREET 841 * DMA_THREAD_RESERVE_THREET
836 */ 842 */
837void 843void
838omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams) 844omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
@@ -844,11 +850,14 @@ omap_dma_set_global_params(int arb_rate, int max_fifo_depth, int tparams)
844 return; 850 return;
845 } 851 }
846 852
853 if (max_fifo_depth == 0)
854 max_fifo_depth = 1;
847 if (arb_rate == 0) 855 if (arb_rate == 0)
848 arb_rate = 1; 856 arb_rate = 1;
849 857
850 reg = (arb_rate & 0xff) << 16; 858 reg = 0xff & max_fifo_depth;
851 reg |= (0xff & max_fifo_depth); 859 reg |= (0x3 & tparams) << 12;
860 reg |= (arb_rate & 0xff) << 16;
852 861
853 dma_write(reg, GCR); 862 dma_write(reg, GCR);
854} 863}
@@ -975,6 +984,14 @@ void omap_stop_dma(int lch)
975{ 984{
976 u32 l; 985 u32 l;
977 986
987 /* Disable all interrupts on the channel */
988 if (cpu_class_is_omap1())
989 dma_write(0, CICR(lch));
990
991 l = dma_read(CCR(lch));
992 l &= ~OMAP_DMA_CCR_EN;
993 dma_write(l, CCR(lch));
994
978 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 995 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
979 int next_lch, cur_lch = lch; 996 int next_lch, cur_lch = lch;
980 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT]; 997 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
@@ -992,18 +1009,8 @@ void omap_stop_dma(int lch)
992 next_lch = dma_chan[cur_lch].next_lch; 1009 next_lch = dma_chan[cur_lch].next_lch;
993 cur_lch = next_lch; 1010 cur_lch = next_lch;
994 } while (next_lch != -1); 1011 } while (next_lch != -1);
995
996 return;
997 } 1012 }
998 1013
999 /* Disable all interrupts on the channel */
1000 if (cpu_class_is_omap1())
1001 dma_write(0, CICR(lch));
1002
1003 l = dma_read(CCR(lch));
1004 l &= ~OMAP_DMA_CCR_EN;
1005 dma_write(l, CCR(lch));
1006
1007 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE; 1014 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
1008} 1015}
1009EXPORT_SYMBOL(omap_stop_dma); 1016EXPORT_SYMBOL(omap_stop_dma);
@@ -1107,6 +1114,14 @@ int omap_dma_running(void)
1107{ 1114{
1108 int lch; 1115 int lch;
1109 1116
1117 /*
1118 * On OMAP1510, internal LCD controller will start the transfer
1119 * when it gets enabled, so assume DMA running if LCD enabled.
1120 */
1121 if (cpu_is_omap1510())
1122 if (omap_readw(0xfffec000 + 0x00) & (1 << 0))
1123 return 1;
1124
1110 /* Check if LCD DMA is running */ 1125 /* Check if LCD DMA is running */
1111 if (cpu_is_omap16xx()) 1126 if (cpu_is_omap16xx())
1112 if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN) 1127 if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 71ebd7fcfea1..7c345b757df1 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -373,7 +373,7 @@ static inline int gpio_valid(int gpio)
373 373
374static int check_gpio(int gpio) 374static int check_gpio(int gpio)
375{ 375{
376 if (unlikely(gpio_valid(gpio)) < 0) { 376 if (unlikely(gpio_valid(gpio) < 0)) {
377 printk(KERN_ERR "omap-gpio: invalid GPIO %d\n", gpio); 377 printk(KERN_ERR "omap-gpio: invalid GPIO %d\n", gpio);
378 dump_stack(); 378 dump_stack();
379 return -1; 379 return -1;
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index 11e73d9e8928..f129efb3075e 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -303,32 +303,21 @@ IS_OMAP_TYPE(3430, 0x3430)
303#define cpu_is_omap2430() 0 303#define cpu_is_omap2430() 0
304#define cpu_is_omap3430() 0 304#define cpu_is_omap3430() 0
305 305
306#if defined(MULTI_OMAP1)
307# if defined(CONFIG_ARCH_OMAP730)
308# undef cpu_is_omap730
309# define cpu_is_omap730() is_omap730()
310# endif
311# if defined(CONFIG_ARCH_OMAP850)
312# undef cpu_is_omap850
313# define cpu_is_omap850() is_omap850()
314# endif
315#else
316# if defined(CONFIG_ARCH_OMAP730)
317# undef cpu_is_omap730
318# define cpu_is_omap730() 1
319# endif
320#endif
321#else
322# if defined(CONFIG_ARCH_OMAP850)
323# undef cpu_is_omap850
324# define cpu_is_omap850() 1
325# endif
326#endif
327
328/* 306/*
329 * Whether we have MULTI_OMAP1 or not, we still need to distinguish 307 * Whether we have MULTI_OMAP1 or not, we still need to distinguish
330 * between 330 vs. 1510 and 1611B/5912 vs. 1710. 308 * between 730 vs 850, 330 vs. 1510 and 1611B/5912 vs. 1710.
331 */ 309 */
310
311#if defined(CONFIG_ARCH_OMAP730)
312# undef cpu_is_omap730
313# define cpu_is_omap730() is_omap730()
314#endif
315
316#if defined(CONFIG_ARCH_OMAP850)
317# undef cpu_is_omap850
318# define cpu_is_omap850() is_omap850()
319#endif
320
332#if defined(CONFIG_ARCH_OMAP15XX) 321#if defined(CONFIG_ARCH_OMAP15XX)
333# undef cpu_is_omap310 322# undef cpu_is_omap310
334# undef cpu_is_omap1510 323# undef cpu_is_omap1510
@@ -433,3 +422,5 @@ IS_OMAP_TYPE(3430, 0x3430)
433 422
434int omap_chip_is(struct omap_chip_id oci); 423int omap_chip_is(struct omap_chip_id oci);
435void omap2_check_revision(void); 424void omap2_check_revision(void);
425
426#endif
diff --git a/arch/arm/plat-omap/include/mach/keypad.h b/arch/arm/plat-omap/include/mach/keypad.h
index d91b9be334ff..3ae52ccc793c 100644
--- a/arch/arm/plat-omap/include/mach/keypad.h
+++ b/arch/arm/plat-omap/include/mach/keypad.h
@@ -10,7 +10,7 @@
10#ifndef ASMARM_ARCH_KEYPAD_H 10#ifndef ASMARM_ARCH_KEYPAD_H
11#define ASMARM_ARCH_KEYPAD_H 11#define ASMARM_ARCH_KEYPAD_H
12 12
13#include <linux/input/matrix_keypad.h> 13#warning: Please update the board to use matrix_keypad.h instead
14 14
15struct omap_kp_platform_data { 15struct omap_kp_platform_data {
16 int rows; 16 int rows;
@@ -37,6 +37,9 @@ struct omap_kp_platform_data {
37 37
38#define KEY_PERSISTENT 0x00800000 38#define KEY_PERSISTENT 0x00800000
39#define KEYNUM_MASK 0x00EFFFFF 39#define KEYNUM_MASK 0x00EFFFFF
40#define KEY(col, row, val) (((col) << 28) | ((row) << 24) | (val))
41#define PERSISTENT_KEY(col, row) (((col) << 28) | ((row) << 24) | \
42 KEY_PERSISTENT)
40 43
41#endif 44#endif
42 45
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h
index 6271d8556a40..fa6461423bd0 100644
--- a/arch/arm/plat-omap/include/mach/powerdomain.h
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -135,6 +135,8 @@ struct powerdomain *pwrdm_lookup(const char *name);
135 135
136int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), 136int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
137 void *user); 137 void *user);
138int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user),
139 void *user);
138 140
139int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); 141int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
140int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); 142int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 4b6012707307..94584f167a82 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -664,7 +664,7 @@ static size_t iopgtable_clear_entry_core(struct iommu *obj, u32 da)
664 nent = 1; /* for the next L1 entry */ 664 nent = 1; /* for the next L1 entry */
665 } else { 665 } else {
666 bytes = IOPGD_SIZE; 666 bytes = IOPGD_SIZE;
667 if (*iopgd & IOPGD_SUPER) { 667 if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) {
668 nent *= 16; 668 nent *= 16;
669 /* rewind to the 1st entry */ 669 /* rewind to the 1st entry */
670 iopgd = (u32 *)((u32)iopgd & IOSUPER_MASK); 670 iopgd = (u32 *)((u32)iopgd & IOSUPER_MASK);
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c
index 57f7122a0919..dc3fac3dd0ea 100644
--- a/arch/arm/plat-omap/iovmm.c
+++ b/arch/arm/plat-omap/iovmm.c
@@ -47,7 +47,7 @@
47 * 'va': mpu virtual address 47 * 'va': mpu virtual address
48 * 48 *
49 * 'c': contiguous memory area 49 * 'c': contiguous memory area
50 * 'd': dicontiguous memory area 50 * 'd': discontiguous memory area
51 * 'a': anonymous memory allocation 51 * 'a': anonymous memory allocation
52 * '()': optional feature 52 * '()': optional feature
53 * 53 *
@@ -363,8 +363,9 @@ void *da_to_va(struct iommu *obj, u32 da)
363 goto out; 363 goto out;
364 } 364 }
365 va = area->va; 365 va = area->va;
366 mutex_unlock(&obj->mmap_lock);
367out: 366out:
367 mutex_unlock(&obj->mmap_lock);
368
368 return va; 369 return va;
369} 370}
370EXPORT_SYMBOL_GPL(da_to_va); 371EXPORT_SYMBOL_GPL(da_to_va);
@@ -398,7 +399,7 @@ static inline void sgtable_drain_vmalloc(struct sg_table *sgt)
398{ 399{
399 /* 400 /*
400 * Actually this is not necessary at all, just exists for 401 * Actually this is not necessary at all, just exists for
401 * consistency of the code readibility. 402 * consistency of the code readability.
402 */ 403 */
403 BUG_ON(!sgt); 404 BUG_ON(!sgt);
404} 405}
@@ -434,7 +435,7 @@ static inline void sgtable_drain_kmalloc(struct sg_table *sgt)
434{ 435{
435 /* 436 /*
436 * Actually this is not necessary at all, just exists for 437 * Actually this is not necessary at all, just exists for
437 * consistency of the code readibility 438 * consistency of the code readability
438 */ 439 */
439 BUG_ON(!sgt); 440 BUG_ON(!sgt);
440} 441}
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 88ac9768f1c1..e664b912d7bb 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -595,7 +595,7 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx)
595 rx &= 1; 595 rx &= 1;
596 if (cpu_is_omap2430() || cpu_is_omap34xx()) { 596 if (cpu_is_omap2430() || cpu_is_omap34xx()) {
597 w = OMAP_MCBSP_READ(io_base, RCCR); 597 w = OMAP_MCBSP_READ(io_base, RCCR);
598 w |= (tx ? RDISABLE : 0); 598 w |= (rx ? RDISABLE : 0);
599 OMAP_MCBSP_WRITE(io_base, RCCR, w); 599 OMAP_MCBSP_WRITE(io_base, RCCR, w);
600 } 600 }
601 w = OMAP_MCBSP_READ(io_base, SPCR1); 601 w = OMAP_MCBSP_READ(io_base, SPCR1);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 925f64711c37..75d1f26e5b17 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -270,7 +270,8 @@ void * omap_sram_push(void * start, unsigned long size)
270 omap_sram_ceil -= size; 270 omap_sram_ceil -= size;
271 omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *)); 271 omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
272 memcpy((void *)omap_sram_ceil, start, size); 272 memcpy((void *)omap_sram_ceil, start, size);
273 flush_icache_range((unsigned long)start, (unsigned long)(start + size)); 273 flush_icache_range((unsigned long)omap_sram_ceil,
274 (unsigned long)(omap_sram_ceil + size));
274 275
275 return (void *)omap_sram_ceil; 276 return (void *)omap_sram_ceil;
276} 277}