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-rw-r--r--arch/arm/plat-omap/include/plat/clkdev_omap.h20
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h11
2 files changed, 18 insertions, 13 deletions
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
index bb937f3fabed..b19774c9c112 100644
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h
@@ -31,18 +31,18 @@ struct omap_clk {
31#define CK_1510 (1 << 2) 31#define CK_1510 (1 << 2)
32#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ 32#define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */
33#define CK_242X (1 << 4) 33#define CK_242X (1 << 4)
34#define CK_243X (1 << 5) 34#define CK_243X (1 << 5) /* 243x, 253x */
35#define CK_3XXX (1 << 6) /* OMAP3 + AM3 common clocks*/ 35#define CK_3430ES1 (1 << 6) /* 34xxES1 only */
36#define CK_343X (1 << 7) /* OMAP34xx common clocks */ 36#define CK_3430ES2PLUS (1 << 7) /* 34xxES2, ES3, non-Sitara 35xx only */
37#define CK_3430ES1 (1 << 8) /* 34xxES1 only */ 37#define CK_3505 (1 << 8)
38#define CK_3430ES2 (1 << 9) /* 34xxES2, ES3, non-Sitara 35xx only */ 38#define CK_3517 (1 << 9)
39#define CK_3505 (1 << 10) 39#define CK_36XX (1 << 10) /* 36xx/37xx-specific clocks */
40#define CK_3517 (1 << 11) 40#define CK_443X (1 << 11)
41#define CK_36XX (1 << 12) /* OMAP36xx/37xx-specific clocks */
42#define CK_443X (1 << 13)
43 41
44#define CK_AM35XX (CK_3505 | CK_3517) /* all Sitara AM35xx */
45 42
43#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
44#define CK_AM35XX (CK_3505 | CK_3517) /* all Sitara AM35xx */
45#define CK_3XXX (CK_34XX | CK_AM35XX | CK_36XX)
46 46
47 47
48#endif 48#endif
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index fef4696dcf67..6e223158268b 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -49,13 +49,18 @@ struct clkops {
49/* struct clksel_rate.flags possibilities */ 49/* struct clksel_rate.flags possibilities */
50#define RATE_IN_242X (1 << 0) 50#define RATE_IN_242X (1 << 0)
51#define RATE_IN_243X (1 << 1) 51#define RATE_IN_243X (1 << 1)
52#define RATE_IN_3XXX (1 << 2) /* rates common to all OMAP3 */ 52#define RATE_IN_3430ES1 (1 << 2) /* 3430ES1 rates only */
53#define RATE_IN_3430ES2 (1 << 3) /* 3430ES2 rates only */ 53#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
54#define RATE_IN_36XX (1 << 4) 54#define RATE_IN_36XX (1 << 4)
55#define RATE_IN_4430 (1 << 5) 55#define RATE_IN_4430 (1 << 5)
56 56
57#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) 57#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
58#define RATE_IN_3430ES2PLUS (RATE_IN_3430ES2 | RATE_IN_36XX) 58#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
59#define RATE_IN_3XXX (RATE_IN_34XX | RATE_IN_36XX)
60
61/* RATE_IN_3430ES2PLUS_36XX includes 34xx/35xx with ES >=2, and all 36xx/37xx */
62#define RATE_IN_3430ES2PLUS_36XX (RATE_IN_3430ES2PLUS | RATE_IN_36XX)
63
59 64
60/** 65/**
61 * struct clksel_rate - register bitfield values corresponding to clk divisors 66 * struct clksel_rate - register bitfield values corresponding to clk divisors