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-rw-r--r--arch/arm/plat-omap/common.c26
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-omap/dmtimer.c13
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h1
-rw-r--r--arch/arm/plat-omap/include/plat/irqs.h3
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h1
6 files changed, 45 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index bf1eaf3a27d4..dddc0273bc8b 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -172,6 +172,32 @@ unsigned long long sched_clock(void)
172 clocksource_32k.mult, clocksource_32k.shift); 172 clocksource_32k.mult, clocksource_32k.shift);
173} 173}
174 174
175/**
176 * read_persistent_clock - Return time from a persistent clock.
177 *
178 * Reads the time from a source which isn't disabled during PM, the
179 * 32k sync timer. Convert the cycles elapsed since last read into
180 * nsecs and adds to a monotonically increasing timespec.
181 */
182static struct timespec persistent_ts;
183static cycles_t cycles, last_cycles;
184void read_persistent_clock(struct timespec *ts)
185{
186 unsigned long long nsecs;
187 cycles_t delta;
188 struct timespec *tsp = &persistent_ts;
189
190 last_cycles = cycles;
191 cycles = clocksource_32k.read(&clocksource_32k);
192 delta = cycles - last_cycles;
193
194 nsecs = clocksource_cyc2ns(delta,
195 clocksource_32k.mult, clocksource_32k.shift);
196
197 timespec_add_ns(tsp, nsecs);
198 *ts = *tsp;
199}
200
175static int __init omap_init_clocksource_32k(void) 201static int __init omap_init_clocksource_32k(void)
176{ 202{
177 static char err[] __initdata = KERN_ERR 203 static char err[] __initdata = KERN_ERR
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 09d82b3c66ce..728c64204184 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -1183,7 +1183,7 @@ void omap_dma_unlink_lch(int lch_head, int lch_queue)
1183 } 1183 }
1184 1184
1185 if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) || 1185 if ((dma_chan[lch_head].flags & OMAP_DMA_ACTIVE) ||
1186 (dma_chan[lch_head].flags & OMAP_DMA_ACTIVE)) { 1186 (dma_chan[lch_queue].flags & OMAP_DMA_ACTIVE)) {
1187 printk(KERN_ERR "omap_dma: You need to stop the DMA channels " 1187 printk(KERN_ERR "omap_dma: You need to stop the DMA channels "
1188 "before unlinking\n"); 1188 "before unlinking\n");
1189 dump_stack(); 1189 dump_stack();
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 64f407ee0f4e..08ccf8922520 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -551,6 +551,19 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
551 if (l & OMAP_TIMER_CTRL_ST) { 551 if (l & OMAP_TIMER_CTRL_ST) {
552 l &= ~0x1; 552 l &= ~0x1;
553 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 553 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
554#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
555 defined(CONFIG_ARCH_OMAP4)
556 /* Readback to make sure write has completed */
557 omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
558 /*
559 * Wait for functional clock period x 3.5 to make sure that
560 * timer is stopped
561 */
562 udelay(3500000 / clk_get_rate(timer->fclk) + 1);
563 /* Ack possibly pending interrupt */
564 omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG,
565 OMAP_TIMER_INT_OVERFLOW);
566#endif
554 } 567 }
555} 568}
556EXPORT_SYMBOL_GPL(omap_dm_timer_stop); 569EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 9a028bdebb06..a162f585b1e3 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -434,6 +434,7 @@ IS_OMAP_TYPE(3517, 0x3517)
434#define OMAP3430_REV_ES2_1 0x34302034 434#define OMAP3430_REV_ES2_1 0x34302034
435#define OMAP3430_REV_ES3_0 0x34303034 435#define OMAP3430_REV_ES3_0 0x34303034
436#define OMAP3430_REV_ES3_1 0x34304034 436#define OMAP3430_REV_ES3_1 0x34304034
437#define OMAP3430_REV_ES3_1_2 0x34305034
437 438
438#define OMAP3630_REV_ES1_0 0x36300034 439#define OMAP3630_REV_ES1_0 0x36300034
439 440
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 97d6c50c3dcb..c0ab7c80f72e 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -499,6 +499,9 @@ extern void omap_init_irq(void);
499extern int omap_irq_pending(void); 499extern int omap_irq_pending(void);
500void omap_intc_save_context(void); 500void omap_intc_save_context(void);
501void omap_intc_restore_context(void); 501void omap_intc_restore_context(void);
502void omap3_intc_suspend(void);
503void omap3_intc_prepare_idle(void);
504void omap3_intc_resume_idle(void);
502#endif 505#endif
503 506
504#include <mach/hardware.h> 507#include <mach/hardware.h>
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 007935a921ea..33933256a226 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -227,6 +227,7 @@ struct omap_hwmod_ocp_if {
227#define SYSC_HAS_SIDLEMODE (1 << 5) 227#define SYSC_HAS_SIDLEMODE (1 << 5)
228#define SYSC_HAS_MIDLEMODE (1 << 6) 228#define SYSC_HAS_MIDLEMODE (1 << 6)
229#define SYSS_MISSING (1 << 7) 229#define SYSS_MISSING (1 << 7)
230#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
230 231
231/* omap_hwmod_sysconfig.clockact flags */ 232/* omap_hwmod_sysconfig.clockact flags */
232#define CLOCKACT_TEST_BOTH 0x0 233#define CLOCKACT_TEST_BOTH 0x0