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-rw-r--r--arch/arm/plat-omap/cpu-omap.c2
-rw-r--r--arch/arm/plat-omap/dma.c32
-rw-r--r--arch/arm/plat-omap/gpio.c2
-rw-r--r--arch/arm/plat-omap/include/mach/keypad.h5
-rw-r--r--arch/arm/plat-omap/iommu.c2
5 files changed, 29 insertions, 14 deletions
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index 1868c0d8f9b5..341235c278ac 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -127,7 +127,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy)
127 } 127 }
128 128
129 /* FIXME: what's the actual transition time? */ 129 /* FIXME: what's the actual transition time? */
130 policy->cpuinfo.transition_latency = 10 * 1000 * 1000; 130 policy->cpuinfo.transition_latency = 300 * 1000;
131 131
132 return 0; 132 return 0;
133} 133}
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 0eb676d7e807..68eaae324b6a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -691,13 +691,16 @@ static inline void disable_lnk(int lch)
691static inline void omap2_enable_irq_lch(int lch) 691static inline void omap2_enable_irq_lch(int lch)
692{ 692{
693 u32 val; 693 u32 val;
694 unsigned long flags;
694 695
695 if (!cpu_class_is_omap2()) 696 if (!cpu_class_is_omap2())
696 return; 697 return;
697 698
699 spin_lock_irqsave(&dma_chan_lock, flags);
698 val = dma_read(IRQENABLE_L0); 700 val = dma_read(IRQENABLE_L0);
699 val |= 1 << lch; 701 val |= 1 << lch;
700 dma_write(val, IRQENABLE_L0); 702 dma_write(val, IRQENABLE_L0);
703 spin_unlock_irqrestore(&dma_chan_lock, flags);
701} 704}
702 705
703int omap_request_dma(int dev_id, const char *dev_name, 706int omap_request_dma(int dev_id, const char *dev_name,
@@ -799,10 +802,13 @@ void omap_free_dma(int lch)
799 802
800 if (cpu_class_is_omap2()) { 803 if (cpu_class_is_omap2()) {
801 u32 val; 804 u32 val;
805
806 spin_lock_irqsave(&dma_chan_lock, flags);
802 /* Disable interrupts */ 807 /* Disable interrupts */
803 val = dma_read(IRQENABLE_L0); 808 val = dma_read(IRQENABLE_L0);
804 val &= ~(1 << lch); 809 val &= ~(1 << lch);
805 dma_write(val, IRQENABLE_L0); 810 dma_write(val, IRQENABLE_L0);
811 spin_unlock_irqrestore(&dma_chan_lock, flags);
806 812
807 /* Clear the CSR register and IRQ status register */ 813 /* Clear the CSR register and IRQ status register */
808 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch)); 814 dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR(lch));
@@ -978,6 +984,14 @@ void omap_stop_dma(int lch)
978{ 984{
979 u32 l; 985 u32 l;
980 986
987 /* Disable all interrupts on the channel */
988 if (cpu_class_is_omap1())
989 dma_write(0, CICR(lch));
990
991 l = dma_read(CCR(lch));
992 l &= ~OMAP_DMA_CCR_EN;
993 dma_write(l, CCR(lch));
994
981 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) { 995 if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
982 int next_lch, cur_lch = lch; 996 int next_lch, cur_lch = lch;
983 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT]; 997 char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
@@ -995,18 +1009,8 @@ void omap_stop_dma(int lch)
995 next_lch = dma_chan[cur_lch].next_lch; 1009 next_lch = dma_chan[cur_lch].next_lch;
996 cur_lch = next_lch; 1010 cur_lch = next_lch;
997 } while (next_lch != -1); 1011 } while (next_lch != -1);
998
999 return;
1000 } 1012 }
1001 1013
1002 /* Disable all interrupts on the channel */
1003 if (cpu_class_is_omap1())
1004 dma_write(0, CICR(lch));
1005
1006 l = dma_read(CCR(lch));
1007 l &= ~OMAP_DMA_CCR_EN;
1008 dma_write(l, CCR(lch));
1009
1010 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE; 1014 dma_chan[lch].flags &= ~OMAP_DMA_ACTIVE;
1011} 1015}
1012EXPORT_SYMBOL(omap_stop_dma); 1016EXPORT_SYMBOL(omap_stop_dma);
@@ -1110,6 +1114,14 @@ int omap_dma_running(void)
1110{ 1114{
1111 int lch; 1115 int lch;
1112 1116
1117 /*
1118 * On OMAP1510, internal LCD controller will start the transfer
1119 * when it gets enabled, so assume DMA running if LCD enabled.
1120 */
1121 if (cpu_is_omap1510())
1122 if (omap_readw(0xfffec000 + 0x00) & (1 << 0))
1123 return 1;
1124
1113 /* Check if LCD DMA is running */ 1125 /* Check if LCD DMA is running */
1114 if (cpu_is_omap16xx()) 1126 if (cpu_is_omap16xx())
1115 if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN) 1127 if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 71ebd7fcfea1..7c345b757df1 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -373,7 +373,7 @@ static inline int gpio_valid(int gpio)
373 373
374static int check_gpio(int gpio) 374static int check_gpio(int gpio)
375{ 375{
376 if (unlikely(gpio_valid(gpio)) < 0) { 376 if (unlikely(gpio_valid(gpio) < 0)) {
377 printk(KERN_ERR "omap-gpio: invalid GPIO %d\n", gpio); 377 printk(KERN_ERR "omap-gpio: invalid GPIO %d\n", gpio);
378 dump_stack(); 378 dump_stack();
379 return -1; 379 return -1;
diff --git a/arch/arm/plat-omap/include/mach/keypad.h b/arch/arm/plat-omap/include/mach/keypad.h
index d91b9be334ff..3ae52ccc793c 100644
--- a/arch/arm/plat-omap/include/mach/keypad.h
+++ b/arch/arm/plat-omap/include/mach/keypad.h
@@ -10,7 +10,7 @@
10#ifndef ASMARM_ARCH_KEYPAD_H 10#ifndef ASMARM_ARCH_KEYPAD_H
11#define ASMARM_ARCH_KEYPAD_H 11#define ASMARM_ARCH_KEYPAD_H
12 12
13#include <linux/input/matrix_keypad.h> 13#warning: Please update the board to use matrix_keypad.h instead
14 14
15struct omap_kp_platform_data { 15struct omap_kp_platform_data {
16 int rows; 16 int rows;
@@ -37,6 +37,9 @@ struct omap_kp_platform_data {
37 37
38#define KEY_PERSISTENT 0x00800000 38#define KEY_PERSISTENT 0x00800000
39#define KEYNUM_MASK 0x00EFFFFF 39#define KEYNUM_MASK 0x00EFFFFF
40#define KEY(col, row, val) (((col) << 28) | ((row) << 24) | (val))
41#define PERSISTENT_KEY(col, row) (((col) << 28) | ((row) << 24) | \
42 KEY_PERSISTENT)
40 43
41#endif 44#endif
42 45
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 4b6012707307..94584f167a82 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -664,7 +664,7 @@ static size_t iopgtable_clear_entry_core(struct iommu *obj, u32 da)
664 nent = 1; /* for the next L1 entry */ 664 nent = 1; /* for the next L1 entry */
665 } else { 665 } else {
666 bytes = IOPGD_SIZE; 666 bytes = IOPGD_SIZE;
667 if (*iopgd & IOPGD_SUPER) { 667 if ((*iopgd & IOPGD_SUPER) == IOPGD_SUPER) {
668 nent *= 16; 668 nent *= 16;
669 /* rewind to the 1st entry */ 669 /* rewind to the 1st entry */
670 iopgd = (u32 *)((u32)iopgd & IOSUPER_MASK); 670 iopgd = (u32 *)((u32)iopgd & IOSUPER_MASK);