20 files changed, 381 insertions, 163 deletions

diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index 11c54ec8d47f..da4f68dbba1d 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -101,7 +101,7 @@ static int omap_target(struct cpufreq_policy *policy,
         return ret;
 }
 
-static int __init omap_cpu_init(struct cpufreq_policy *policy)
+static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
 {
         int result = 0;
 
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 10245b837c10..7d9f815cedec 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -35,8 +35,8 @@
 
 static struct platform_device **omap_mcbsp_devices;
 
-void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
-                                        int size)
+void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
+                        struct omap_mcbsp_platform_data *config, int size)
 {
         int i;
 
@@ -54,6 +54,8 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
                 new_mcbsp = platform_device_alloc("omap-mcbsp", i + 1);
                 if (!new_mcbsp)
                         continue;
+                platform_device_add_resources(new_mcbsp, &res[i * res_count],
+                                        res_count);
                 new_mcbsp->dev.platform_data = &config[i];
                 ret = platform_device_add(new_mcbsp);
                 if (ret) {
@@ -65,8 +67,8 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
 }
 
 #else
-void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
-                                        int size)
+void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
+                        struct omap_mcbsp_platform_data *config, int size)
 {  }
 #endif
 
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 1d706cf63ca0..ee9f6ebba29b 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -342,6 +342,10 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
         l |= 0x02 << 3;  /* Set to smart-idle mode */
         l |= 0x2 << 8;   /* Set clock activity to perserve f-clock on idle */
 
+        /* Enable autoidle on OMAP2 / OMAP3 */
+        if (cpu_is_omap24xx() || cpu_is_omap34xx())
+                l |= 0x1 << 0;
+
         /*
          * Enable wake-up on OMAP2 CPUs.
          */
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index be99438d385e..8198bb6cdb5e 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -5,7 +5,7 @@
  *
  * Copyright (C) 2004, 2008 Nokia Corporation
  *
- * Copyright (C) 2009 Texas Instruments.
+ * Copyright (C) 2009-11 Texas Instruments.
  *
  * Written by Tony Lindgren <tony.lindgren@nokia.com>
  *
@@ -405,8 +405,10 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define TI8168_REV_ES1_1        (TI816X_CLASS | (OMAP_REVBITS_01 << 8))
 
 #define OMAP443X_CLASS          0x44300044
-#define OMAP4430_REV_ES1_0      OMAP443X_CLASS
-#define OMAP4430_REV_ES2_0      0x44301044
+#define OMAP4430_REV_ES1_0      (OMAP443X_CLASS | (0x10 << 8))
+#define OMAP4430_REV_ES2_0      (OMAP443X_CLASS | (0x20 << 8))
+#define OMAP4430_REV_ES2_1      (OMAP443X_CLASS | (0x21 << 8))
+#define OMAP4430_REV_ES2_2      (OMAP443X_CLASS | (0x22 << 8))
 
 /*
  * omap_chip bits
@@ -434,12 +436,16 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define CHIP_IS_OMAP3630ES1_1           (1 << 9)
 #define CHIP_IS_OMAP3630ES1_2           (1 << 10)
 #define CHIP_IS_OMAP4430ES2             (1 << 11)
+#define CHIP_IS_OMAP4430ES2_1           (1 << 12)
+#define CHIP_IS_OMAP4430ES2_2           (1 << 13)
 #define CHIP_IS_TI816X                  (1 << 14)
 
 #define CHIP_IS_OMAP24XX                (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
 
-#define CHIP_IS_OMAP4430                (CHIP_IS_OMAP4430ES1 | \
-                                                 CHIP_IS_OMAP4430ES2)
+#define CHIP_IS_OMAP4430                (CHIP_IS_OMAP4430ES1 |          \
+                                         CHIP_IS_OMAP4430ES2 |          \
+                                         CHIP_IS_OMAP4430ES2_1 |        \
+                                         CHIP_IS_OMAP4430ES2_2)
 
 /*
  * "GE" here represents "greater than or equal to" in terms of ES
diff --git a/arch/arm/plat-omap/include/plat/display.h b/arch/arm/plat-omap/include/plat/display.h
index 537f4e449f50..0f140ecedb01 100644
--- a/arch/arm/plat-omap/include/plat/display.h
+++ b/arch/arm/plat-omap/include/plat/display.h
@@ -23,6 +23,7 @@
 #include <linux/list.h>
 #include <linux/kobject.h>
 #include <linux/device.h>
+#include <linux/platform_device.h>
 #include <asm/atomic.h>
 
 #define DISPC_IRQ_FRAMEDONE             (1 << 0)
@@ -226,6 +227,16 @@ struct omap_dss_board_info {
         struct omap_dss_device *default_device;
 };
 
+#if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
+/* Init with the board info */
+extern int omap_display_init(struct omap_dss_board_info *board_data);
+#else
+static inline int omap_display_init(struct omap_dss_board_info *board_data)
+{
+        return 0;
+}
+#endif
+
 struct omap_video_timings {
         /* Unit: pixels */
         u16 x_res;
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index dfa3aff9761b..d6c70d2f4030 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -3,6 +3,12 @@
  *
  * OMAP Dual-Mode Timers
  *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ * Tarun Kanti DebBarma <tarun.kanti@ti.com>
+ * Thara Gopinath <thara@ti.com>
+ *
+ * Platform device conversion and hwmod support.
+ *
  * Copyright (C) 2005 Nokia Corporation
  * Author: Lauri Leukkunen <lauri.leukkunen@nokia.com>
  * PWM and clock framwork support by Timo Teras.
@@ -44,6 +50,11 @@
 #define OMAP_TIMER_TRIGGER_OVERFLOW             0x01
 #define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02
 
+/*
+ * IP revision identifier so that Highlander IP
+ * in OMAP4 can be distinguished.
+ */
+#define OMAP_TIMER_IP_VERSION_1                        0x1
 struct omap_dm_timer;
 extern struct omap_dm_timer *gptimer_wakeup;
 extern struct sys_timer omap_timer;
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h
index 85ded598853e..12b316165037 100644
--- a/arch/arm/plat-omap/include/plat/gpmc.h
+++ b/arch/arm/plat-omap/include/plat/gpmc.h
@@ -41,6 +41,8 @@
 #define GPMC_NAND_ADDRESS       0x0000000b
 #define GPMC_NAND_DATA          0x0000000c
 
+#define GPMC_ENABLE_IRQ         0x0000000d
+
 /* ECC commands */
 #define GPMC_ECC_READ           0 /* Reset Hardware ECC for read */
 #define GPMC_ECC_WRITE          1 /* Reset Hardware ECC for write */
@@ -78,6 +80,19 @@
 #define WR_RD_PIN_MONITORING            0x00600000
 #define GPMC_PREFETCH_STATUS_FIFO_CNT(val)      ((val >> 24) & 0x7F)
 #define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff)
+#define GPMC_IRQ_FIFOEVENTENABLE        0x01
+#define GPMC_IRQ_COUNT_EVENT            0x02
+
+#define PREFETCH_FIFOTHRESHOLD_MAX      0x40
+#define PREFETCH_FIFOTHRESHOLD(val)     ((val) << 8)
+
+enum omap_ecc {
+                /* 1-bit ecc: stored at end of spare area */
+        OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
+        OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
+                /* 1-bit ecc: stored at begining of spare area as romcode */
+        OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
+};
 
 /*
  * Note that all values in this struct are in nanoseconds except sync_clk
@@ -130,12 +145,11 @@ extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base);
 extern void gpmc_cs_free(int cs);
 extern int gpmc_cs_set_reserved(int cs, int reserved);
 extern int gpmc_cs_reserved(int cs);
-extern int gpmc_prefetch_enable(int cs, int dma_mode,
+extern int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode,
                                         unsigned int u32_count, int is_write);
 extern int gpmc_prefetch_reset(int cs);
 extern void omap3_gpmc_save_context(void);
 extern void omap3_gpmc_restore_context(void);
-extern void gpmc_init(void);
 extern int gpmc_read_status(int cmd);
 extern int gpmc_cs_configure(int cs, int cmd, int wval);
 extern int gpmc_nand_read(int cs, int cmd);
diff --git a/arch/arm/plat-omap/include/plat/iommu.h b/arch/arm/plat-omap/include/plat/iommu.h
index 69230d685538..174f1b9c8c03 100644
--- a/arch/arm/plat-omap/include/plat/iommu.h
+++ b/arch/arm/plat-omap/include/plat/iommu.h
@@ -31,6 +31,7 @@ struct iommu {
         struct clk      *clk;
         void __iomem    *regbase;
         struct device   *dev;
+        void            *isr_priv;
 
         unsigned int    refcount;
         struct mutex    iommu_lock;     /* global for this whole object */
@@ -47,7 +48,7 @@ struct iommu {
         struct list_head        mmap;
         struct mutex            mmap_lock; /* protect mmap */
 
-        int (*isr)(struct iommu *obj);
+        int (*isr)(struct iommu *obj, u32 da, u32 iommu_errs, void *priv);
 
         void *ctx; /* iommu context: registres saved area */
         u32 da_start;
@@ -109,6 +110,13 @@ struct iommu_platform_data {
         u32 da_end;
 };
 
+/* IOMMU errors */
+#define OMAP_IOMMU_ERR_TLB_MISS         (1 << 0)
+#define OMAP_IOMMU_ERR_TRANS_FAULT      (1 << 1)
+#define OMAP_IOMMU_ERR_EMU_MISS         (1 << 2)
+#define OMAP_IOMMU_ERR_TBLWALK_FAULT    (1 << 3)
+#define OMAP_IOMMU_ERR_MULTIHIT_FAULT   (1 << 4)
+
 #if defined(CONFIG_ARCH_OMAP1)
 #error "iommu for this processor not implemented yet"
 #else
@@ -154,11 +162,17 @@ extern void flush_iotlb_range(struct iommu *obj, u32 start, u32 end);
 extern void flush_iotlb_all(struct iommu *obj);
 
 extern int iopgtable_store_entry(struct iommu *obj, struct iotlb_entry *e);
+extern void iopgtable_lookup_entry(struct iommu *obj, u32 da, u32 **ppgd,
+                                   u32 **ppte);
 extern size_t iopgtable_clear_entry(struct iommu *obj, u32 iova);
 
 extern int iommu_set_da_range(struct iommu *obj, u32 start, u32 end);
 extern struct iommu *iommu_get(const char *name);
 extern void iommu_put(struct iommu *obj);
+extern int iommu_set_isr(const char *name,
+                         int (*isr)(struct iommu *obj, u32 da, u32 iommu_errs,
+                                    void *priv),
+                         void *isr_priv);
 
 extern void iommu_save_ctx(struct iommu *obj);
 extern void iommu_restore_ctx(struct iommu *obj);
diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h
index 2910de921c52..d77928370463 100644
--- a/arch/arm/plat-omap/include/plat/irqs.h
+++ b/arch/arm/plat-omap/include/plat/irqs.h
@@ -315,9 +315,12 @@
 #define INT_34XX_SSM_ABORT_IRQ  6
 #define INT_34XX_SYS_NIRQ       7
 #define INT_34XX_D2D_FW_IRQ     8
+#define INT_34XX_L3_DBG_IRQ     9
+#define INT_34XX_L3_APP_IRQ     10
 #define INT_34XX_PRCM_MPU_IRQ   11
 #define INT_34XX_MCBSP1_IRQ     16
 #define INT_34XX_MCBSP2_IRQ     17
+#define INT_34XX_GPMC_IRQ       20
 #define INT_34XX_MCBSP3_IRQ     22
 #define INT_34XX_MCBSP4_IRQ     23
 #define INT_34XX_CAM_IRQ        24
@@ -411,7 +414,13 @@
 #define TWL_IRQ_END             TWL6030_IRQ_END
 #endif
 
-#define NR_IRQS                 TWL_IRQ_END
+/* GPMC related */
+#define OMAP_GPMC_IRQ_BASE      (TWL_IRQ_END)
+#define OMAP_GPMC_NR_IRQS       7
+#define OMAP_GPMC_IRQ_END       (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
+
+
+#define NR_IRQS                 OMAP_GPMC_IRQ_END
 
 #define OMAP_IRQ_BIT(irq)       (1 << ((irq) % 32))
 
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index 6ecf1051e5f4..f8f690ab2997 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -37,6 +37,10 @@ static struct platform_device omap_mcbsp##port_nr = {	\
         .id     = OMAP_MCBSP##port_nr,                  \
 }
 
+#define MCBSP_CONFIG_TYPE2      0x2
+#define MCBSP_CONFIG_TYPE3      0x3
+#define MCBSP_CONFIG_TYPE4      0x4
+
 #define OMAP7XX_MCBSP1_BASE     0xfffb1000
 #define OMAP7XX_MCBSP2_BASE     0xfffb1800
 
@@ -48,32 +52,14 @@ static struct platform_device omap_mcbsp##port_nr = {	\
 #define OMAP1610_MCBSP2_BASE    0xfffb1000
 #define OMAP1610_MCBSP3_BASE    0xe1017000
 
-#define OMAP24XX_MCBSP1_BASE    0x48074000
-#define OMAP24XX_MCBSP2_BASE    0x48076000
-#define OMAP2430_MCBSP3_BASE    0x4808c000
-#define OMAP2430_MCBSP4_BASE    0x4808e000
-#define OMAP2430_MCBSP5_BASE    0x48096000
-
-#define OMAP34XX_MCBSP1_BASE    0x48074000
-#define OMAP34XX_MCBSP2_BASE    0x49022000
-#define OMAP34XX_MCBSP2_ST_BASE 0x49028000
-#define OMAP34XX_MCBSP3_BASE    0x49024000
-#define OMAP34XX_MCBSP3_ST_BASE 0x4902A000
-#define OMAP34XX_MCBSP3_BASE    0x49024000
-#define OMAP34XX_MCBSP4_BASE    0x49026000
-#define OMAP34XX_MCBSP5_BASE    0x48096000
-
-#define OMAP44XX_MCBSP1_BASE    0x49022000
-#define OMAP44XX_MCBSP2_BASE    0x49024000
-#define OMAP44XX_MCBSP3_BASE    0x49026000
-#define OMAP44XX_MCBSP4_BASE    0x48096000
-
-#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+#ifdef CONFIG_ARCH_OMAP1
 
 #define OMAP_MCBSP_REG_DRR2     0x00
 #define OMAP_MCBSP_REG_DRR1     0x02
 #define OMAP_MCBSP_REG_DXR2     0x04
 #define OMAP_MCBSP_REG_DXR1     0x06
+#define OMAP_MCBSP_REG_DRR      0x02
+#define OMAP_MCBSP_REG_DXR      0x06
 #define OMAP_MCBSP_REG_SPCR2    0x08
 #define OMAP_MCBSP_REG_SPCR1    0x0a
 #define OMAP_MCBSP_REG_RCR2     0x0c
@@ -414,8 +400,9 @@ struct omap_mcbsp_platform_data {
 #ifdef CONFIG_ARCH_OMAP3
         /* Sidetone block for McBSP 2 and 3 */
         unsigned long phys_base_st;
-        u16 buffer_size;
 #endif
+        u16 buffer_size;
+        unsigned int mcbsp_config_type;
 };
 
 struct omap_mcbsp_st_data {
@@ -431,6 +418,7 @@ struct omap_mcbsp_st_data {
 struct omap_mcbsp {
         struct device *dev;
         unsigned long phys_base;
+        unsigned long phys_dma_base;
         void __iomem *io_base;
         u8 id;
         u8 free;
@@ -457,7 +445,6 @@ struct omap_mcbsp {
         /* Protect the field .free, while checking if the mcbsp is in use */
         spinlock_t lock;
         struct omap_mcbsp_platform_data *pdata;
-        struct clk *iclk;
         struct clk *fclk;
 #ifdef CONFIG_ARCH_OMAP3
         struct omap_mcbsp_st_data *st_data;
@@ -466,7 +453,17 @@ struct omap_mcbsp {
         u16 max_rx_thres;
 #endif
         void *reg_cache;
+        unsigned int mcbsp_config_type;
 };
+
+/**
+ * omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod
+ * @sidetone: name of the sidetone device
+ */
+struct omap_mcbsp_dev_attr {
+        const char *sidetone;
+};
+
 extern struct omap_mcbsp **mcbsp_ptr;
 extern int omap_mcbsp_count, omap_mcbsp_cache_size;
 
@@ -474,8 +471,8 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size;
 #define id_to_mcbsp_ptr(id)             mcbsp_ptr[id];
 
 int omap_mcbsp_init(void);
-void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
-                                        int size);
+void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
+                        struct omap_mcbsp_platform_data *config, int size);
 void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config);
 #ifdef CONFIG_ARCH_OMAP3
 void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
@@ -525,6 +522,9 @@ int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
 void omap2_mcbsp1_mux_clkr_src(u8 mux);
 void omap2_mcbsp1_mux_fsr_src(u8 mux);
 
+int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream);
+int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream);
+
 #ifdef CONFIG_ARCH_OMAP3
 /* Sidetone specific API */
 int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index f57f36abb07e..f38fef9f1310 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -24,25 +24,19 @@
 #define OMAP1_MMC2_BASE         0xfffb7c00      /* omap16xx only */
 
 #define OMAP24XX_NR_MMC         2
-#define OMAP34XX_NR_MMC         3
-#define OMAP44XX_NR_MMC         5
 #define OMAP2420_MMC_SIZE       OMAP1_MMC_SIZE
-#define OMAP3_HSMMC_SIZE        0x200
-#define OMAP4_HSMMC_SIZE        0x1000
 #define OMAP2_MMC1_BASE         0x4809c000
-#define OMAP2_MMC2_BASE         0x480b4000
-#define OMAP3_MMC3_BASE         0x480ad000
-#define OMAP4_MMC4_BASE         0x480d1000
-#define OMAP4_MMC5_BASE         0x480d5000
+
 #define OMAP4_MMC_REG_OFFSET    0x100
-#define HSMMC5                  (1 << 4)
-#define HSMMC4                  (1 << 3)
-#define HSMMC3                  (1 << 2)
-#define HSMMC2                  (1 << 1)
-#define HSMMC1                  (1 << 0)
 
 #define OMAP_MMC_MAX_SLOTS      2
 
+#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT   BIT(1)
+
+struct omap_mmc_dev_attr {
+        u8 flags;
+};
+
 struct omap_mmc_platform_data {
         /* back-link to device */
         struct device *dev;
@@ -71,6 +65,9 @@ struct omap_mmc_platform_data {
 
         u64 dma_mask;
 
+        /* Integrating attributes from the omap_hwmod layer */
+        u8 controller_flags;
+
         /* Register offset deviation */
         u16 reg_offset;
 
@@ -159,8 +156,7 @@ extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
                                 int nr_controllers);
-void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
-                                int nr_controllers);
+void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
 int omap_mmc_add(const char *name, int id, unsigned long base,
                                 unsigned long size, unsigned int irq,
                                 struct omap_mmc_platform_data *data);
@@ -169,8 +165,7 @@ static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
                                 int nr_controllers)
 {
 }
-static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
-                                int nr_controllers)
+static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
 {
 }
 static inline int omap_mmc_add(const char *name, int id, unsigned long base,
diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h
index 6562cd082bb1..d86d1ecf0068 100644
--- a/arch/arm/plat-omap/include/plat/nand.h
+++ b/arch/arm/plat-omap/include/plat/nand.h
@@ -8,8 +8,16 @@
  * published by the Free Software Foundation.
  */
 
+#include <plat/gpmc.h>
 #include <linux/mtd/partitions.h>
 
+enum nand_io {
+        NAND_OMAP_PREFETCH_POLLED = 0,  /* prefetch polled mode, default */
+        NAND_OMAP_POLLED,               /* polled mode, without prefetch */
+        NAND_OMAP_PREFETCH_DMA,         /* prefetch enabled sDMA mode */
+        NAND_OMAP_PREFETCH_IRQ          /* prefetch enabled irq mode */
+};
+
 struct omap_nand_platform_data {
         unsigned int            options;
         int                     cs;
@@ -20,8 +28,11 @@ struct omap_nand_platform_data {
         int                     (*nand_setup)(void);
         int                     (*dev_ready)(struct omap_nand_platform_data *);
         int                     dma_channel;
+        int                     gpmc_irq;
+        enum nand_io            xfer_type;
         unsigned long           phys_base;
         int                     devsize;
+        enum omap_ecc           ecc_opt;
 };
 
 /* minimum size for IO mapping */
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index fedd82971c9e..8a1368fbbbd3 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -1,7 +1,7 @@
 /*
  * omap_hwmod macros, structures
  *
- * Copyright (C) 2009-2010 Nokia Corporation
+ * Copyright (C) 2009-2011 Nokia Corporation
  * Paul Walmsley
  *
  * Created in collaboration with (alphabetical order): Benoît Cousson,
@@ -30,6 +30,7 @@
 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
 
 #include <linux/kernel.h>
+#include <linux/init.h>
 #include <linux/list.h>
 #include <linux/ioport.h>
 #include <linux/spinlock.h>
@@ -178,7 +179,8 @@ struct omap_hwmod_omap2_firewall {
 #define ADDR_TYPE_RT            (1 << 1)
 
 /**
- * struct omap_hwmod_addr_space - MPU address space handled by the hwmod
+ * struct omap_hwmod_addr_space - address space handled by the hwmod
+ * @name: name of the address space
  * @pa_start: starting physical address
  * @pa_end: ending physical address
  * @flags: (see omap_hwmod_addr_space.flags macros above)
@@ -187,6 +189,7 @@ struct omap_hwmod_omap2_firewall {
  * structure.  GPMC is one example.
  */
 struct omap_hwmod_addr_space {
+        const char *name;
         u32 pa_start;
         u32 pa_end;
         u8 flags;
@@ -370,8 +373,10 @@ struct omap_hwmod_omap4_prcm {
  *     of standby, rather than relying on module smart-standby
  * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
  *     SDRAM controller, etc. XXX probably belongs outside the main hwmod file
+ *     XXX Should be HWMOD_SETUP_NO_RESET
  * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
  *     controller, etc. XXX probably belongs outside the main hwmod file
+ *     XXX Should be HWMOD_SETUP_NO_IDLE
  * HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE)
  *     when module is enabled, rather than the default, which is to
  *     enable autoidle
@@ -535,11 +540,13 @@ struct omap_hwmod {
         const struct omap_chip_id       omap_chip;
 };
 
-int omap_hwmod_init(struct omap_hwmod **ohs);
+int omap_hwmod_register(struct omap_hwmod **ohs);
 struct omap_hwmod *omap_hwmod_lookup(const char *name);
 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
                         void *data);
 
+int __init omap_hwmod_setup_one(const char *name);
+
 int omap_hwmod_enable(struct omap_hwmod *oh);
 int _omap_hwmod_enable(struct omap_hwmod *oh);
 int omap_hwmod_idle(struct omap_hwmod *oh);
@@ -554,6 +561,7 @@ int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
 int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
 
 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode);
+int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle);
 
 int omap_hwmod_reset(struct omap_hwmod *oh);
 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
@@ -588,6 +596,8 @@ int omap_hwmod_for_each_by_class(const char *classname,
 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state);
 u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh);
 
+int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
+
 /*
  * Chip variant-specific hwmod init routines - XXX should be converted
  * to use initcalls once the initial boot ordering is straightened out
diff --git a/arch/arm/plat-omap/include/plat/onenand.h b/arch/arm/plat-omap/include/plat/onenand.h
index affe87e9ece7..cbe897ca7f9e 100644
--- a/arch/arm/plat-omap/include/plat/onenand.h
+++ b/arch/arm/plat-omap/include/plat/onenand.h
@@ -15,12 +15,20 @@
 #define ONENAND_SYNC_READ       (1 << 0)
 #define ONENAND_SYNC_READWRITE  (1 << 1)
 
+struct onenand_freq_info {
+        u16                     maf_id;
+        u16                     dev_id;
+        u16                     ver_id;
+};
+
 struct omap_onenand_platform_data {
         int                     cs;
         int                     gpio_irq;
         struct mtd_partition    *parts;
         int                     nr_parts;
-        int                     (*onenand_setup)(void __iomem *, int freq);
+        int                     (*onenand_setup)(void __iomem *, int *freq_ptr);
+        int             (*get_freq)(const struct onenand_freq_info *freq_info,
+                                    bool *clk_dep);
         int                     dma_channel;
         u8                      flags;
         u8                      regulator_can_sleep;
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
index efd87c8dda69..925b12b500dc 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -124,8 +124,14 @@ struct omap_sdrc_params {
         u32 mr;
 };
 
-void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
+#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
+void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
                             struct omap_sdrc_params *sdrc_cs1);
+#else
+static inline void __init omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
+                                          struct omap_sdrc_params *sdrc_cs1) {};
+#endif
+
 int omap2_sdrc_get_params(unsigned long r,
                           struct omap_sdrc_params **sdrc_cs0,
                           struct omap_sdrc_params **sdrc_cs1);
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index b1107c08da56..e3eb0380090a 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -104,6 +104,9 @@ static int iommu_enable(struct iommu *obj)
         if (!obj)
                 return -EINVAL;
 
+        if (!arch_iommu)
+                return -ENODEV;
+
         clk_enable(obj->clk);
 
         err = arch_iommu->enable(obj);
@@ -780,25 +783,19 @@ static void iopgtable_clear_entry_all(struct iommu *obj)
  */
 static irqreturn_t iommu_fault_handler(int irq, void *data)
 {
-        u32 stat, da;
+        u32 da, errs;
         u32 *iopgd, *iopte;
-        int err = -EIO;
         struct iommu *obj = data;
 
         if (!obj->refcount)
                 return IRQ_NONE;
 
-        /* Dynamic loading TLB or PTE */
-        if (obj->isr)
-                err = obj->isr(obj);
-
-        if (!err)
-                return IRQ_HANDLED;
-
         clk_enable(obj->clk);
-        stat = iommu_report_fault(obj, &da);
+        errs = iommu_report_fault(obj, &da);
         clk_disable(obj->clk);
-        if (!stat)
+
+        /* Fault callback or TLB/PTE Dynamic loading */
+        if (obj->isr && !obj->isr(obj, da, errs, obj->isr_priv))
                 return IRQ_HANDLED;
 
         iommu_disable(obj);
@@ -806,15 +803,16 @@ static irqreturn_t iommu_fault_handler(int irq, void *data)
         iopgd = iopgd_offset(obj, da);
 
         if (!iopgd_is_table(*iopgd)) {
-                dev_err(obj->dev, "%s: da:%08x pgd:%p *pgd:%08x\n", __func__,
-                        da, iopgd, *iopgd);
+                dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p "
+                        "*pgd:px%08x\n", obj->name, errs, da, iopgd, *iopgd);
                 return IRQ_NONE;
         }
 
         iopte = iopte_offset(iopgd, da);
 
-        dev_err(obj->dev, "%s: da:%08x pgd:%p *pgd:%08x pte:%p *pte:%08x\n",
-                __func__, da, iopgd, *iopgd, iopte, *iopte);
+        dev_err(obj->dev, "%s: errs:0x%08x da:0x%08x pgd:0x%p *pgd:0x%08x "
+                "pte:0x%p *pte:0x%08x\n", obj->name, errs, da, iopgd, *iopgd,
+                iopte, *iopte);
 
         return IRQ_NONE;
 }
@@ -917,6 +915,33 @@ void iommu_put(struct iommu *obj)
 }
 EXPORT_SYMBOL_GPL(iommu_put);
 
+int iommu_set_isr(const char *name,
+                  int (*isr)(struct iommu *obj, u32 da, u32 iommu_errs,
+                             void *priv),
+                  void *isr_priv)
+{
+        struct device *dev;
+        struct iommu *obj;
+
+        dev = driver_find_device(&omap_iommu_driver.driver, NULL, (void *)name,
+                                 device_match_by_alias);
+        if (!dev)
+                return -ENODEV;
+
+        obj = to_iommu(dev);
+        mutex_lock(&obj->iommu_lock);
+        if (obj->refcount != 0) {
+                mutex_unlock(&obj->iommu_lock);
+                return -EBUSY;
+        }
+        obj->isr = isr;
+        obj->isr_priv = isr_priv;
+        mutex_unlock(&obj->iommu_lock);
+
+        return 0;
+}
+EXPORT_SYMBOL_GPL(iommu_set_isr);
+
 /*
  *      OMAP Device MMU(IOMMU) detection
  */
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 459b319a9fad..49d3208793e5 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -322,15 +322,18 @@ static void omap_mbox_fini(struct omap_mbox *mbox)
 
 struct omap_mbox *omap_mbox_get(const char *name, struct notifier_block *nb)
 {
-        struct omap_mbox *mbox;
-        int ret;
+        struct omap_mbox *_mbox, *mbox = NULL;
+        int i, ret;
 
         if (!mboxes)
                 return ERR_PTR(-EINVAL);
 
-        for (mbox = *mboxes; mbox; mbox++)
-                if (!strcmp(mbox->name, name))
+        for (i = 0; (_mbox = mboxes[i]); i++) {
+                if (!strcmp(_mbox->name, name)) {
+                        mbox = _mbox;
                         break;
+                }
+        }
 
         if (!mbox)
                 return ERR_PTR(-ENOENT);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index b5a6e178a7f9..d598d9fd65ac 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -27,6 +27,8 @@
 
 #include <plat/dma.h>
 #include <plat/mcbsp.h>
+#include <plat/omap_device.h>
+#include <linux/pm_runtime.h>
 
 /* XXX These "sideways" includes are a sign that something is wrong */
 #include "../mach-omap2/cm2xxx_3xxx.h"
@@ -227,10 +229,83 @@ void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg *config)
 }
 EXPORT_SYMBOL(omap_mcbsp_config);
 
+/**
+ * omap_mcbsp_dma_params - returns the dma channel number
+ * @id - mcbsp id
+ * @stream - indicates the direction of data flow (rx or tx)
+ *
+ * Returns the dma channel number for the rx channel or tx channel
+ * based on the value of @stream for the requested mcbsp given by @id
+ */
+int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream)
+{
+        struct omap_mcbsp *mcbsp;
+
+        if (!omap_mcbsp_check_valid_id(id)) {
+                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
+                return -ENODEV;
+        }
+        mcbsp = id_to_mcbsp_ptr(id);
+
+        if (stream)
+                return mcbsp->dma_rx_sync;
+        else
+                return mcbsp->dma_tx_sync;
+}
+EXPORT_SYMBOL(omap_mcbsp_dma_ch_params);
+
+/**
+ * omap_mcbsp_dma_reg_params - returns the address of mcbsp data register
+ * @id - mcbsp id
+ * @stream - indicates the direction of data flow (rx or tx)
+ *
+ * Returns the address of mcbsp data transmit register or data receive register
+ * to be used by DMA for transferring/receiving data based on the value of
+ * @stream for the requested mcbsp given by @id
+ */
+int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream)
+{
+        struct omap_mcbsp *mcbsp;
+        int data_reg;
+
+        if (!omap_mcbsp_check_valid_id(id)) {
+                printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1);
+                return -ENODEV;
+        }
+        mcbsp = id_to_mcbsp_ptr(id);
+
+        data_reg = mcbsp->phys_dma_base;
+
+        if (mcbsp->mcbsp_config_type < MCBSP_CONFIG_TYPE2) {
+                if (stream)
+                        data_reg += OMAP_MCBSP_REG_DRR1;
+                else
+                        data_reg += OMAP_MCBSP_REG_DXR1;
+        } else {
+                if (stream)
+                        data_reg += OMAP_MCBSP_REG_DRR;
+                else
+                        data_reg += OMAP_MCBSP_REG_DXR;
+        }
+
+        return data_reg;
+}
+EXPORT_SYMBOL(omap_mcbsp_dma_reg_params);
+
 #ifdef CONFIG_ARCH_OMAP3
+static struct omap_device *find_omap_device_by_dev(struct device *dev)
+{
+        struct platform_device *pdev = container_of(dev,
+                                        struct platform_device, dev);
+        return container_of(pdev, struct omap_device, pdev);
+}
+
 static void omap_st_on(struct omap_mcbsp *mcbsp)
 {
         unsigned int w;
+        struct omap_device *od;
+
+        od = find_omap_device_by_dev(mcbsp->dev);
 
         /*
          * Sidetone uses McBSP ICLK - which must not idle when sidetones
@@ -244,9 +319,6 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
         w = MCBSP_READ(mcbsp, SSELCR);
         MCBSP_WRITE(mcbsp, SSELCR, w | SIDETONEEN);
 
-        w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
-        MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE));
-
         /* Enable Sidetone from Sidetone Core */
         w = MCBSP_ST_READ(mcbsp, SSELCR);
         MCBSP_ST_WRITE(mcbsp, SSELCR, w | ST_SIDETONEEN);
@@ -255,13 +327,13 @@ static void omap_st_on(struct omap_mcbsp *mcbsp)
 static void omap_st_off(struct omap_mcbsp *mcbsp)
 {
         unsigned int w;
+        struct omap_device *od;
+
+        od = find_omap_device_by_dev(mcbsp->dev);
 
         w = MCBSP_ST_READ(mcbsp, SSELCR);
         MCBSP_ST_WRITE(mcbsp, SSELCR, w & ~(ST_SIDETONEEN));
 
-        w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
-        MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w | ST_AUTOIDLE);
-
         w = MCBSP_READ(mcbsp, SSELCR);
         MCBSP_WRITE(mcbsp, SSELCR, w & ~(SIDETONEEN));
 
@@ -273,9 +345,9 @@ static void omap_st_off(struct omap_mcbsp *mcbsp)
 static void omap_st_fir_write(struct omap_mcbsp *mcbsp, s16 *fir)
 {
         u16 val, i;
+        struct omap_device *od;
 
-        val = MCBSP_ST_READ(mcbsp, SYSCONFIG);
-        MCBSP_ST_WRITE(mcbsp, SYSCONFIG, val & ~(ST_AUTOIDLE));
+        od = find_omap_device_by_dev(mcbsp->dev);
 
         val = MCBSP_ST_READ(mcbsp, SSELCR);
 
@@ -303,9 +375,9 @@ static void omap_st_chgain(struct omap_mcbsp *mcbsp)
 {
         u16 w;
         struct omap_mcbsp_st_data *st_data = mcbsp->st_data;
+        struct omap_device *od;
 
-        w = MCBSP_ST_READ(mcbsp, SYSCONFIG);
-        MCBSP_ST_WRITE(mcbsp, SYSCONFIG, w & ~(ST_AUTOIDLE));
+        od = find_omap_device_by_dev(mcbsp->dev);
 
         w = MCBSP_ST_READ(mcbsp, SSELCR);
 
@@ -648,48 +720,33 @@ EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
 
 static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
 {
+        struct omap_device *od;
+
+        od = find_omap_device_by_dev(mcbsp->dev);
         /*
          * Enable wakup behavior, smart idle and all wakeups
          * REVISIT: some wakeups may be unnecessary
          */
         if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
-                u16 syscon;
-
-                syscon = MCBSP_READ(mcbsp, SYSCON);
-                syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
-
-                if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
-                        syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |
-                                        CLOCKACTIVITY(0x02));
-                        MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
-                } else {
-                        syscon |= SIDLEMODE(0x01);
-                }
-
-                MCBSP_WRITE(mcbsp, SYSCON, syscon);
+                MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN);
         }
 }
 
 static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
 {
+        struct omap_device *od;
+
+        od = find_omap_device_by_dev(mcbsp->dev);
+
         /*
          * Disable wakup behavior, smart idle and all wakeups
          */
         if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
-                u16 syscon;
-
-                syscon = MCBSP_READ(mcbsp, SYSCON);
-                syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
                 /*
                  * HW bug workaround - If no_idle mode is taken, we need to
                  * go to smart_idle before going to always_idle, or the
                  * device will not hit retention anymore.
                  */
-                syscon |= SIDLEMODE(0x02);
-                MCBSP_WRITE(mcbsp, SYSCON, syscon);
-
-                syscon &= ~(SIDLEMODE(0x03));
-                MCBSP_WRITE(mcbsp, SYSCON, syscon);
 
                 MCBSP_WRITE(mcbsp, WAKEUPEN, 0);
         }
@@ -764,8 +821,7 @@ int omap_mcbsp_request(unsigned int id)
         if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request)
                 mcbsp->pdata->ops->request(id);
 
-        clk_enable(mcbsp->iclk);
-        clk_enable(mcbsp->fclk);
+        pm_runtime_get_sync(mcbsp->dev);
 
         /* Do procedure specific to omap34xx arch, if applicable */
         omap34xx_mcbsp_request(mcbsp);
@@ -813,8 +869,7 @@ err_clk_disable:
         /* Do procedure specific to omap34xx arch, if applicable */
         omap34xx_mcbsp_free(mcbsp);
 
-        clk_disable(mcbsp->fclk);
-        clk_disable(mcbsp->iclk);
+        pm_runtime_put_sync(mcbsp->dev);
 
         spin_lock(&mcbsp->lock);
         mcbsp->free = true;
@@ -844,8 +899,7 @@ void omap_mcbsp_free(unsigned int id)
         /* Do procedure specific to omap34xx arch, if applicable */
         omap34xx_mcbsp_free(mcbsp);
 
-        clk_disable(mcbsp->fclk);
-        clk_disable(mcbsp->iclk);
+        pm_runtime_put_sync(mcbsp->dev);
 
         if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) {
                 /* Free IRQs */
@@ -1649,7 +1703,8 @@ static const struct attribute_group sidetone_attr_group = {
 
 static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
 {
-        struct omap_mcbsp_platform_data *pdata = mcbsp->pdata;
+        struct platform_device *pdev;
+        struct resource *res;
         struct omap_mcbsp_st_data *st_data;
         int err;
 
@@ -1659,7 +1714,10 @@ static int __devinit omap_st_add(struct omap_mcbsp *mcbsp)
                 goto err1;
         }
 
-        st_data->io_base_st = ioremap(pdata->phys_base_st, SZ_4K);
+        pdev = container_of(mcbsp->dev, struct platform_device, dev);
+
+        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sidetone");
+        st_data->io_base_st = ioremap(res->start, resource_size(res));
         if (!st_data->io_base_st) {
                 err = -ENOMEM;
                 goto err2;
@@ -1748,6 +1806,7 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
         struct omap_mcbsp_platform_data *pdata = pdev->dev.platform_data;
         struct omap_mcbsp *mcbsp;
         int id = pdev->id - 1;
+        struct resource *res;
         int ret = 0;
 
         if (!pdata) {
@@ -1777,47 +1836,78 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev)
         mcbsp->dma_tx_lch = -1;
         mcbsp->dma_rx_lch = -1;
 
-        mcbsp->phys_base = pdata->phys_base;
-        mcbsp->io_base = ioremap(pdata->phys_base, SZ_4K);
+        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
+        if (!res) {
+                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+                if (!res) {
+                        dev_err(&pdev->dev, "%s:mcbsp%d has invalid memory"
+                                        "resource\n", __func__, pdev->id);
+                        ret = -ENOMEM;
+                        goto exit;
+                }
+        }
+        mcbsp->phys_base = res->start;
+        omap_mcbsp_cache_size = resource_size(res);
+        mcbsp->io_base = ioremap(res->start, resource_size(res));
         if (!mcbsp->io_base) {
                 ret = -ENOMEM;
                 goto err_ioremap;
         }
 
+        res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma");
+        if (!res)
+                mcbsp->phys_dma_base = mcbsp->phys_base;
+        else
+                mcbsp->phys_dma_base = res->start;
+
         /* Default I/O is IRQ based */
         mcbsp->io_type = OMAP_MCBSP_IRQ_IO;
-        mcbsp->tx_irq = pdata->tx_irq;
-        mcbsp->rx_irq = pdata->rx_irq;
-        mcbsp->dma_rx_sync = pdata->dma_rx_sync;
-        mcbsp->dma_tx_sync = pdata->dma_tx_sync;
 
-        mcbsp->iclk = clk_get(&pdev->dev, "ick");
-        if (IS_ERR(mcbsp->iclk)) {
-                ret = PTR_ERR(mcbsp->iclk);
-                dev_err(&pdev->dev, "unable to get ick: %d\n", ret);
-                goto err_iclk;
+        mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx");
+        mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx");
+
+        /* From OMAP4 there will be a single irq line */
+        if (mcbsp->tx_irq == -ENXIO)
+                mcbsp->tx_irq = platform_get_irq(pdev, 0);
+
+        res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
+        if (!res) {
+                dev_err(&pdev->dev, "%s:mcbsp%d has invalid rx DMA channel\n",
+                                        __func__, pdev->id);
+                ret = -ENODEV;
+                goto err_res;
+        }
+        mcbsp->dma_rx_sync = res->start;
+
+        res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
+        if (!res) {
+                dev_err(&pdev->dev, "%s:mcbsp%d has invalid tx DMA channel\n",
+                                        __func__, pdev->id);
+                ret = -ENODEV;
+                goto err_res;
         }
+        mcbsp->dma_tx_sync = res->start;
 
         mcbsp->fclk = clk_get(&pdev->dev, "fck");
         if (IS_ERR(mcbsp->fclk)) {
                 ret = PTR_ERR(mcbsp->fclk);
                 dev_err(&pdev->dev, "unable to get fck: %d\n", ret);
-                goto err_fclk;
+                goto err_res;
         }
 
         mcbsp->pdata = pdata;
         mcbsp->dev = &pdev->dev;
         mcbsp_ptr[id] = mcbsp;
+        mcbsp->mcbsp_config_type = pdata->mcbsp_config_type;
         platform_set_drvdata(pdev, mcbsp);
+        pm_runtime_enable(mcbsp->dev);
 
         /* Initialize mcbsp properties for OMAP34XX if needed / applicable */
         omap34xx_device_init(mcbsp);
 
         return 0;
 
-err_fclk:
-        clk_put(mcbsp->iclk);
-err_iclk:
+err_res:
         iounmap(mcbsp->io_base);
 err_ioremap:
         kfree(mcbsp);
@@ -1839,7 +1929,6 @@ static int __devexit omap_mcbsp_remove(struct platform_device *pdev)
                 omap34xx_device_exit(mcbsp);
 
                 clk_put(mcbsp->fclk);
-                clk_put(mcbsp->iclk);
 
                 iounmap(mcbsp->io_base);
                 kfree(mcbsp);
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 57adb270767b..9bbda9acb73b 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -83,9 +83,11 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/clk.h>
+#include <linux/clkdev.h>
 
 #include <plat/omap_device.h>
 #include <plat/omap_hwmod.h>
+#include <plat/clock.h>
 
 /* These parameters are passed to _omap_device_{de,}activate() */
 #define USE_WAKEUP_LAT                  0
@@ -239,12 +241,12 @@ static inline struct omap_device *_find_by_pdev(struct platform_device *pdev)
 }
 
 /**
- * _add_optional_clock_alias - Add clock alias for hwmod optional clocks
+ * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks
  * @od: struct omap_device *od
  *
  * For every optional clock present per hwmod per omap_device, this function
- * adds an entry in the clocks list of the form <dev-id=dev_name, con-id=role>
- * if an entry is already present in it with the form <dev-id=NULL, con-id=role>
+ * adds an entry in the clkdev table of the form <dev-id=dev_name, con-id=role>
+ * if it does not exist already.
  *
  * The function is called from inside omap_device_build_ss(), after
  * omap_device_register.
@@ -254,25 +256,39 @@ static inline struct omap_device *_find_by_pdev(struct platform_device *pdev)
  *
  * No return value.
  */
-static void _add_optional_clock_alias(struct omap_device *od,
+static void _add_optional_clock_clkdev(struct omap_device *od,
                                       struct omap_hwmod *oh)
 {
         int i;
 
         for (i = 0; i < oh->opt_clks_cnt; i++) {
                 struct omap_hwmod_opt_clk *oc;
-                int r;
+                struct clk *r;
+                struct clk_lookup *l;
 
                 oc = &oh->opt_clks[i];
 
                 if (!oc->_clk)
                         continue;
 
-                r = clk_add_alias(oc->role, dev_name(&od->pdev.dev),
-                                  (char *)oc->clk, &od->pdev.dev);
-                if (r)
-                        pr_err("omap_device: %s: clk_add_alias for %s failed\n",
+                r = clk_get_sys(dev_name(&od->pdev.dev), oc->role);
+                if (!IS_ERR(r))
+                        continue; /* clkdev entry exists */
+
+                r = omap_clk_get_by_name((char *)oc->clk);
+                if (IS_ERR(r)) {
+                        pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n",
+                               dev_name(&od->pdev.dev), oc->clk);
+                        continue;
+                }
+
+                l = clkdev_alloc(r, oc->role, dev_name(&od->pdev.dev));
+                if (!l) {
+                        pr_err("omap_device: %s: clkdev_alloc for %s failed\n",
                                dev_name(&od->pdev.dev), oc->role);
+                        return;
+                }
+                clkdev_add(l);
         }
 }
 
@@ -480,7 +496,7 @@ struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
 
         for (i = 0; i < oh_cnt; i++) {
                 hwmods[i]->od = od;
-                _add_optional_clock_alias(od, hwmods[i]);
+                _add_optional_clock_clkdev(od, hwmods[i]);
         }
 
         if (ret)
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index aedcb3be4e66..9d80064e979b 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -405,20 +405,6 @@ static inline int omap34xx_sram_init(void)
 }
 #endif
 
-#ifdef CONFIG_ARCH_OMAP4
-static int __init omap44xx_sram_init(void)
-{
-        printk(KERN_ERR "FIXME: %s not implemented\n", __func__);
-
-        return -ENODEV;
-}
-#else
-static inline int omap44xx_sram_init(void)
-{
-        return 0;
-}
-#endif
-
 int __init omap_sram_init(void)
 {
         omap_detect_sram();
@@ -432,8 +418,6 @@ int __init omap_sram_init(void)
                 omap243x_sram_init();
         else if (cpu_is_omap34xx())
                 omap34xx_sram_init();
-        else if (cpu_is_omap44xx())
-                omap44xx_sram_init();
 
         return 0;
 }