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-rw-r--r--arch/arm/plat-omap/counter_32k.c1
-rw-r--r--arch/arm/plat-omap/dma.c2
-rw-r--r--arch/arm/plat-omap/dmtimer.c2
-rw-r--r--arch/arm/plat-omap/include/plat/gpio.h29
-rw-r--r--arch/arm/plat-omap/include/plat/hardware.h6
-rw-r--r--arch/arm/plat-omap/include/plat/io.h277
-rw-r--r--arch/arm/plat-omap/include/plat/keypad.h2
-rw-r--r--arch/arm/plat-omap/include/plat/mcspi.h3
-rw-r--r--arch/arm/plat-omap/include/plat/omap_device.h2
-rw-r--r--arch/arm/plat-omap/include/plat/serial.h1
-rw-r--r--arch/arm/plat-omap/include/plat/tc.h17
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h41
-rw-r--r--arch/arm/plat-omap/mux.c5
-rw-r--r--arch/arm/plat-omap/omap-pm-noop.c2
-rw-r--r--arch/arm/plat-omap/omap_device.c24
-rw-r--r--arch/arm/plat-omap/sram.c9
-rw-r--r--arch/arm/plat-omap/usb.c4
17 files changed, 91 insertions, 336 deletions
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index 5f0f2292b7fb..5068fe5a6910 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -21,6 +21,7 @@
21 21
22#include <asm/sched_clock.h> 22#include <asm/sched_clock.h>
23 23
24#include <plat/hardware.h>
24#include <plat/common.h> 25#include <plat/common.h>
25#include <plat/board.h> 26#include <plat/board.h>
26 27
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index cb856fe0434a..74300ae29b71 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -164,6 +164,8 @@ static inline void set_gdma_dev(int req, int dev)
164} 164}
165#else 165#else
166#define set_gdma_dev(req, dev) do {} while (0) 166#define set_gdma_dev(req, dev) do {} while (0)
167#define omap_readl(reg) 0
168#define omap_writel(val, reg) do {} while (0)
167#endif 169#endif
168 170
169void omap_set_dma_priority(int lch, int dst_port, int priority) 171void omap_set_dma_priority(int lch, int dst_port, int priority)
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 0b77fe87e010..652139c0339e 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -43,6 +43,8 @@
43 43
44#include <plat/dmtimer.h> 44#include <plat/dmtimer.h>
45 45
46#include <mach/hardware.h>
47
46static LIST_HEAD(omap_timer_list); 48static LIST_HEAD(omap_timer_list);
47static DEFINE_SPINLOCK(dm_timer_lock); 49static DEFINE_SPINLOCK(dm_timer_lock);
48 50
diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
index 9e86ee0aed0a..cb75b657b04b 100644
--- a/arch/arm/plat-omap/include/plat/gpio.h
+++ b/arch/arm/plat-omap/include/plat/gpio.h
@@ -162,13 +162,6 @@
162 IH_MPUIO_BASE + ((nr) & 0x0f) : \ 162 IH_MPUIO_BASE + ((nr) & 0x0f) : \
163 IH_GPIO_BASE + (nr)) 163 IH_GPIO_BASE + (nr))
164 164
165#define METHOD_MPUIO 0
166#define METHOD_GPIO_1510 1
167#define METHOD_GPIO_1610 2
168#define METHOD_GPIO_7XX 3
169#define METHOD_GPIO_24XX 5
170#define METHOD_GPIO_44XX 6
171
172struct omap_gpio_dev_attr { 165struct omap_gpio_dev_attr {
173 int bank_width; /* GPIO bank width */ 166 int bank_width; /* GPIO bank width */
174 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ 167 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
@@ -184,10 +177,21 @@ struct omap_gpio_reg_offs {
184 u16 irqstatus; 177 u16 irqstatus;
185 u16 irqstatus2; 178 u16 irqstatus2;
186 u16 irqenable; 179 u16 irqenable;
180 u16 irqenable2;
187 u16 set_irqenable; 181 u16 set_irqenable;
188 u16 clr_irqenable; 182 u16 clr_irqenable;
189 u16 debounce; 183 u16 debounce;
190 u16 debounce_en; 184 u16 debounce_en;
185 u16 ctrl;
186 u16 wkup_en;
187 u16 leveldetect0;
188 u16 leveldetect1;
189 u16 risingdetect;
190 u16 fallingdetect;
191 u16 irqctrl;
192 u16 edgectrl1;
193 u16 edgectrl2;
194 u16 pinctrl;
191 195
192 bool irqenable_inv; 196 bool irqenable_inv;
193}; 197};
@@ -198,19 +202,20 @@ struct omap_gpio_platform_data {
198 int bank_width; /* GPIO bank width */ 202 int bank_width; /* GPIO bank width */
199 int bank_stride; /* Only needed for omap1 MPUIO */ 203 int bank_stride; /* Only needed for omap1 MPUIO */
200 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ 204 bool dbck_flag; /* dbck required or not - True for OMAP3&4 */
205 bool loses_context; /* whether the bank would ever lose context */
206 bool is_mpuio; /* whether the bank is of type MPUIO */
207 u32 non_wakeup_gpios;
201 208
202 struct omap_gpio_reg_offs *regs; 209 struct omap_gpio_reg_offs *regs;
203};
204 210
205/* TODO: Analyze removing gpio_bank_count usage from driver code */ 211 /* Return context loss count due to PM states changing */
206extern int gpio_bank_count; 212 int (*get_context_loss_count)(struct device *dev);
213};
207 214
208extern void omap2_gpio_prepare_for_idle(int off_mode); 215extern void omap2_gpio_prepare_for_idle(int off_mode);
209extern void omap2_gpio_resume_after_idle(void); 216extern void omap2_gpio_resume_after_idle(void);
210extern void omap_set_gpio_debounce(int gpio, int enable); 217extern void omap_set_gpio_debounce(int gpio, int enable);
211extern void omap_set_gpio_debounce_time(int gpio, int enable); 218extern void omap_set_gpio_debounce_time(int gpio, int enable);
212extern void omap_gpio_save_context(void);
213extern void omap_gpio_restore_context(void);
214/*-------------------------------------------------------------------------*/ 219/*-------------------------------------------------------------------------*/
215 220
216/* Wrappers for "new style" GPIO calls, using the new infrastructure 221/* Wrappers for "new style" GPIO calls, using the new infrastructure
diff --git a/arch/arm/plat-omap/include/plat/hardware.h b/arch/arm/plat-omap/include/plat/hardware.h
index e897978371c2..537b05ae1f51 100644
--- a/arch/arm/plat-omap/include/plat/hardware.h
+++ b/arch/arm/plat-omap/include/plat/hardware.h
@@ -43,6 +43,12 @@
43#endif 43#endif
44#include <plat/serial.h> 44#include <plat/serial.h>
45 45
46#ifdef __ASSEMBLER__
47#define IOMEM(x) (x)
48#else
49#define IOMEM(x) ((void __force __iomem *)(x))
50#endif
51
46/* 52/*
47 * --------------------------------------------------------------------------- 53 * ---------------------------------------------------------------------------
48 * Common definitions for all OMAP processors 54 * Common definitions for all OMAP processors
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
deleted file mode 100644
index 0696bae1818b..000000000000
--- a/arch/arm/plat-omap/include/plat/io.h
+++ /dev/null
@@ -1,277 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/io.h
3 *
4 * IO definitions for TI OMAP processors and boards
5 *
6 * Copied from arch/arm/mach-sa1100/include/mach/io.h
7 * Copyright (C) 1997-1999 Russell King
8 *
9 * Copyright (C) 2009 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * Modifications:
33 * 06-12-1997 RMK Created.
34 * 07-04-1999 RMK Major cleanup
35 */
36
37#ifndef __ASM_ARM_ARCH_IO_H
38#define __ASM_ARM_ARCH_IO_H
39
40#include <mach/hardware.h>
41
42#define IO_SPACE_LIMIT 0xffffffff
43
44/*
45 * We don't actually have real ISA nor PCI buses, but there is so many
46 * drivers out there that might just work if we fake them...
47 */
48#define __io(a) __typesafe_io(a)
49#define __mem_pci(a) (a)
50
51/*
52 * ----------------------------------------------------------------------------
53 * I/O mapping
54 * ----------------------------------------------------------------------------
55 */
56
57#ifdef __ASSEMBLER__
58#define IOMEM(x) (x)
59#else
60#define IOMEM(x) ((void __force __iomem *)(x))
61#endif
62
63#define OMAP1_IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
64#define OMAP1_IO_ADDRESS(pa) IOMEM((pa) - OMAP1_IO_OFFSET)
65
66#define OMAP2_L3_IO_OFFSET 0x90000000
67#define OMAP2_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
68
69
70#define OMAP2_L4_IO_OFFSET 0xb2000000
71#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
72
73#define OMAP4_L3_IO_OFFSET 0xb4000000
74#define OMAP4_L3_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
75
76#define AM33XX_L4_WK_IO_OFFSET 0xb5000000
77#define AM33XX_L4_WK_IO_ADDRESS(pa) IOMEM((pa) + AM33XX_L4_WK_IO_OFFSET)
78
79#define OMAP4_L3_PER_IO_OFFSET 0xb1100000
80#define OMAP4_L3_PER_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
81
82#define OMAP4_GPMC_IO_OFFSET 0xa9000000
83#define OMAP4_GPMC_IO_ADDRESS(pa) IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
84
85#define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */
86#define OMAP2_EMU_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
87
88/*
89 * ----------------------------------------------------------------------------
90 * Omap1 specific IO mapping
91 * ----------------------------------------------------------------------------
92 */
93
94#define OMAP1_IO_PHYS 0xFFFB0000
95#define OMAP1_IO_SIZE 0x40000
96#define OMAP1_IO_VIRT (OMAP1_IO_PHYS - OMAP1_IO_OFFSET)
97
98/*
99 * ----------------------------------------------------------------------------
100 * Omap2 specific IO mapping
101 * ----------------------------------------------------------------------------
102 */
103
104/* We map both L3 and L4 on OMAP2 */
105#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/
106#define L3_24XX_VIRT (L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
107#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
108#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */
109#define L4_24XX_VIRT (L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
110#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
111
112#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */
113#define L4_WK_243X_VIRT (L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
114#define L4_WK_243X_SIZE SZ_1M
115#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE
116#define OMAP243X_GPMC_VIRT (OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
117 /* 0x6e000000 --> 0xfe000000 */
118#define OMAP243X_GPMC_SIZE SZ_1M
119#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE
120 /* 0x6D000000 --> 0xfd000000 */
121#define OMAP243X_SDRC_VIRT (OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
122#define OMAP243X_SDRC_SIZE SZ_1M
123#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE
124 /* 0x6c000000 --> 0xfc000000 */
125#define OMAP243X_SMS_VIRT (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
126#define OMAP243X_SMS_SIZE SZ_1M
127
128/* 2420 IVA */
129#define DSP_MEM_2420_PHYS OMAP2420_DSP_MEM_BASE
130 /* 0x58000000 --> 0xfc100000 */
131#define DSP_MEM_2420_VIRT 0xfc100000
132#define DSP_MEM_2420_SIZE 0x28000
133#define DSP_IPI_2420_PHYS OMAP2420_DSP_IPI_BASE
134 /* 0x59000000 --> 0xfc128000 */
135#define DSP_IPI_2420_VIRT 0xfc128000
136#define DSP_IPI_2420_SIZE SZ_4K
137#define DSP_MMU_2420_PHYS OMAP2420_DSP_MMU_BASE
138 /* 0x5a000000 --> 0xfc129000 */
139#define DSP_MMU_2420_VIRT 0xfc129000
140#define DSP_MMU_2420_SIZE SZ_4K
141
142/* 2430 IVA2.1 - currently unmapped */
143
144/*
145 * ----------------------------------------------------------------------------
146 * Omap3 specific IO mapping
147 * ----------------------------------------------------------------------------
148 */
149
150/* We map both L3 and L4 on OMAP3 */
151#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 --> 0xf8000000 */
152#define L3_34XX_VIRT (L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
153#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
154
155#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 --> 0xfa000000 */
156#define L4_34XX_VIRT (L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
157#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
158
159/*
160 * ----------------------------------------------------------------------------
161 * AM33XX specific IO mapping
162 * ----------------------------------------------------------------------------
163 */
164#define L4_WK_AM33XX_PHYS L4_WK_AM33XX_BASE
165#define L4_WK_AM33XX_VIRT (L4_WK_AM33XX_PHYS + AM33XX_L4_WK_IO_OFFSET)
166#define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
167
168/*
169 * Need to look at the Size 4M for L4.
170 * VPOM3430 was not working for Int controller
171 */
172
173#define L4_PER_34XX_PHYS L4_PER_34XX_BASE
174 /* 0x49000000 --> 0xfb000000 */
175#define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
176#define L4_PER_34XX_SIZE SZ_1M
177
178#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE
179 /* 0x54000000 --> 0xfe800000 */
180#define L4_EMU_34XX_VIRT (L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
181#define L4_EMU_34XX_SIZE SZ_8M
182
183#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE
184 /* 0x6e000000 --> 0xfe000000 */
185#define OMAP34XX_GPMC_VIRT (OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
186#define OMAP34XX_GPMC_SIZE SZ_1M
187
188#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE
189 /* 0x6c000000 --> 0xfc000000 */
190#define OMAP343X_SMS_VIRT (OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
191#define OMAP343X_SMS_SIZE SZ_1M
192
193#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE
194 /* 0x6D000000 --> 0xfd000000 */
195#define OMAP343X_SDRC_VIRT (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
196#define OMAP343X_SDRC_SIZE SZ_1M
197
198/* 3430 IVA - currently unmapped */
199
200/*
201 * ----------------------------------------------------------------------------
202 * Omap4 specific IO mapping
203 * ----------------------------------------------------------------------------
204 */
205
206/* We map both L3 and L4 on OMAP4 */
207#define L3_44XX_PHYS L3_44XX_BASE /* 0x44000000 --> 0xf8000000 */
208#define L3_44XX_VIRT (L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
209#define L3_44XX_SIZE SZ_1M
210
211#define L4_44XX_PHYS L4_44XX_BASE /* 0x4a000000 --> 0xfc000000 */
212#define L4_44XX_VIRT (L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
213#define L4_44XX_SIZE SZ_4M
214
215#define L4_PER_44XX_PHYS L4_PER_44XX_BASE
216 /* 0x48000000 --> 0xfa000000 */
217#define L4_PER_44XX_VIRT (L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
218#define L4_PER_44XX_SIZE SZ_4M
219
220#define L4_ABE_44XX_PHYS L4_ABE_44XX_BASE
221 /* 0x49000000 --> 0xfb000000 */
222#define L4_ABE_44XX_VIRT (L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
223#define L4_ABE_44XX_SIZE SZ_1M
224
225#define L4_EMU_44XX_PHYS L4_EMU_44XX_BASE
226 /* 0x54000000 --> 0xfe800000 */
227#define L4_EMU_44XX_VIRT (L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
228#define L4_EMU_44XX_SIZE SZ_8M
229
230#define OMAP44XX_GPMC_PHYS OMAP44XX_GPMC_BASE
231 /* 0x50000000 --> 0xf9000000 */
232#define OMAP44XX_GPMC_VIRT (OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
233#define OMAP44XX_GPMC_SIZE SZ_1M
234
235
236#define OMAP44XX_EMIF1_PHYS OMAP44XX_EMIF1_BASE
237 /* 0x4c000000 --> 0xfd100000 */
238#define OMAP44XX_EMIF1_VIRT (OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
239#define OMAP44XX_EMIF1_SIZE SZ_1M
240
241#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
242 /* 0x4d000000 --> 0xfd200000 */
243#define OMAP44XX_EMIF2_SIZE SZ_1M
244#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF1_SIZE)
245
246#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
247 /* 0x4e000000 --> 0xfd300000 */
248#define OMAP44XX_DMM_SIZE SZ_1M
249#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_EMIF2_SIZE)
250/*
251 * ----------------------------------------------------------------------------
252 * Omap specific register access
253 * ----------------------------------------------------------------------------
254 */
255
256#ifndef __ASSEMBLER__
257
258/*
259 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
260 */
261
262extern u8 omap_readb(u32 pa);
263extern u16 omap_readw(u32 pa);
264extern u32 omap_readl(u32 pa);
265extern void omap_writeb(u8 v, u32 pa);
266extern void omap_writew(u16 v, u32 pa);
267extern void omap_writel(u32 v, u32 pa);
268
269struct omap_sdrc_params;
270extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
271 struct omap_sdrc_params *sdrc_cs1);
272
273extern void __init omap_init_consistent_dma_size(void);
274
275#endif
276
277#endif
diff --git a/arch/arm/plat-omap/include/plat/keypad.h b/arch/arm/plat-omap/include/plat/keypad.h
index 793ce9d53294..a6b21eddb212 100644
--- a/arch/arm/plat-omap/include/plat/keypad.h
+++ b/arch/arm/plat-omap/include/plat/keypad.h
@@ -12,6 +12,8 @@
12 12
13#ifndef CONFIG_ARCH_OMAP1 13#ifndef CONFIG_ARCH_OMAP1
14#warning Please update the board to use matrix-keypad driver 14#warning Please update the board to use matrix-keypad driver
15#define omap_readw(reg) 0
16#define omap_writew(val, reg) do {} while (0)
15#endif 17#endif
16#include <linux/input/matrix_keypad.h> 18#include <linux/input/matrix_keypad.h>
17 19
diff --git a/arch/arm/plat-omap/include/plat/mcspi.h b/arch/arm/plat-omap/include/plat/mcspi.h
index 3d51b18131cc..a357eb26bd25 100644
--- a/arch/arm/plat-omap/include/plat/mcspi.h
+++ b/arch/arm/plat-omap/include/plat/mcspi.h
@@ -18,9 +18,6 @@ struct omap2_mcspi_dev_attr {
18 18
19struct omap2_mcspi_device_config { 19struct omap2_mcspi_device_config {
20 unsigned turbo_mode:1; 20 unsigned turbo_mode:1;
21
22 /* Do we want one channel enabled at the same time? */
23 unsigned single_channel:1;
24}; 21};
25 22
26#endif 23#endif
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h
index 05f7615b61f0..4327b2c90c3d 100644
--- a/arch/arm/plat-omap/include/plat/omap_device.h
+++ b/arch/arm/plat-omap/include/plat/omap_device.h
@@ -36,7 +36,7 @@
36 36
37#include <plat/omap_hwmod.h> 37#include <plat/omap_hwmod.h>
38 38
39extern struct device omap_device_parent; 39extern struct dev_pm_domain omap_device_pm_domain;
40 40
41/* omap_device._state values */ 41/* omap_device._state values */
42#define OMAP_DEVICE_STATE_UNKNOWN 0 42#define OMAP_DEVICE_STATE_UNKNOWN 0
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h
index 198d1e6a4a6c..b073e5f2b190 100644
--- a/arch/arm/plat-omap/include/plat/serial.h
+++ b/arch/arm/plat-omap/include/plat/serial.h
@@ -110,7 +110,6 @@ struct omap_board_data;
110struct omap_uart_port_info; 110struct omap_uart_port_info;
111 111
112extern void omap_serial_init(void); 112extern void omap_serial_init(void);
113extern int omap_uart_can_sleep(void);
114extern void omap_serial_board_init(struct omap_uart_port_info *platform_data); 113extern void omap_serial_board_init(struct omap_uart_port_info *platform_data);
115extern void omap_serial_init_port(struct omap_board_data *bdata, 114extern void omap_serial_init_port(struct omap_board_data *bdata,
116 struct omap_uart_port_info *platform_data); 115 struct omap_uart_port_info *platform_data);
diff --git a/arch/arm/plat-omap/include/plat/tc.h b/arch/arm/plat-omap/include/plat/tc.h
index d2fcd789bb9a..1b4b2da86203 100644
--- a/arch/arm/plat-omap/include/plat/tc.h
+++ b/arch/arm/plat-omap/include/plat/tc.h
@@ -84,23 +84,6 @@
84#define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n))) 84#define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n)))
85#define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n))) 85#define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n)))
86 86
87/* Almost all documentation for chip and board memory maps assumes
88 * BM is clear. Most devel boards have a switch to control booting
89 * from NOR flash (using external chipselect 3) rather than mask ROM,
90 * which uses BM to interchange the physical CS0 and CS3 addresses.
91 */
92static inline u32 omap_cs0_phys(void)
93{
94 return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
95 ? OMAP_CS3_PHYS : 0;
96}
97
98static inline u32 omap_cs3_phys(void)
99{
100 return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM)
101 ? 0 : OMAP_CS3_PHYS;
102}
103
104#endif /* __ASSEMBLER__ */ 87#endif /* __ASSEMBLER__ */
105 88
106#endif /* __ASM_ARCH_TC_H */ 89#endif /* __ASM_ARCH_TC_H */
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index dc864b580da0..d0fc9f4dc155 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -3,6 +3,7 @@
3#ifndef __ASM_ARCH_OMAP_USB_H 3#ifndef __ASM_ARCH_OMAP_USB_H
4#define __ASM_ARCH_OMAP_USB_H 4#define __ASM_ARCH_OMAP_USB_H
5 5
6#include <linux/io.h>
6#include <linux/usb/musb.h> 7#include <linux/usb/musb.h>
7#include <plat/board.h> 8#include <plat/board.h>
8 9
@@ -105,6 +106,46 @@ extern int omap4430_phy_set_clk(struct device *dev, int on);
105extern int omap4430_phy_init(struct device *dev); 106extern int omap4430_phy_init(struct device *dev);
106extern int omap4430_phy_exit(struct device *dev); 107extern int omap4430_phy_exit(struct device *dev);
107extern int omap4430_phy_suspend(struct device *dev, int suspend); 108extern int omap4430_phy_suspend(struct device *dev, int suspend);
109
110/*
111 * NOTE: Please update omap USB drivers to use ioremap + read/write
112 */
113
114#define OMAP2_L4_IO_OFFSET 0xb2000000
115#define IOMEM(x) ((void __force __iomem *)(x))
116#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET)
117
118static inline u8 omap_readb(u32 pa)
119{
120 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
121}
122
123static inline u16 omap_readw(u32 pa)
124{
125 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
126}
127
128static inline u32 omap_readl(u32 pa)
129{
130 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
131}
132
133static inline void omap_writeb(u8 v, u32 pa)
134{
135 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
136}
137
138
139static inline void omap_writew(u16 v, u32 pa)
140{
141 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
142}
143
144static inline void omap_writel(u32 v, u32 pa)
145{
146 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
147}
148
108#endif 149#endif
109 150
110extern void am35x_musb_reset(void); 151extern void am35x_musb_reset(void);
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 0d4aa0d5876c..cff8712122bb 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -26,8 +26,11 @@
26#include <linux/init.h> 26#include <linux/init.h>
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/io.h> 28#include <linux/io.h>
29#include <asm/system.h>
30#include <linux/spinlock.h> 29#include <linux/spinlock.h>
30
31#include <asm/system.h>
32
33#include <plat/cpu.h>
31#include <plat/mux.h> 34#include <plat/mux.h>
32 35
33#ifdef CONFIG_OMAP_MUX 36#ifdef CONFIG_OMAP_MUX
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c
index 3dc3801aace4..5a97b4d98d41 100644
--- a/arch/arm/plat-omap/omap-pm-noop.c
+++ b/arch/arm/plat-omap/omap-pm-noop.c
@@ -319,7 +319,7 @@ int omap_pm_get_dev_context_loss_count(struct device *dev)
319 if (WARN_ON(!dev)) 319 if (WARN_ON(!dev))
320 return -ENODEV; 320 return -ENODEV;
321 321
322 if (dev->parent == &omap_device_parent) { 322 if (dev->pm_domain == &omap_device_pm_domain) {
323 count = omap_device_get_context_loss_count(pdev); 323 count = omap_device_get_context_loss_count(pdev);
324 } else { 324 } else {
325 WARN_ONCE(off_mode_enabled, "omap_pm: using dummy context loss counter; device %s should be converted to omap_device", 325 WARN_ONCE(off_mode_enabled, "omap_pm: using dummy context loss counter; device %s should be converted to omap_device",
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 2d00ab01d150..6de28ea3cd65 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -314,8 +314,6 @@ static void _add_hwmod_clocks_clkdev(struct omap_device *od,
314} 314}
315 315
316 316
317static struct dev_pm_domain omap_device_pm_domain;
318
319/** 317/**
320 * omap_device_build_from_dt - build an omap_device with multiple hwmods 318 * omap_device_build_from_dt - build an omap_device with multiple hwmods
321 * @pdev_name: name of the platform_device driver to use 319 * @pdev_name: name of the platform_device driver to use
@@ -756,14 +754,12 @@ static int _od_suspend_noirq(struct device *dev)
756 struct omap_device *od = to_omap_device(pdev); 754 struct omap_device *od = to_omap_device(pdev);
757 int ret; 755 int ret;
758 756
759 if (od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND)
760 return pm_generic_suspend_noirq(dev);
761
762 ret = pm_generic_suspend_noirq(dev); 757 ret = pm_generic_suspend_noirq(dev);
763 758
764 if (!ret && !pm_runtime_status_suspended(dev)) { 759 if (!ret && !pm_runtime_status_suspended(dev)) {
765 if (pm_generic_runtime_suspend(dev) == 0) { 760 if (pm_generic_runtime_suspend(dev) == 0) {
766 omap_device_idle(pdev); 761 if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
762 omap_device_idle(pdev);
767 od->flags |= OMAP_DEVICE_SUSPENDED; 763 od->flags |= OMAP_DEVICE_SUSPENDED;
768 } 764 }
769 } 765 }
@@ -776,13 +772,11 @@ static int _od_resume_noirq(struct device *dev)
776 struct platform_device *pdev = to_platform_device(dev); 772 struct platform_device *pdev = to_platform_device(dev);
777 struct omap_device *od = to_omap_device(pdev); 773 struct omap_device *od = to_omap_device(pdev);
778 774
779 if (od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND)
780 return pm_generic_resume_noirq(dev);
781
782 if ((od->flags & OMAP_DEVICE_SUSPENDED) && 775 if ((od->flags & OMAP_DEVICE_SUSPENDED) &&
783 !pm_runtime_status_suspended(dev)) { 776 !pm_runtime_status_suspended(dev)) {
784 od->flags &= ~OMAP_DEVICE_SUSPENDED; 777 od->flags &= ~OMAP_DEVICE_SUSPENDED;
785 omap_device_enable(pdev); 778 if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
779 omap_device_enable(pdev);
786 pm_generic_runtime_resume(dev); 780 pm_generic_runtime_resume(dev);
787 } 781 }
788 782
@@ -793,7 +787,7 @@ static int _od_resume_noirq(struct device *dev)
793#define _od_resume_noirq NULL 787#define _od_resume_noirq NULL
794#endif 788#endif
795 789
796static struct dev_pm_domain omap_device_pm_domain = { 790struct dev_pm_domain omap_device_pm_domain = {
797 .ops = { 791 .ops = {
798 SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume, 792 SET_RUNTIME_PM_OPS(_od_runtime_suspend, _od_runtime_resume,
799 _od_runtime_idle) 793 _od_runtime_idle)
@@ -815,7 +809,6 @@ int omap_device_register(struct platform_device *pdev)
815{ 809{
816 pr_debug("omap_device: %s: registering\n", pdev->name); 810 pr_debug("omap_device: %s: registering\n", pdev->name);
817 811
818 pdev->dev.parent = &omap_device_parent;
819 pdev->dev.pm_domain = &omap_device_pm_domain; 812 pdev->dev.pm_domain = &omap_device_pm_domain;
820 return platform_device_add(pdev); 813 return platform_device_add(pdev);
821} 814}
@@ -1124,11 +1117,6 @@ int omap_device_enable_clocks(struct omap_device *od)
1124 return 0; 1117 return 0;
1125} 1118}
1126 1119
1127struct device omap_device_parent = {
1128 .init_name = "omap",
1129 .parent = &platform_bus,
1130};
1131
1132static struct notifier_block platform_nb = { 1120static struct notifier_block platform_nb = {
1133 .notifier_call = _omap_device_notifier_call, 1121 .notifier_call = _omap_device_notifier_call,
1134}; 1122};
@@ -1136,6 +1124,6 @@ static struct notifier_block platform_nb = {
1136static int __init omap_device_init(void) 1124static int __init omap_device_init(void)
1137{ 1125{
1138 bus_register_notifier(&platform_bus_type, &platform_nb); 1126 bus_register_notifier(&platform_bus_type, &platform_nb);
1139 return device_register(&omap_device_parent); 1127 return 0;
1140} 1128}
1141core_initcall(omap_device_init); 1129core_initcall(omap_device_init);
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 596f2224e15a..eec98afa0f83 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -31,11 +31,10 @@
31 31
32#include "sram.h" 32#include "sram.h"
33 33
34/* XXX These "sideways" includes are a sign that something is wrong */ 34/* XXX These "sideways" includes will disappear when sram.c becomes a driver */
35#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 35#include "../mach-omap2/iomap.h"
36# include "../mach-omap2/prm2xxx_3xxx.h" 36#include "../mach-omap2/prm2xxx_3xxx.h"
37# include "../mach-omap2/sdrc.h" 37#include "../mach-omap2/sdrc.h"
38#endif
39 38
40#define OMAP1_SRAM_PA 0x20000000 39#define OMAP1_SRAM_PA 0x20000000
41#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800) 40#define OMAP2_SRAM_PUB_PA (OMAP2_SRAM_PA + 0xf800)
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
index f3570884883e..d2bbfd1cb0b5 100644
--- a/arch/arm/plat-omap/usb.c
+++ b/arch/arm/plat-omap/usb.c
@@ -29,6 +29,10 @@
29#include <plat/usb.h> 29#include <plat/usb.h>
30#include <plat/board.h> 30#include <plat/board.h>
31 31
32#include <mach/hardware.h>
33
34#include "../mach-omap2/common.h"
35
32#ifdef CONFIG_ARCH_OMAP_OTG 36#ifdef CONFIG_ARCH_OMAP_OTG
33 37
34void __init 38void __init
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-20 03:05:18 -0500