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-rw-r--r--arch/arm/plat-omap/common.c36
-rw-r--r--arch/arm/plat-omap/dma.c6
-rw-r--r--arch/arm/plat-omap/dmtimer.c2
-rw-r--r--arch/arm/plat-omap/include/mach/control.h6
-rw-r--r--arch/arm/plat-omap/include/mach/io.h50
-rw-r--r--arch/arm/plat-omap/include/mach/pm.h4
-rw-r--r--arch/arm/plat-omap/include/mach/sdrc.h6
7 files changed, 57 insertions, 53 deletions
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index f4dff423ae7c..20e8db5fe32a 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -258,12 +258,12 @@ static void __init __omap2_set_globals(void)
258#if defined(CONFIG_ARCH_OMAP2420) 258#if defined(CONFIG_ARCH_OMAP2420)
259 259
260static struct omap_globals omap242x_globals = { 260static struct omap_globals omap242x_globals = {
261 .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x48014000), 261 .tap = OMAP2_IO_ADDRESS(0x48014000),
262 .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE), 262 .sdrc = OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE),
263 .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE), 263 .sms = OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE),
264 .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE), 264 .ctrl = OMAP2_IO_ADDRESS(OMAP2420_CTRL_BASE),
265 .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE), 265 .prm = OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE),
266 .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_CM_BASE), 266 .cm = OMAP2_IO_ADDRESS(OMAP2420_CM_BASE),
267}; 267};
268 268
269void __init omap2_set_globals_242x(void) 269void __init omap2_set_globals_242x(void)
@@ -276,12 +276,12 @@ void __init omap2_set_globals_242x(void)
276#if defined(CONFIG_ARCH_OMAP2430) 276#if defined(CONFIG_ARCH_OMAP2430)
277 277
278static struct omap_globals omap243x_globals = { 278static struct omap_globals omap243x_globals = {
279 .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4900a000), 279 .tap = OMAP2_IO_ADDRESS(0x4900a000),
280 .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE), 280 .sdrc = OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE),
281 .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE), 281 .sms = OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE),
282 .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE), 282 .ctrl = OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE),
283 .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE), 283 .prm = OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE),
284 .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP2430_CM_BASE), 284 .cm = OMAP2_IO_ADDRESS(OMAP2430_CM_BASE),
285}; 285};
286 286
287void __init omap2_set_globals_243x(void) 287void __init omap2_set_globals_243x(void)
@@ -294,12 +294,12 @@ void __init omap2_set_globals_243x(void)
294#if defined(CONFIG_ARCH_OMAP3430) 294#if defined(CONFIG_ARCH_OMAP3430)
295 295
296static struct omap_globals omap343x_globals = { 296static struct omap_globals omap343x_globals = {
297 .tap = (__force void __iomem *)OMAP2_IO_ADDRESS(0x4830A000), 297 .tap = OMAP2_IO_ADDRESS(0x4830A000),
298 .sdrc = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE), 298 .sdrc = OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE),
299 .sms = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE), 299 .sms = OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE),
300 .ctrl = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE), 300 .ctrl = OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE),
301 .prm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE), 301 .prm = OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE),
302 .cm = (__force void __iomem *)OMAP2_IO_ADDRESS(OMAP3430_CM_BASE), 302 .cm = OMAP2_IO_ADDRESS(OMAP3430_CM_BASE),
303}; 303};
304 304
305void __init omap2_set_globals_343x(void) 305void __init omap2_set_globals_343x(void)
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index a63b644ad305..b4057e271875 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2297,13 +2297,13 @@ static int __init omap_init_dma(void)
2297 int ch, r; 2297 int ch, r;
2298 2298
2299 if (cpu_class_is_omap1()) { 2299 if (cpu_class_is_omap1()) {
2300 omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP1_DMA_BASE); 2300 omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE);
2301 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT; 2301 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
2302 } else if (cpu_is_omap24xx()) { 2302 } else if (cpu_is_omap24xx()) {
2303 omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP24XX_DMA4_BASE); 2303 omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE);
2304 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2304 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2305 } else if (cpu_is_omap34xx()) { 2305 } else if (cpu_is_omap34xx()) {
2306 omap_dma_base = (void __iomem *)IO_ADDRESS(OMAP34XX_DMA4_BASE); 2306 omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
2307 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2307 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
2308 } else { 2308 } else {
2309 pr_err("DMA init failed for unsupported omap\n"); 2309 pr_err("DMA init failed for unsupported omap\n");
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 743a4abcd85d..df61ad247dc2 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -693,7 +693,7 @@ int __init omap_dm_timer_init(void)
693 693
694 for (i = 0; i < dm_timer_count; i++) { 694 for (i = 0; i < dm_timer_count; i++) {
695 timer = &dm_timers[i]; 695 timer = &dm_timers[i];
696 timer->io_base = (void __iomem *)io_p2v(timer->phys_base); 696 timer->io_base = IO_ADDRESS(timer->phys_base);
697#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 697#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
698 if (cpu_class_is_omap2()) { 698 if (cpu_class_is_omap2()) {
699 char clk_name[16]; 699 char clk_name[16];
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index e3fd62d9a995..ee378d254cbd 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -19,11 +19,11 @@
19#include <mach/io.h> 19#include <mach/io.h>
20 20
21#define OMAP242X_CTRL_REGADDR(reg) \ 21#define OMAP242X_CTRL_REGADDR(reg) \
22 (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 22 IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
23#define OMAP243X_CTRL_REGADDR(reg) \ 23#define OMAP243X_CTRL_REGADDR(reg) \
24 (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 24 IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
25#define OMAP343X_CTRL_REGADDR(reg) \ 25#define OMAP343X_CTRL_REGADDR(reg) \
26 (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 26 IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
27 27
28/* 28/*
29 * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for 29 * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index b9f57ce0ac15..dd0cf069431d 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -55,14 +55,13 @@
55 55
56#if defined(CONFIG_ARCH_OMAP1) 56#if defined(CONFIG_ARCH_OMAP1)
57 57
58#define IO_PHYS 0xFFFB0000 58#define IO_PHYS 0xFFFB0000
59#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ 59#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
60#define IO_SIZE 0x40000 60#define IO_SIZE 0x40000
61#define IO_VIRT (IO_PHYS - IO_OFFSET) 61#define IO_VIRT (IO_PHYS - IO_OFFSET)
62#define IO_ADDRESS(pa) ((pa) - IO_OFFSET) 62#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET)
63#define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) 63#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET)
64#define io_p2v(pa) ((pa) - IO_OFFSET) 64#define io_v2p(va) ((va) + IO_OFFSET)
65#define io_v2p(va) ((va) + IO_OFFSET)
66 65
67#elif defined(CONFIG_ARCH_OMAP2) 66#elif defined(CONFIG_ARCH_OMAP2)
68 67
@@ -90,11 +89,10 @@
90 89
91#endif 90#endif
92 91
93#define IO_OFFSET 0x90000000 92#define IO_OFFSET 0x90000000
94#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 93#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
95#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 94#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
96#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 95#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
97#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
98 96
99/* DSP */ 97/* DSP */
100#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ 98#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */
@@ -149,9 +147,8 @@
149 147
150 148
151#define IO_OFFSET 0x90000000 149#define IO_OFFSET 0x90000000
152#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 150#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
153#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 151#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
154#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
155#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ 152#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
156 153
157/* DSP */ 154/* DSP */
@@ -167,7 +164,14 @@
167 164
168#endif 165#endif
169 166
170#ifndef __ASSEMBLER__ 167#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
168#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa))
169#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa))
170
171#ifdef __ASSEMBLER__
172#define IOMEM(x) x
173#else
174#define IOMEM(x) ((void __force __iomem *)(x))
171 175
172/* 176/*
173 * Functions to access the OMAP IO region 177 * Functions to access the OMAP IO region
@@ -178,13 +182,13 @@
178 * - DO NOT use hardcoded virtual addresses to allow changing the 182 * - DO NOT use hardcoded virtual addresses to allow changing the
179 * IO address space again if needed 183 * IO address space again if needed
180 */ 184 */
181#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) 185#define omap_readb(a) __raw_readb(IO_ADDRESS(a))
182#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) 186#define omap_readw(a) __raw_readw(IO_ADDRESS(a))
183#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) 187#define omap_readl(a) __raw_readl(IO_ADDRESS(a))
184 188
185#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) 189#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a))
186#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) 190#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a))
187#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) 191#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a))
188 192
189extern void omap1_map_common_io(void); 193extern void omap1_map_common_io(void);
190extern void omap1_init_common_hw(void); 194extern void omap1_init_common_hw(void);
diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h
index bfa09325a5ff..6063e9681de2 100644
--- a/arch/arm/plat-omap/include/mach/pm.h
+++ b/arch/arm/plat-omap/include/mach/pm.h
@@ -39,11 +39,11 @@
39 * Register and offset definitions to be used in PM assembler code 39 * Register and offset definitions to be used in PM assembler code
40 * ---------------------------------------------------------------------------- 40 * ----------------------------------------------------------------------------
41 */ 41 */
42#define CLKGEN_REG_ASM_BASE io_p2v(0xfffece00) 42#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00)
43#define ARM_IDLECT1_ASM_OFFSET 0x04 43#define ARM_IDLECT1_ASM_OFFSET 0x04
44#define ARM_IDLECT2_ASM_OFFSET 0x08 44#define ARM_IDLECT2_ASM_OFFSET 0x08
45 45
46#define TCMIF_ASM_BASE io_p2v(0xfffecc00) 46#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00)
47#define EMIFS_CONFIG_ASM_OFFSET 0x0c 47#define EMIFS_CONFIG_ASM_OFFSET 0x0c
48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20
49 49
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index 787b7acec546..d908eb527c8d 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -63,9 +63,9 @@
63 */ 63 */
64 64
65 65
66#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) 66#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg)
67#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) 67#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg)
68#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) 68#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg)
69 69
70/* SMS register offsets - read/write with sms_{read,write}_reg() */ 70/* SMS register offsets - read/write with sms_{read,write}_reg() */
71 71