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-rw-r--r--arch/arm/plat-omap/dma.c9
-rw-r--r--arch/arm/plat-omap/gpio.c5
-rw-r--r--arch/arm/plat-omap/mcbsp.c4
-rw-r--r--arch/arm/plat-omap/timer32k.c15
4 files changed, 13 insertions, 20 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 1bbb431843ce..bb045e5ddbd8 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -899,8 +899,7 @@ static int omap1_dma_handle_ch(int ch)
899 return 1; 899 return 1;
900} 900}
901 901
902static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id, 902static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
903 struct pt_regs *regs)
904{ 903{
905 int ch = ((int) dev_id) - 1; 904 int ch = ((int) dev_id) - 1;
906 int handled = 0; 905 int handled = 0;
@@ -962,8 +961,7 @@ static int omap2_dma_handle_ch(int ch)
962} 961}
963 962
964/* STATUS register count is from 1-32 while our is 0-31 */ 963/* STATUS register count is from 1-32 while our is 0-31 */
965static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id, 964static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
966 struct pt_regs *regs)
967{ 965{
968 u32 val; 966 u32 val;
969 int i; 967 int i;
@@ -1220,8 +1218,7 @@ static void set_b1_regs(void)
1220 omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L); 1218 omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
1221} 1219}
1222 1220
1223static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id, 1221static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id)
1224 struct pt_regs *regs)
1225{ 1222{
1226 u16 w; 1223 u16 w;
1227 1224
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index f55f99ae58ae..8162eed8b500 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -783,8 +783,7 @@ void omap_free_gpio(int gpio)
783 * line's interrupt handler has been run, we may miss some nested 783 * line's interrupt handler has been run, we may miss some nested
784 * interrupts. 784 * interrupts.
785 */ 785 */
786static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc, 786static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc)
787 struct pt_regs *regs)
788{ 787{
789 void __iomem *isr_reg = NULL; 788 void __iomem *isr_reg = NULL;
790 u32 isr; 789 u32 isr;
@@ -882,7 +881,7 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc,
882 continue; 881 continue;
883 } 882 }
884 883
885 desc_handle_irq(gpio_irq, d, regs); 884 desc_handle_irq(gpio_irq, d);
886 885
887 if (unlikely((d->status & IRQ_PENDING) && !d->depth)) { 886 if (unlikely((d->status & IRQ_PENDING) && !d->depth)) {
888 irq_mask = 1 << 887 irq_mask = 1 <<
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index ade9a0fa6ef6..ec50008a2df6 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -96,7 +96,7 @@ static void omap_mcbsp_dump_reg(u8 id)
96 DBG("***********************\n"); 96 DBG("***********************\n");
97} 97}
98 98
99static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id, struct pt_regs *regs) 99static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
100{ 100{
101 struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id); 101 struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id);
102 102
@@ -106,7 +106,7 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id, struct pt_re
106 return IRQ_HANDLED; 106 return IRQ_HANDLED;
107} 107}
108 108
109static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id, struct pt_regs *regs) 109static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
110{ 110{
111 struct omap_mcbsp * mcbsp_rx = (struct omap_mcbsp *)(dev_id); 111 struct omap_mcbsp * mcbsp_rx = (struct omap_mcbsp *)(dev_id);
112 112
diff --git a/arch/arm/plat-omap/timer32k.c b/arch/arm/plat-omap/timer32k.c
index cf6df3378d37..265310601161 100644
--- a/arch/arm/plat-omap/timer32k.c
+++ b/arch/arm/plat-omap/timer32k.c
@@ -194,8 +194,7 @@ unsigned long long sched_clock(void)
194 * issues with dynamic tick. In the dynamic tick case, we need to lock 194 * issues with dynamic tick. In the dynamic tick case, we need to lock
195 * with irqsave. 195 * with irqsave.
196 */ 196 */
197static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id, 197static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id)
198 struct pt_regs *regs)
199{ 198{
200 unsigned long now; 199 unsigned long now;
201 200
@@ -205,7 +204,7 @@ static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id,
205 while ((signed long)(now - omap_32k_last_tick) 204 while ((signed long)(now - omap_32k_last_tick)
206 >= OMAP_32K_TICKS_PER_HZ) { 205 >= OMAP_32K_TICKS_PER_HZ) {
207 omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ; 206 omap_32k_last_tick += OMAP_32K_TICKS_PER_HZ;
208 timer_tick(regs); 207 timer_tick();
209 } 208 }
210 209
211 /* Restart timer so we don't drift off due to modulo or dynamic tick. 210 /* Restart timer so we don't drift off due to modulo or dynamic tick.
@@ -218,19 +217,17 @@ static inline irqreturn_t _omap_32k_timer_interrupt(int irq, void *dev_id,
218 return IRQ_HANDLED; 217 return IRQ_HANDLED;
219} 218}
220 219
221static irqreturn_t omap_32k_timer_handler(int irq, void *dev_id, 220static irqreturn_t omap_32k_timer_handler(int irq, void *dev_id)
222 struct pt_regs *regs)
223{ 221{
224 return _omap_32k_timer_interrupt(irq, dev_id, regs); 222 return _omap_32k_timer_interrupt(irq, dev_id);
225} 223}
226 224
227static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id, 225static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
228 struct pt_regs *regs)
229{ 226{
230 unsigned long flags; 227 unsigned long flags;
231 228
232 write_seqlock_irqsave(&xtime_lock, flags); 229 write_seqlock_irqsave(&xtime_lock, flags);
233 _omap_32k_timer_interrupt(irq, dev_id, regs); 230 _omap_32k_timer_interrupt(irq, dev_id);
234 write_sequnlock_irqrestore(&xtime_lock, flags); 231 write_sequnlock_irqrestore(&xtime_lock, flags);
235 232
236 return IRQ_HANDLED; 233 return IRQ_HANDLED;