diff options
Diffstat (limited to 'arch/arm/plat-omap/usb.c')
-rw-r--r-- | arch/arm/plat-omap/usb.c | 67 |
1 files changed, 51 insertions, 16 deletions
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c index a5aedf964b88..a619475c4b76 100644 --- a/arch/arm/plat-omap/usb.c +++ b/arch/arm/plat-omap/usb.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <asm/system.h> | 33 | #include <asm/system.h> |
34 | #include <asm/hardware.h> | 34 | #include <asm/hardware.h> |
35 | 35 | ||
36 | #include <asm/arch/control.h> | ||
36 | #include <asm/arch/mux.h> | 37 | #include <asm/arch/mux.h> |
37 | #include <asm/arch/usb.h> | 38 | #include <asm/arch/usb.h> |
38 | #include <asm/arch/board.h> | 39 | #include <asm/arch/board.h> |
@@ -76,7 +77,7 @@ | |||
76 | 77 | ||
77 | /*-------------------------------------------------------------------------*/ | 78 | /*-------------------------------------------------------------------------*/ |
78 | 79 | ||
79 | #ifdef CONFIG_ARCH_OMAP_OTG | 80 | #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_USB_MUSB_OTG) |
80 | 81 | ||
81 | static struct otg_transceiver *xceiv; | 82 | static struct otg_transceiver *xceiv; |
82 | 83 | ||
@@ -110,12 +111,48 @@ EXPORT_SYMBOL(otg_set_transceiver); | |||
110 | 111 | ||
111 | #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX) | 112 | #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX) |
112 | 113 | ||
114 | static void omap2_usb_devconf_clear(u8 port, u32 mask) | ||
115 | { | ||
116 | u32 r; | ||
117 | |||
118 | r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
119 | r &= ~USBTXWRMODEI(port, mask); | ||
120 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); | ||
121 | } | ||
122 | |||
123 | static void omap2_usb_devconf_set(u8 port, u32 mask) | ||
124 | { | ||
125 | u32 r; | ||
126 | |||
127 | r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
128 | r |= USBTXWRMODEI(port, mask); | ||
129 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); | ||
130 | } | ||
131 | |||
132 | static void omap2_usb2_disable_5pinbitll(void) | ||
133 | { | ||
134 | u32 r; | ||
135 | |||
136 | r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
137 | r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI); | ||
138 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); | ||
139 | } | ||
140 | |||
141 | static void omap2_usb2_enable_5pinunitll(void) | ||
142 | { | ||
143 | u32 r; | ||
144 | |||
145 | r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); | ||
146 | r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI; | ||
147 | omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); | ||
148 | } | ||
149 | |||
113 | static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) | 150 | static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) |
114 | { | 151 | { |
115 | u32 syscon1 = 0; | 152 | u32 syscon1 = 0; |
116 | 153 | ||
117 | if (cpu_is_omap24xx()) | 154 | if (cpu_is_omap24xx()) |
118 | CONTROL_DEVCONF_REG &= ~USBT0WRMODEI(USB_BIDIR_TLL); | 155 | omap2_usb_devconf_clear(0, USB_BIDIR_TLL); |
119 | 156 | ||
120 | if (nwires == 0) { | 157 | if (nwires == 0) { |
121 | if (cpu_class_is_omap1() && !cpu_is_omap15xx()) { | 158 | if (cpu_class_is_omap1() && !cpu_is_omap15xx()) { |
@@ -187,19 +224,19 @@ static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device) | |||
187 | case 3: | 224 | case 3: |
188 | syscon1 = 2; | 225 | syscon1 = 2; |
189 | if (cpu_is_omap24xx()) | 226 | if (cpu_is_omap24xx()) |
190 | CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_BIDIR); | 227 | omap2_usb_devconf_set(0, USB_BIDIR); |
191 | break; | 228 | break; |
192 | case 4: | 229 | case 4: |
193 | syscon1 = 1; | 230 | syscon1 = 1; |
194 | if (cpu_is_omap24xx()) | 231 | if (cpu_is_omap24xx()) |
195 | CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_BIDIR); | 232 | omap2_usb_devconf_set(0, USB_BIDIR); |
196 | break; | 233 | break; |
197 | case 6: | 234 | case 6: |
198 | syscon1 = 3; | 235 | syscon1 = 3; |
199 | if (cpu_is_omap24xx()) { | 236 | if (cpu_is_omap24xx()) { |
200 | omap_cfg_reg(J19_24XX_USB0_VP); | 237 | omap_cfg_reg(J19_24XX_USB0_VP); |
201 | omap_cfg_reg(K20_24XX_USB0_VM); | 238 | omap_cfg_reg(K20_24XX_USB0_VM); |
202 | CONTROL_DEVCONF_REG |= USBT0WRMODEI(USB_UNIDIR); | 239 | omap2_usb_devconf_set(0, USB_UNIDIR); |
203 | } else { | 240 | } else { |
204 | omap_cfg_reg(AA9_USB0_VP); | 241 | omap_cfg_reg(AA9_USB0_VP); |
205 | omap_cfg_reg(R9_USB0_VM); | 242 | omap_cfg_reg(R9_USB0_VM); |
@@ -220,7 +257,7 @@ static u32 __init omap_usb1_init(unsigned nwires) | |||
220 | if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) | 257 | if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) |
221 | USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB1_UNI_R; | 258 | USB_TRANSCEIVER_CTRL_REG &= ~CONF_USB1_UNI_R; |
222 | if (cpu_is_omap24xx()) | 259 | if (cpu_is_omap24xx()) |
223 | CONTROL_DEVCONF_REG &= ~USBT1WRMODEI(USB_BIDIR_TLL); | 260 | omap2_usb_devconf_clear(1, USB_BIDIR_TLL); |
224 | 261 | ||
225 | if (nwires == 0) | 262 | if (nwires == 0) |
226 | return 0; | 263 | return 0; |
@@ -261,17 +298,17 @@ static u32 __init omap_usb1_init(unsigned nwires) | |||
261 | * this TLL link is not using DP/DM | 298 | * this TLL link is not using DP/DM |
262 | */ | 299 | */ |
263 | syscon1 = 1; | 300 | syscon1 = 1; |
264 | CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR_TLL); | 301 | omap2_usb_devconf_set(1, USB_BIDIR_TLL); |
265 | break; | 302 | break; |
266 | case 3: | 303 | case 3: |
267 | syscon1 = 2; | 304 | syscon1 = 2; |
268 | if (cpu_is_omap24xx()) | 305 | if (cpu_is_omap24xx()) |
269 | CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR); | 306 | omap2_usb_devconf_set(1, USB_BIDIR); |
270 | break; | 307 | break; |
271 | case 4: | 308 | case 4: |
272 | syscon1 = 1; | 309 | syscon1 = 1; |
273 | if (cpu_is_omap24xx()) | 310 | if (cpu_is_omap24xx()) |
274 | CONTROL_DEVCONF_REG |= USBT1WRMODEI(USB_BIDIR); | 311 | omap2_usb_devconf_set(1, USB_BIDIR); |
275 | break; | 312 | break; |
276 | case 6: | 313 | case 6: |
277 | if (cpu_is_omap24xx()) | 314 | if (cpu_is_omap24xx()) |
@@ -295,8 +332,7 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup) | |||
295 | u32 syscon1 = 0; | 332 | u32 syscon1 = 0; |
296 | 333 | ||
297 | if (cpu_is_omap24xx()) { | 334 | if (cpu_is_omap24xx()) { |
298 | CONTROL_DEVCONF_REG &= ~(USBT2WRMODEI(USB_BIDIR_TLL) | 335 | omap2_usb2_disable_5pinbitll(); |
299 | | USBT2TLL5PI); | ||
300 | alt_pingroup = 0; | 336 | alt_pingroup = 0; |
301 | } | 337 | } |
302 | 338 | ||
@@ -343,17 +379,17 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup) | |||
343 | * this TLL link is not using DP/DM | 379 | * this TLL link is not using DP/DM |
344 | */ | 380 | */ |
345 | syscon1 = 1; | 381 | syscon1 = 1; |
346 | CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR_TLL); | 382 | omap2_usb_devconf_set(2, USB_BIDIR_TLL); |
347 | break; | 383 | break; |
348 | case 3: | 384 | case 3: |
349 | syscon1 = 2; | 385 | syscon1 = 2; |
350 | if (cpu_is_omap24xx()) | 386 | if (cpu_is_omap24xx()) |
351 | CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR); | 387 | omap2_usb_devconf_set(2, USB_BIDIR); |
352 | break; | 388 | break; |
353 | case 4: | 389 | case 4: |
354 | syscon1 = 1; | 390 | syscon1 = 1; |
355 | if (cpu_is_omap24xx()) | 391 | if (cpu_is_omap24xx()) |
356 | CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_BIDIR); | 392 | omap2_usb_devconf_set(2, USB_BIDIR); |
357 | break; | 393 | break; |
358 | case 5: | 394 | case 5: |
359 | if (!cpu_is_omap24xx()) | 395 | if (!cpu_is_omap24xx()) |
@@ -364,8 +400,7 @@ static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup) | |||
364 | * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED} | 400 | * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED} |
365 | */ | 401 | */ |
366 | syscon1 = 3; | 402 | syscon1 = 3; |
367 | CONTROL_DEVCONF_REG |= USBT2WRMODEI(USB_UNIDIR_TLL) | 403 | omap2_usb2_enable_5pinunitll(); |
368 | | USBT2TLL5PI; | ||
369 | break; | 404 | break; |
370 | case 6: | 405 | case 6: |
371 | if (cpu_is_omap24xx()) | 406 | if (cpu_is_omap24xx()) |