diff options
Diffstat (limited to 'arch/arm/plat-omap/sram.c')
-rw-r--r-- | arch/arm/plat-omap/sram.c | 143 |
1 files changed, 116 insertions, 27 deletions
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 7ad69f14a3e7..792f66375830 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -20,10 +20,13 @@ | |||
20 | #include <asm/io.h> | 20 | #include <asm/io.h> |
21 | #include <asm/cacheflush.h> | 21 | #include <asm/cacheflush.h> |
22 | 22 | ||
23 | #include "sram.h" | 23 | #include <asm/arch/sram.h> |
24 | |||
25 | #define OMAP1_SRAM_PA 0x20000000 | ||
26 | #define OMAP1_SRAM_VA 0xd0000000 | ||
27 | #define OMAP2_SRAM_PA 0x40200000 | ||
28 | #define OMAP2_SRAM_VA 0xd0000000 | ||
24 | 29 | ||
25 | #define OMAP1_SRAM_BASE 0xd0000000 | ||
26 | #define OMAP1_SRAM_START 0x20000000 | ||
27 | #define SRAM_BOOTLOADER_SZ 0x80 | 30 | #define SRAM_BOOTLOADER_SZ 0x80 |
28 | 31 | ||
29 | static unsigned long omap_sram_base; | 32 | static unsigned long omap_sram_base; |
@@ -31,37 +34,40 @@ static unsigned long omap_sram_size; | |||
31 | static unsigned long omap_sram_ceil; | 34 | static unsigned long omap_sram_ceil; |
32 | 35 | ||
33 | /* | 36 | /* |
34 | * The amount of SRAM depends on the core type: | 37 | * The amount of SRAM depends on the core type. |
35 | * 730 = 200K, 1510 = 512K, 5912 = 256K, 1610 = 16K, 1710 = 16K | ||
36 | * Note that we cannot try to test for SRAM here because writes | 38 | * Note that we cannot try to test for SRAM here because writes |
37 | * to secure SRAM will hang the system. Also the SRAM is not | 39 | * to secure SRAM will hang the system. Also the SRAM is not |
38 | * yet mapped at this point. | 40 | * yet mapped at this point. |
39 | */ | 41 | */ |
40 | void __init omap_detect_sram(void) | 42 | void __init omap_detect_sram(void) |
41 | { | 43 | { |
42 | omap_sram_base = OMAP1_SRAM_BASE; | 44 | if (!cpu_is_omap24xx()) |
45 | omap_sram_base = OMAP1_SRAM_VA; | ||
46 | else | ||
47 | omap_sram_base = OMAP2_SRAM_VA; | ||
43 | 48 | ||
44 | if (cpu_is_omap730()) | 49 | if (cpu_is_omap730()) |
45 | omap_sram_size = 0x32000; | 50 | omap_sram_size = 0x32000; /* 200K */ |
46 | else if (cpu_is_omap1510()) | 51 | else if (cpu_is_omap15xx()) |
47 | omap_sram_size = 0x80000; | 52 | omap_sram_size = 0x30000; /* 192K */ |
48 | else if (cpu_is_omap1610() || cpu_is_omap1621() || cpu_is_omap1710()) | 53 | else if (cpu_is_omap1610() || cpu_is_omap1621() || cpu_is_omap1710()) |
49 | omap_sram_size = 0x4000; | 54 | omap_sram_size = 0x4000; /* 16K */ |
50 | else if (cpu_is_omap1611()) | 55 | else if (cpu_is_omap1611()) |
51 | omap_sram_size = 0x3e800; | 56 | omap_sram_size = 0x3e800; /* 250K */ |
57 | else if (cpu_is_omap2420()) | ||
58 | omap_sram_size = 0xa0014; /* 640K */ | ||
52 | else { | 59 | else { |
53 | printk(KERN_ERR "Could not detect SRAM size\n"); | 60 | printk(KERN_ERR "Could not detect SRAM size\n"); |
54 | omap_sram_size = 0x4000; | 61 | omap_sram_size = 0x4000; |
55 | } | 62 | } |
56 | 63 | ||
57 | printk(KERN_INFO "SRAM size: 0x%lx\n", omap_sram_size); | ||
58 | omap_sram_ceil = omap_sram_base + omap_sram_size; | 64 | omap_sram_ceil = omap_sram_base + omap_sram_size; |
59 | } | 65 | } |
60 | 66 | ||
61 | static struct map_desc omap_sram_io_desc[] __initdata = { | 67 | static struct map_desc omap_sram_io_desc[] __initdata = { |
62 | { /* .length gets filled in at runtime */ | 68 | { /* .length gets filled in at runtime */ |
63 | .virtual = OMAP1_SRAM_BASE, | 69 | .virtual = OMAP1_SRAM_VA, |
64 | .pfn = __phys_to_pfn(OMAP1_SRAM_START), | 70 | .pfn = __phys_to_pfn(OMAP1_SRAM_PA), |
65 | .type = MT_DEVICE | 71 | .type = MT_DEVICE |
66 | } | 72 | } |
67 | }; | 73 | }; |
@@ -76,10 +82,19 @@ void __init omap_map_sram(void) | |||
76 | if (omap_sram_size == 0) | 82 | if (omap_sram_size == 0) |
77 | return; | 83 | return; |
78 | 84 | ||
85 | if (cpu_is_omap24xx()) { | ||
86 | omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA; | ||
87 | omap_sram_io_desc[0].pfn = __phys_to_pfn(OMAP2_SRAM_PA); | ||
88 | } | ||
89 | |||
79 | omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE; | 90 | omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE; |
80 | omap_sram_io_desc[0].length *= PAGE_SIZE; | 91 | omap_sram_io_desc[0].length *= PAGE_SIZE; |
81 | iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc)); | 92 | iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc)); |
82 | 93 | ||
94 | printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n", | ||
95 | omap_sram_io_desc[0].pfn, omap_sram_io_desc[0].virtual, | ||
96 | omap_sram_io_desc[0].length); | ||
97 | |||
83 | /* | 98 | /* |
84 | * Looks like we need to preserve some bootloader code at the | 99 | * Looks like we need to preserve some bootloader code at the |
85 | * beginning of SRAM for jumping to flash for reboot to work... | 100 | * beginning of SRAM for jumping to flash for reboot to work... |
@@ -88,16 +103,6 @@ void __init omap_map_sram(void) | |||
88 | omap_sram_size - SRAM_BOOTLOADER_SZ); | 103 | omap_sram_size - SRAM_BOOTLOADER_SZ); |
89 | } | 104 | } |
90 | 105 | ||
91 | static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl) = NULL; | ||
92 | |||
93 | void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) | ||
94 | { | ||
95 | if (_omap_sram_reprogram_clock == NULL) | ||
96 | panic("Cannot use SRAM"); | ||
97 | |||
98 | return _omap_sram_reprogram_clock(dpllctl, ckctl); | ||
99 | } | ||
100 | |||
101 | void * omap_sram_push(void * start, unsigned long size) | 106 | void * omap_sram_push(void * start, unsigned long size) |
102 | { | 107 | { |
103 | if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) { | 108 | if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) { |
@@ -111,10 +116,94 @@ void * omap_sram_push(void * start, unsigned long size) | |||
111 | return (void *)omap_sram_ceil; | 116 | return (void *)omap_sram_ceil; |
112 | } | 117 | } |
113 | 118 | ||
114 | void __init omap_sram_init(void) | 119 | static void omap_sram_error(void) |
120 | { | ||
121 | panic("Uninitialized SRAM function\n"); | ||
122 | } | ||
123 | |||
124 | #ifdef CONFIG_ARCH_OMAP1 | ||
125 | |||
126 | static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl); | ||
127 | |||
128 | void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) | ||
129 | { | ||
130 | if (!_omap_sram_reprogram_clock) | ||
131 | omap_sram_error(); | ||
132 | |||
133 | return _omap_sram_reprogram_clock(dpllctl, ckctl); | ||
134 | } | ||
135 | |||
136 | int __init omap1_sram_init(void) | ||
115 | { | 137 | { |
116 | omap_detect_sram(); | ||
117 | omap_map_sram(); | ||
118 | _omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock, | 138 | _omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock, |
119 | sram_reprogram_clock_sz); | 139 | sram_reprogram_clock_sz); |
140 | |||
141 | return 0; | ||
142 | } | ||
143 | |||
144 | #else | ||
145 | #define omap1_sram_init() do {} while (0) | ||
146 | #endif | ||
147 | |||
148 | #ifdef CONFIG_ARCH_OMAP2 | ||
149 | |||
150 | static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
151 | u32 base_cs, u32 force_unlock); | ||
152 | |||
153 | void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
154 | u32 base_cs, u32 force_unlock) | ||
155 | { | ||
156 | if (!_omap2_sram_ddr_init) | ||
157 | omap_sram_error(); | ||
158 | |||
159 | return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, | ||
160 | base_cs, force_unlock); | ||
161 | } | ||
162 | |||
163 | static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val, | ||
164 | u32 mem_type); | ||
165 | |||
166 | void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type) | ||
167 | { | ||
168 | if (!_omap2_sram_reprogram_sdrc) | ||
169 | omap_sram_error(); | ||
170 | |||
171 | return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); | ||
172 | } | ||
173 | |||
174 | static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); | ||
175 | |||
176 | u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass) | ||
177 | { | ||
178 | if (!_omap2_set_prcm) | ||
179 | omap_sram_error(); | ||
180 | |||
181 | return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass); | ||
182 | } | ||
183 | |||
184 | int __init omap2_sram_init(void) | ||
185 | { | ||
186 | _omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz); | ||
187 | |||
188 | _omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc, | ||
189 | sram_reprogram_sdrc_sz); | ||
190 | _omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz); | ||
191 | |||
192 | return 0; | ||
193 | } | ||
194 | #else | ||
195 | #define omap2_sram_init() do {} while (0) | ||
196 | #endif | ||
197 | |||
198 | int __init omap_sram_init(void) | ||
199 | { | ||
200 | omap_detect_sram(); | ||
201 | omap_map_sram(); | ||
202 | |||
203 | if (!cpu_is_omap24xx()) | ||
204 | omap1_sram_init(); | ||
205 | else | ||
206 | omap2_sram_init(); | ||
207 | |||
208 | return 0; | ||
120 | } | 209 | } |