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-rw-r--r--arch/arm/plat-omap/mux.c65
1 files changed, 51 insertions, 14 deletions
diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c
index 64482040f89e..8c1c016aa689 100644
--- a/arch/arm/plat-omap/mux.c
+++ b/arch/arm/plat-omap/mux.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h 4 * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
5 * 5 *
6 * Copyright (C) 2003 Nokia Corporation 6 * Copyright (C) 2003 - 2005 Nokia Corporation
7 * 7 *
8 * Written by Tony Lindgren <tony.lindgren@nokia.com> 8 * Written by Tony Lindgren <tony.lindgren@nokia.com>
9 * 9 *
@@ -25,38 +25,74 @@
25#include <linux/config.h> 25#include <linux/config.h>
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/kernel.h>
28#include <asm/system.h> 29#include <asm/system.h>
29#include <asm/io.h> 30#include <asm/io.h>
30#include <linux/spinlock.h> 31#include <linux/spinlock.h>
31
32#define __MUX_C__
33#include <asm/arch/mux.h> 32#include <asm/arch/mux.h>
34 33
35#ifdef CONFIG_OMAP_MUX 34#ifdef CONFIG_OMAP_MUX
36 35
36#define OMAP24XX_L4_BASE 0x48000000
37#define OMAP24XX_PULL_ENA (1 << 3)
38#define OMAP24XX_PULL_UP (1 << 4)
39
40static struct pin_config * pin_table;
41static unsigned long pin_table_sz;
42
43extern struct pin_config * omap730_pins;
44extern struct pin_config * omap1xxx_pins;
45extern struct pin_config * omap24xx_pins;
46
47int __init omap_mux_register(struct pin_config * pins, unsigned long size)
48{
49 pin_table = pins;
50 pin_table_sz = size;
51
52 return 0;
53}
54
37/* 55/*
38 * Sets the Omap MUX and PULL_DWN registers based on the table 56 * Sets the Omap MUX and PULL_DWN registers based on the table
39 */ 57 */
40int __init_or_module 58int __init_or_module omap_cfg_reg(const unsigned long index)
41omap_cfg_reg(const reg_cfg_t reg_cfg)
42{ 59{
43 static DEFINE_SPINLOCK(mux_spin_lock); 60 static DEFINE_SPINLOCK(mux_spin_lock);
44 61
45 unsigned long flags; 62 unsigned long flags;
46 reg_cfg_set *cfg; 63 struct pin_config *cfg;
47 unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0, 64 unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
48 pull_orig = 0, pull = 0; 65 pull_orig = 0, pull = 0;
49 unsigned int mask, warn = 0; 66 unsigned int mask, warn = 0;
50 67
51 if (cpu_is_omap7xx()) 68 if (!pin_table)
52 return 0; 69 BUG();
53 70
54 if (reg_cfg > ARRAY_SIZE(reg_cfg_table)) { 71 if (index >= pin_table_sz) {
55 printk(KERN_ERR "MUX: reg_cfg %d\n", reg_cfg); 72 printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
56 return -EINVAL; 73 index, pin_table_sz);
74 dump_stack();
75 return -ENODEV;
57 } 76 }
58 77
59 cfg = (reg_cfg_set *)&reg_cfg_table[reg_cfg]; 78 cfg = (struct pin_config *)&pin_table[index];
79 if (cpu_is_omap24xx()) {
80 u8 reg = 0;
81
82 reg |= cfg->mask & 0x7;
83 if (cfg->pull_val)
84 reg |= OMAP24XX_PULL_ENA;
85 if(cfg->pu_pd_val)
86 reg |= OMAP24XX_PULL_UP;
87#ifdef CONFIG_OMAP_MUX_DEBUG
88 printk("Muxing %s (0x%08x): 0x%02x -> 0x%02x\n",
89 cfg->name, OMAP24XX_L4_BASE + cfg->mux_reg,
90 omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg), reg);
91#endif
92 omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg);
93
94 return 0;
95 }
60 96
61 /* Check the mux register in question */ 97 /* Check the mux register in question */
62 if (cfg->mux_reg) { 98 if (cfg->mux_reg) {
@@ -157,7 +193,8 @@ omap_cfg_reg(const reg_cfg_t reg_cfg)
157 return 0; 193 return 0;
158#endif 194#endif
159} 195}
160
161EXPORT_SYMBOL(omap_cfg_reg); 196EXPORT_SYMBOL(omap_cfg_reg);
162 197#else
198#define omap_mux_init() do {} while(0)
199#define omap_cfg_reg(x) do {} while(0)
163#endif /* CONFIG_OMAP_MUX */ 200#endif /* CONFIG_OMAP_MUX */