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-rw-r--r--arch/arm/plat-omap/io.c159
1 files changed, 0 insertions, 159 deletions
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
deleted file mode 100644
index 333871f59995..000000000000
--- a/arch/arm/plat-omap/io.c
+++ /dev/null
@@ -1,159 +0,0 @@
1/*
2 * Common io.c file
3 * This file is created by Russell King <rmk+kernel@arm.linux.org.uk>
4 *
5 * Copyright (C) 2009 Texas Instruments
6 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/module.h>
13#include <linux/io.h>
14#include <linux/mm.h>
15#include <linux/dma-mapping.h>
16
17#include <plat/omap7xx.h>
18#include <plat/omap1510.h>
19#include <plat/omap16xx.h>
20#include <plat/omap24xx.h>
21#include <plat/omap34xx.h>
22#include <plat/omap44xx.h>
23
24#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
25#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
26
27static int initialized;
28
29/*
30 * Intercept ioremap() requests for addresses in our fixed mapping regions.
31 */
32void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
33{
34
35 WARN(!initialized, "Do not use ioremap before init_early\n");
36
37#ifdef CONFIG_ARCH_OMAP1
38 if (cpu_class_is_omap1()) {
39 if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE))
40 return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT);
41 }
42 if (cpu_is_omap7xx()) {
43 if (BETWEEN(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_SIZE))
44 return XLATE(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_START);
45
46 if (BETWEEN(p, OMAP7XX_DSPREG_BASE, OMAP7XX_DSPREG_SIZE))
47 return XLATE(p, OMAP7XX_DSPREG_BASE,
48 OMAP7XX_DSPREG_START);
49 }
50 if (cpu_is_omap15xx()) {
51 if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE))
52 return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START);
53
54 if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE))
55 return XLATE(p, OMAP1510_DSPREG_BASE,
56 OMAP1510_DSPREG_START);
57 }
58 if (cpu_is_omap16xx()) {
59 if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE))
60 return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START);
61
62 if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE))
63 return XLATE(p, OMAP16XX_DSPREG_BASE,
64 OMAP16XX_DSPREG_START);
65 }
66#endif
67#ifdef CONFIG_ARCH_OMAP2
68 if (cpu_is_omap24xx()) {
69 if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE))
70 return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT);
71 if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE))
72 return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
73 }
74 if (cpu_is_omap2420()) {
75 if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE))
76 return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT);
77 if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE))
78 return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE);
79 if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE))
80 return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT);
81 }
82 if (cpu_is_omap2430()) {
83 if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
84 return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT);
85 if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE))
86 return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT);
87 if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE))
88 return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT);
89 if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE))
90 return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT);
91 }
92#endif
93#ifdef CONFIG_ARCH_OMAP3
94 if (cpu_is_ti816x()) {
95 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
96 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
97 } else if (cpu_is_omap34xx()) {
98 if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
99 return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
100 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
101 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
102 if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE))
103 return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT);
104 if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE))
105 return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT);
106 if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE))
107 return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT);
108 if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE))
109 return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT);
110 if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE))
111 return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
112 }
113#endif
114#ifdef CONFIG_ARCH_OMAP4
115 if (cpu_is_omap44xx()) {
116 if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
117 return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
118 if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
119 return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
120 if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
121 return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
122 if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE))
123 return XLATE(p, OMAP44XX_EMIF1_PHYS, \
124 OMAP44XX_EMIF1_VIRT);
125 if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE))
126 return XLATE(p, OMAP44XX_EMIF2_PHYS, \
127 OMAP44XX_EMIF2_VIRT);
128 if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE))
129 return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT);
130 if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
131 return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
132 if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
133 return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT);
134 }
135#endif
136 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
137}
138EXPORT_SYMBOL(omap_ioremap);
139
140void omap_iounmap(volatile void __iomem *addr)
141{
142 unsigned long virt = (unsigned long)addr;
143
144 if (virt >= VMALLOC_START && virt < VMALLOC_END)
145 __iounmap(addr);
146}
147EXPORT_SYMBOL(omap_iounmap);
148
149void __init omap_init_consistent_dma_size(void)
150{
151#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE
152 init_consistent_dma_size(CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE << 20);
153#endif
154}
155
156void __init omap_ioremap_init(void)
157{
158 initialized++;
159}
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