diff options
Diffstat (limited to 'arch/arm/plat-omap/io.c')
-rw-r--r-- | arch/arm/plat-omap/io.c | 32 |
1 files changed, 28 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c index 0253c456ed5b..af326efc1ad3 100644 --- a/arch/arm/plat-omap/io.c +++ b/arch/arm/plat-omap/io.c | |||
@@ -47,11 +47,13 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) | |||
47 | } | 47 | } |
48 | #endif | 48 | #endif |
49 | #ifdef CONFIG_ARCH_OMAP2 | 49 | #ifdef CONFIG_ARCH_OMAP2 |
50 | if (cpu_class_is_omap2()) { | 50 | if (cpu_is_omap24xx()) { |
51 | if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE)) | 51 | if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE)) |
52 | return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT); | 52 | return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT); |
53 | if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE)) | 53 | if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE)) |
54 | return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); | 54 | return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); |
55 | } | ||
56 | if (cpu_is_omap2420()) { | ||
55 | if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE)) | 57 | if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE)) |
56 | return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT); | 58 | return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT); |
57 | if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE)) | 59 | if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE)) |
@@ -59,14 +61,36 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) | |||
59 | if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE)) | 61 | if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE)) |
60 | return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT); | 62 | return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT); |
61 | } | 63 | } |
62 | #ifdef CONFIG_ARCH_OMAP2430 | ||
63 | if (cpu_is_omap2430()) { | 64 | if (cpu_is_omap2430()) { |
64 | if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) | 65 | if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) |
65 | return XLATE(L4_WK_243X_PHYS, L4_WK_243X_VIRT); | 66 | return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT); |
66 | if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE)) | 67 | if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE)) |
67 | return XLATE(OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT); | 68 | return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT); |
69 | if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE)) | ||
70 | return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT); | ||
71 | if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE)) | ||
72 | return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT); | ||
68 | } | 73 | } |
69 | #endif | 74 | #endif |
75 | #ifdef CONFIG_ARCH_OMAP3 | ||
76 | if (cpu_is_omap34xx()) { | ||
77 | if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE)) | ||
78 | return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT); | ||
79 | if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE)) | ||
80 | return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT); | ||
81 | if (BETWEEN(p, L4_WK_34XX_PHYS, L4_WK_34XX_SIZE)) | ||
82 | return XLATE(p, L4_WK_34XX_PHYS, L4_WK_34XX_VIRT); | ||
83 | if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE)) | ||
84 | return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT); | ||
85 | if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE)) | ||
86 | return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT); | ||
87 | if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE)) | ||
88 | return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT); | ||
89 | if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE)) | ||
90 | return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT); | ||
91 | if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE)) | ||
92 | return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT); | ||
93 | } | ||
70 | #endif | 94 | #endif |
71 | 95 | ||
72 | return __arm_ioremap(p, size, type); | 96 | return __arm_ioremap(p, size, type); |