diff options
Diffstat (limited to 'arch/arm/plat-omap/include')
-rw-r--r-- | arch/arm/plat-omap/include/mach/clock.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/common.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/control.h | 13 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/irqs.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/pm.h | 345 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/serial.h | 9 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/sram.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/usb.h | 6 |
8 files changed, 28 insertions, 356 deletions
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h index c20e02ec3034..f9f65e1ba3f1 100644 --- a/arch/arm/plat-omap/include/mach/clock.h +++ b/arch/arm/plat-omap/include/mach/clock.h | |||
@@ -121,7 +121,7 @@ struct clk_functions { | |||
121 | extern unsigned int mpurate; | 121 | extern unsigned int mpurate; |
122 | 122 | ||
123 | extern int clk_init(struct clk_functions *custom_clocks); | 123 | extern int clk_init(struct clk_functions *custom_clocks); |
124 | extern void clk_init_one(struct clk *clk); | 124 | extern void clk_preinit(struct clk *clk); |
125 | extern int clk_register(struct clk *clk); | 125 | extern int clk_register(struct clk *clk); |
126 | extern void clk_reparent(struct clk *child, struct clk *parent); | 126 | extern void clk_reparent(struct clk *child, struct clk *parent); |
127 | extern void clk_unregister(struct clk *clk); | 127 | extern void clk_unregister(struct clk *clk); |
diff --git a/arch/arm/plat-omap/include/mach/common.h b/arch/arm/plat-omap/include/mach/common.h index 4b188334c666..fdeab421b4dc 100644 --- a/arch/arm/plat-omap/include/mach/common.h +++ b/arch/arm/plat-omap/include/mach/common.h | |||
@@ -33,8 +33,6 @@ struct sys_timer; | |||
33 | 33 | ||
34 | extern void omap_map_common_io(void); | 34 | extern void omap_map_common_io(void); |
35 | extern struct sys_timer omap_timer; | 35 | extern struct sys_timer omap_timer; |
36 | extern void omap_serial_init(void); | ||
37 | extern void omap_serial_enable_clocks(int enable); | ||
38 | #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) | 36 | #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) |
39 | extern int omap_register_i2c_bus(int bus_id, u32 clkrate, | 37 | extern int omap_register_i2c_bus(int bus_id, u32 clkrate, |
40 | struct i2c_board_info const *info, | 38 | struct i2c_board_info const *info, |
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h index f45ec621da96..8140dbccb7bc 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/mach/control.h | |||
@@ -144,6 +144,10 @@ | |||
144 | #define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02b0) | 144 | #define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02b0) |
145 | #define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) | 145 | #define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) |
146 | 146 | ||
147 | /* 34xx D2D idle-related pins, handled by PM core */ | ||
148 | #define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250 | ||
149 | #define OMAP3_PADCONF_SAD2D_IDLEACK 0x254 | ||
150 | |||
147 | /* | 151 | /* |
148 | * REVISIT: This list of registers is not comprehensive - there are more | 152 | * REVISIT: This list of registers is not comprehensive - there are more |
149 | * that should be added. | 153 | * that should be added. |
@@ -189,6 +193,15 @@ | |||
189 | #define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) | 193 | #define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) |
190 | #define OMAP2_PBIASLITEVMODE0 (1 << 0) | 194 | #define OMAP2_PBIASLITEVMODE0 (1 << 0) |
191 | 195 | ||
196 | /* CONTROL_IVA2_BOOTMOD bits */ | ||
197 | #define OMAP3_IVA2_BOOTMOD_SHIFT 0 | ||
198 | #define OMAP3_IVA2_BOOTMOD_MASK (0xf << 0) | ||
199 | #define OMAP3_IVA2_BOOTMOD_IDLE (0x1 << 0) | ||
200 | |||
201 | /* CONTROL_PADCONF_X bits */ | ||
202 | #define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) | ||
203 | #define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) | ||
204 | |||
192 | #ifndef __ASSEMBLY__ | 205 | #ifndef __ASSEMBLY__ |
193 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | 206 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ |
194 | defined(CONFIG_ARCH_OMAP4) | 207 | defined(CONFIG_ARCH_OMAP4) |
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h index 5bc331e93cf2..8015fe27c8b0 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/mach/irqs.h | |||
@@ -556,6 +556,7 @@ | |||
556 | 556 | ||
557 | #ifndef __ASSEMBLY__ | 557 | #ifndef __ASSEMBLY__ |
558 | extern void omap_init_irq(void); | 558 | extern void omap_init_irq(void); |
559 | extern int omap_irq_pending(void); | ||
559 | #endif | 560 | #endif |
560 | 561 | ||
561 | #include <mach/hardware.h> | 562 | #include <mach/hardware.h> |
diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h deleted file mode 100644 index ce6ee7927537..000000000000 --- a/arch/arm/plat-omap/include/mach/pm.h +++ /dev/null | |||
@@ -1,345 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/pm.h | ||
3 | * | ||
4 | * Header file for OMAP Power Management Routines | ||
5 | * | ||
6 | * Author: MontaVista Software, Inc. | ||
7 | * support@mvista.com | ||
8 | * | ||
9 | * Copyright 2002 MontaVista Software Inc. | ||
10 | * | ||
11 | * Cleanup 2004 for Linux 2.6 by Dirk Behme <dirk.behme@de.bosch.com> | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify it | ||
14 | * under the terms of the GNU General Public License as published by the | ||
15 | * Free Software Foundation; either version 2 of the License, or (at your | ||
16 | * option) any later version. | ||
17 | * | ||
18 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
19 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
20 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
21 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
24 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
25 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
28 | * | ||
29 | * You should have received a copy of the GNU General Public License along | ||
30 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
31 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
32 | */ | ||
33 | |||
34 | #ifndef __ASM_ARCH_OMAP_PM_H | ||
35 | #define __ASM_ARCH_OMAP_PM_H | ||
36 | |||
37 | /* | ||
38 | * ---------------------------------------------------------------------------- | ||
39 | * Register and offset definitions to be used in PM assembler code | ||
40 | * ---------------------------------------------------------------------------- | ||
41 | */ | ||
42 | #define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00) | ||
43 | #define ARM_IDLECT1_ASM_OFFSET 0x04 | ||
44 | #define ARM_IDLECT2_ASM_OFFSET 0x08 | ||
45 | |||
46 | #define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00) | ||
47 | #define EMIFS_CONFIG_ASM_OFFSET 0x0c | ||
48 | #define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 | ||
49 | |||
50 | /* | ||
51 | * ---------------------------------------------------------------------------- | ||
52 | * Power management bitmasks | ||
53 | * ---------------------------------------------------------------------------- | ||
54 | */ | ||
55 | #define IDLE_WAIT_CYCLES 0x00000fff | ||
56 | #define PERIPHERAL_ENABLE 0x2 | ||
57 | |||
58 | #define SELF_REFRESH_MODE 0x0c000001 | ||
59 | #define IDLE_EMIFS_REQUEST 0xc | ||
60 | #define MODEM_32K_EN 0x1 | ||
61 | #define PER_EN 0x1 | ||
62 | |||
63 | #define CPU_SUSPEND_SIZE 200 | ||
64 | #define ULPD_LOW_PWR_EN 0x0001 | ||
65 | #define ULPD_DEEP_SLEEP_TRANSITION_EN 0x0010 | ||
66 | #define ULPD_SETUP_ANALOG_CELL_3_VAL 0 | ||
67 | #define ULPD_POWER_CTRL_REG_VAL 0x0219 | ||
68 | |||
69 | #define DSP_IDLE_DELAY 10 | ||
70 | #define DSP_IDLE 0x0040 | ||
71 | #define DSP_RST 0x0004 | ||
72 | #define DSP_ENABLE 0x0002 | ||
73 | #define SUFFICIENT_DSP_RESET_TIME 1000 | ||
74 | #define DEFAULT_MPUI_CONFIG 0x05cf | ||
75 | #define ENABLE_XORCLK 0x2 | ||
76 | #define DSP_CLOCK_ENABLE 0x2000 | ||
77 | #define DSP_IDLE_MODE 0x2 | ||
78 | #define TC_IDLE_REQUEST (0x0000000c) | ||
79 | |||
80 | #define IRQ_LEVEL2 (1<<0) | ||
81 | #define IRQ_KEYBOARD (1<<1) | ||
82 | #define IRQ_UART2 (1<<15) | ||
83 | |||
84 | #define PDE_BIT 0x08 | ||
85 | #define PWD_EN_BIT 0x04 | ||
86 | #define EN_PERCK_BIT 0x04 | ||
87 | |||
88 | #define OMAP1510_DEEP_SLEEP_REQUEST 0x0ec7 | ||
89 | #define OMAP1510_BIG_SLEEP_REQUEST 0x0cc5 | ||
90 | #define OMAP1510_IDLE_LOOP_REQUEST 0x0c00 | ||
91 | #define OMAP1510_IDLE_CLOCK_DOMAINS 0x2 | ||
92 | |||
93 | /* Both big sleep and deep sleep use same values. Difference is in ULPD. */ | ||
94 | #define OMAP1610_IDLECT1_SLEEP_VAL 0x13c7 | ||
95 | #define OMAP1610_IDLECT2_SLEEP_VAL 0x09c7 | ||
96 | #define OMAP1610_IDLECT3_VAL 0x3f | ||
97 | #define OMAP1610_IDLECT3_SLEEP_ORMASK 0x2c | ||
98 | #define OMAP1610_IDLECT3 0xfffece24 | ||
99 | #define OMAP1610_IDLE_LOOP_REQUEST 0x0400 | ||
100 | |||
101 | #define OMAP730_IDLECT1_SLEEP_VAL 0x16c7 | ||
102 | #define OMAP730_IDLECT2_SLEEP_VAL 0x09c7 | ||
103 | #define OMAP730_IDLECT3_VAL 0x3f | ||
104 | #define OMAP730_IDLECT3 0xfffece24 | ||
105 | #define OMAP730_IDLE_LOOP_REQUEST 0x0C00 | ||
106 | |||
107 | #if !defined(CONFIG_ARCH_OMAP730) && \ | ||
108 | !defined(CONFIG_ARCH_OMAP15XX) && \ | ||
109 | !defined(CONFIG_ARCH_OMAP16XX) && \ | ||
110 | !defined(CONFIG_ARCH_OMAP24XX) | ||
111 | #warning "Power management for this processor not implemented yet" | ||
112 | #endif | ||
113 | |||
114 | #ifndef __ASSEMBLER__ | ||
115 | |||
116 | #include <linux/clk.h> | ||
117 | |||
118 | extern void prevent_idle_sleep(void); | ||
119 | extern void allow_idle_sleep(void); | ||
120 | |||
121 | extern void omap_pm_idle(void); | ||
122 | extern void omap_pm_suspend(void); | ||
123 | extern void omap730_cpu_suspend(unsigned short, unsigned short); | ||
124 | extern void omap1510_cpu_suspend(unsigned short, unsigned short); | ||
125 | extern void omap1610_cpu_suspend(unsigned short, unsigned short); | ||
126 | extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, | ||
127 | void __iomem *sdrc_power); | ||
128 | extern void omap730_idle_loop_suspend(void); | ||
129 | extern void omap1510_idle_loop_suspend(void); | ||
130 | extern void omap1610_idle_loop_suspend(void); | ||
131 | extern void omap24xx_idle_loop_suspend(void); | ||
132 | |||
133 | extern unsigned int omap730_cpu_suspend_sz; | ||
134 | extern unsigned int omap1510_cpu_suspend_sz; | ||
135 | extern unsigned int omap1610_cpu_suspend_sz; | ||
136 | extern unsigned int omap24xx_cpu_suspend_sz; | ||
137 | extern unsigned int omap730_idle_loop_suspend_sz; | ||
138 | extern unsigned int omap1510_idle_loop_suspend_sz; | ||
139 | extern unsigned int omap1610_idle_loop_suspend_sz; | ||
140 | extern unsigned int omap24xx_idle_loop_suspend_sz; | ||
141 | |||
142 | #ifdef CONFIG_OMAP_SERIAL_WAKE | ||
143 | extern void omap_serial_wake_trigger(int enable); | ||
144 | #else | ||
145 | #define omap_serial_wakeup_init() {} | ||
146 | #define omap_serial_wake_trigger(x) {} | ||
147 | #endif /* CONFIG_OMAP_SERIAL_WAKE */ | ||
148 | |||
149 | #define ARM_SAVE(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] = omap_readl(x) | ||
150 | #define ARM_RESTORE(x) omap_writel((arm_sleep_save[ARM_SLEEP_SAVE_##x]), (x)) | ||
151 | #define ARM_SHOW(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] | ||
152 | |||
153 | #define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x) | ||
154 | #define DSP_RESTORE(x) __raw_writew((dsp_sleep_save[DSP_SLEEP_SAVE_##x]), (x)) | ||
155 | #define DSP_SHOW(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] | ||
156 | |||
157 | #define ULPD_SAVE(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] = omap_readw(x) | ||
158 | #define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) | ||
159 | #define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] | ||
160 | |||
161 | #define MPUI730_SAVE(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] = omap_readl(x) | ||
162 | #define MPUI730_RESTORE(x) omap_writel((mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]), (x)) | ||
163 | #define MPUI730_SHOW(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] | ||
164 | |||
165 | #define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) | ||
166 | #define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) | ||
167 | #define MPUI1510_SHOW(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] | ||
168 | |||
169 | #define MPUI1610_SAVE(x) mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x] = omap_readl(x) | ||
170 | #define MPUI1610_RESTORE(x) omap_writel((mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x]), (x)) | ||
171 | #define MPUI1610_SHOW(x) mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x] | ||
172 | |||
173 | #define OMAP24XX_SAVE(x) omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_##x] = x | ||
174 | #define OMAP24XX_RESTORE(x) x = omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_##x] | ||
175 | #define OMAP24XX_SHOW(x) omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_##x] | ||
176 | |||
177 | /* | ||
178 | * List of global OMAP registers to preserve. | ||
179 | * More ones like CP and general purpose register values are preserved | ||
180 | * with the stack pointer in sleep.S. | ||
181 | */ | ||
182 | |||
183 | enum arm_save_state { | ||
184 | ARM_SLEEP_SAVE_START = 0, | ||
185 | /* | ||
186 | * MPU control registers 32 bits | ||
187 | */ | ||
188 | ARM_SLEEP_SAVE_ARM_CKCTL, | ||
189 | ARM_SLEEP_SAVE_ARM_IDLECT1, | ||
190 | ARM_SLEEP_SAVE_ARM_IDLECT2, | ||
191 | ARM_SLEEP_SAVE_ARM_IDLECT3, | ||
192 | ARM_SLEEP_SAVE_ARM_EWUPCT, | ||
193 | ARM_SLEEP_SAVE_ARM_RSTCT1, | ||
194 | ARM_SLEEP_SAVE_ARM_RSTCT2, | ||
195 | ARM_SLEEP_SAVE_ARM_SYSST, | ||
196 | ARM_SLEEP_SAVE_SIZE | ||
197 | }; | ||
198 | |||
199 | enum dsp_save_state { | ||
200 | DSP_SLEEP_SAVE_START = 0, | ||
201 | /* | ||
202 | * DSP registers 16 bits | ||
203 | */ | ||
204 | DSP_SLEEP_SAVE_DSP_IDLECT2, | ||
205 | DSP_SLEEP_SAVE_SIZE | ||
206 | }; | ||
207 | |||
208 | enum ulpd_save_state { | ||
209 | ULPD_SLEEP_SAVE_START = 0, | ||
210 | /* | ||
211 | * ULPD registers 16 bits | ||
212 | */ | ||
213 | ULPD_SLEEP_SAVE_ULPD_IT_STATUS, | ||
214 | ULPD_SLEEP_SAVE_ULPD_CLOCK_CTRL, | ||
215 | ULPD_SLEEP_SAVE_ULPD_SOFT_REQ, | ||
216 | ULPD_SLEEP_SAVE_ULPD_STATUS_REQ, | ||
217 | ULPD_SLEEP_SAVE_ULPD_DPLL_CTRL, | ||
218 | ULPD_SLEEP_SAVE_ULPD_POWER_CTRL, | ||
219 | ULPD_SLEEP_SAVE_SIZE | ||
220 | }; | ||
221 | |||
222 | enum mpui1510_save_state { | ||
223 | MPUI1510_SLEEP_SAVE_START = 0, | ||
224 | /* | ||
225 | * MPUI registers 32 bits | ||
226 | */ | ||
227 | MPUI1510_SLEEP_SAVE_MPUI_CTRL, | ||
228 | MPUI1510_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, | ||
229 | MPUI1510_SLEEP_SAVE_MPUI_DSP_API_CONFIG, | ||
230 | MPUI1510_SLEEP_SAVE_MPUI_DSP_STATUS, | ||
231 | MPUI1510_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, | ||
232 | MPUI1510_SLEEP_SAVE_EMIFS_CONFIG, | ||
233 | MPUI1510_SLEEP_SAVE_OMAP_IH1_MIR, | ||
234 | MPUI1510_SLEEP_SAVE_OMAP_IH2_MIR, | ||
235 | #if defined(CONFIG_ARCH_OMAP15XX) | ||
236 | MPUI1510_SLEEP_SAVE_SIZE | ||
237 | #else | ||
238 | MPUI1510_SLEEP_SAVE_SIZE = 0 | ||
239 | #endif | ||
240 | }; | ||
241 | |||
242 | enum mpui730_save_state { | ||
243 | MPUI730_SLEEP_SAVE_START = 0, | ||
244 | /* | ||
245 | * MPUI registers 32 bits | ||
246 | */ | ||
247 | MPUI730_SLEEP_SAVE_MPUI_CTRL, | ||
248 | MPUI730_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, | ||
249 | MPUI730_SLEEP_SAVE_MPUI_DSP_API_CONFIG, | ||
250 | MPUI730_SLEEP_SAVE_MPUI_DSP_STATUS, | ||
251 | MPUI730_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, | ||
252 | MPUI730_SLEEP_SAVE_EMIFS_CONFIG, | ||
253 | MPUI730_SLEEP_SAVE_OMAP_IH1_MIR, | ||
254 | MPUI730_SLEEP_SAVE_OMAP_IH2_0_MIR, | ||
255 | MPUI730_SLEEP_SAVE_OMAP_IH2_1_MIR, | ||
256 | #if defined(CONFIG_ARCH_OMAP730) | ||
257 | MPUI730_SLEEP_SAVE_SIZE | ||
258 | #else | ||
259 | MPUI730_SLEEP_SAVE_SIZE = 0 | ||
260 | #endif | ||
261 | }; | ||
262 | |||
263 | enum mpui1610_save_state { | ||
264 | MPUI1610_SLEEP_SAVE_START = 0, | ||
265 | /* | ||
266 | * MPUI registers 32 bits | ||
267 | */ | ||
268 | MPUI1610_SLEEP_SAVE_MPUI_CTRL, | ||
269 | MPUI1610_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, | ||
270 | MPUI1610_SLEEP_SAVE_MPUI_DSP_API_CONFIG, | ||
271 | MPUI1610_SLEEP_SAVE_MPUI_DSP_STATUS, | ||
272 | MPUI1610_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, | ||
273 | MPUI1610_SLEEP_SAVE_EMIFS_CONFIG, | ||
274 | MPUI1610_SLEEP_SAVE_OMAP_IH1_MIR, | ||
275 | MPUI1610_SLEEP_SAVE_OMAP_IH2_0_MIR, | ||
276 | MPUI1610_SLEEP_SAVE_OMAP_IH2_1_MIR, | ||
277 | MPUI1610_SLEEP_SAVE_OMAP_IH2_2_MIR, | ||
278 | MPUI1610_SLEEP_SAVE_OMAP_IH2_3_MIR, | ||
279 | #if defined(CONFIG_ARCH_OMAP16XX) | ||
280 | MPUI1610_SLEEP_SAVE_SIZE | ||
281 | #else | ||
282 | MPUI1610_SLEEP_SAVE_SIZE = 0 | ||
283 | #endif | ||
284 | }; | ||
285 | |||
286 | enum omap24xx_save_state { | ||
287 | OMAP24XX_SLEEP_SAVE_START = 0, | ||
288 | OMAP24XX_SLEEP_SAVE_INTC_MIR0, | ||
289 | OMAP24XX_SLEEP_SAVE_INTC_MIR1, | ||
290 | OMAP24XX_SLEEP_SAVE_INTC_MIR2, | ||
291 | |||
292 | OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MPU, | ||
293 | OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_CORE, | ||
294 | OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_GFX, | ||
295 | OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_DSP, | ||
296 | OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MDM, | ||
297 | |||
298 | OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MPU, | ||
299 | OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_CORE, | ||
300 | OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_GFX, | ||
301 | OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_DSP, | ||
302 | OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MDM, | ||
303 | |||
304 | OMAP24XX_SLEEP_SAVE_CM_IDLEST1_CORE, | ||
305 | OMAP24XX_SLEEP_SAVE_CM_IDLEST2_CORE, | ||
306 | OMAP24XX_SLEEP_SAVE_CM_IDLEST3_CORE, | ||
307 | OMAP24XX_SLEEP_SAVE_CM_IDLEST4_CORE, | ||
308 | OMAP24XX_SLEEP_SAVE_CM_IDLEST_GFX, | ||
309 | OMAP24XX_SLEEP_SAVE_CM_IDLEST_WKUP, | ||
310 | OMAP24XX_SLEEP_SAVE_CM_IDLEST_CKGEN, | ||
311 | OMAP24XX_SLEEP_SAVE_CM_IDLEST_DSP, | ||
312 | OMAP24XX_SLEEP_SAVE_CM_IDLEST_MDM, | ||
313 | |||
314 | OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE1_CORE, | ||
315 | OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE2_CORE, | ||
316 | OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE3_CORE, | ||
317 | OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE4_CORE, | ||
318 | OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_WKUP, | ||
319 | OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_PLL, | ||
320 | OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_DSP, | ||
321 | OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_MDM, | ||
322 | |||
323 | OMAP24XX_SLEEP_SAVE_CM_FCLKEN1_CORE, | ||
324 | OMAP24XX_SLEEP_SAVE_CM_FCLKEN2_CORE, | ||
325 | OMAP24XX_SLEEP_SAVE_CM_ICLKEN1_CORE, | ||
326 | OMAP24XX_SLEEP_SAVE_CM_ICLKEN2_CORE, | ||
327 | OMAP24XX_SLEEP_SAVE_CM_ICLKEN3_CORE, | ||
328 | OMAP24XX_SLEEP_SAVE_CM_ICLKEN4_CORE, | ||
329 | OMAP24XX_SLEEP_SAVE_GPIO1_IRQENABLE1, | ||
330 | OMAP24XX_SLEEP_SAVE_GPIO2_IRQENABLE1, | ||
331 | OMAP24XX_SLEEP_SAVE_GPIO3_IRQENABLE1, | ||
332 | OMAP24XX_SLEEP_SAVE_GPIO4_IRQENABLE1, | ||
333 | OMAP24XX_SLEEP_SAVE_GPIO3_OE, | ||
334 | OMAP24XX_SLEEP_SAVE_GPIO4_OE, | ||
335 | OMAP24XX_SLEEP_SAVE_GPIO3_RISINGDETECT, | ||
336 | OMAP24XX_SLEEP_SAVE_GPIO3_FALLINGDETECT, | ||
337 | OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SPI1_NCS2, | ||
338 | OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_MCBSP1_DX, | ||
339 | OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SSI1_FLAG_TX, | ||
340 | OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SYS_NIRQW0, | ||
341 | OMAP24XX_SLEEP_SAVE_SIZE | ||
342 | }; | ||
343 | |||
344 | #endif /* ASSEMBLER */ | ||
345 | #endif /* __ASM_ARCH_OMAP_PM_H */ | ||
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h index e37894e423bd..13abd02d1527 100644 --- a/arch/arm/plat-omap/include/mach/serial.h +++ b/arch/arm/plat-omap/include/mach/serial.h | |||
@@ -52,4 +52,13 @@ | |||
52 | __ret; \ | 52 | __ret; \ |
53 | }) | 53 | }) |
54 | 54 | ||
55 | #ifndef __ASSEMBLER__ | ||
56 | extern void omap_serial_init(void); | ||
57 | extern int omap_uart_can_sleep(void); | ||
58 | extern void omap_uart_check_wakeup(void); | ||
59 | extern void omap_uart_prepare_suspend(void); | ||
60 | extern void omap_uart_prepare_idle(int num); | ||
61 | extern void omap_uart_resume_idle(int num); | ||
62 | #endif | ||
63 | |||
55 | #endif | 64 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/sram.h b/arch/arm/plat-omap/include/mach/sram.h index ab35d622dcf5..dca7c16ae903 100644 --- a/arch/arm/plat-omap/include/mach/sram.h +++ b/arch/arm/plat-omap/include/mach/sram.h | |||
@@ -23,7 +23,8 @@ extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); | |||
23 | 23 | ||
24 | extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, | 24 | extern u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, |
25 | u32 sdrc_actim_ctrla, | 25 | u32 sdrc_actim_ctrla, |
26 | u32 sdrc_actim_ctrlb, u32 m2); | 26 | u32 sdrc_actim_ctrlb, u32 m2, |
27 | u32 unlock_dll); | ||
27 | 28 | ||
28 | /* Do not use these */ | 29 | /* Do not use these */ |
29 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | 30 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); |
@@ -60,7 +61,8 @@ extern unsigned long omap243x_sram_reprogram_sdrc_sz; | |||
60 | 61 | ||
61 | extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl, | 62 | extern u32 omap3_sram_configure_core_dpll(u32 sdrc_rfr_ctrl, |
62 | u32 sdrc_actim_ctrla, | 63 | u32 sdrc_actim_ctrla, |
63 | u32 sdrc_actim_ctrlb, u32 m2); | 64 | u32 sdrc_actim_ctrlb, u32 m2, |
65 | u32 unlock_dll); | ||
64 | extern unsigned long omap3_sram_configure_core_dpll_sz; | 66 | extern unsigned long omap3_sram_configure_core_dpll_sz; |
65 | 67 | ||
66 | #endif | 68 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h index 69f0ceed500b..f337e1761e2c 100644 --- a/arch/arm/plat-omap/include/mach/usb.h +++ b/arch/arm/plat-omap/include/mach/usb.h | |||
@@ -27,13 +27,7 @@ | |||
27 | #define UDC_BASE OMAP2_UDC_BASE | 27 | #define UDC_BASE OMAP2_UDC_BASE |
28 | #define OMAP_OHCI_BASE OMAP2_OHCI_BASE | 28 | #define OMAP_OHCI_BASE OMAP2_OHCI_BASE |
29 | 29 | ||
30 | #ifdef CONFIG_USB_MUSB_SOC | ||
31 | extern void usb_musb_init(void); | 30 | extern void usb_musb_init(void); |
32 | #else | ||
33 | static inline void usb_musb_init(void) | ||
34 | { | ||
35 | } | ||
36 | #endif | ||
37 | 31 | ||
38 | #endif | 32 | #endif |
39 | 33 | ||