diff options
Diffstat (limited to 'arch/arm/plat-omap/include')
-rw-r--r-- | arch/arm/plat-omap/include/plat/clkdev_omap.h | 41 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/clock.h | 5 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/common.h | 21 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap44xx.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap_device.h | 8 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap_hwmod.h | 26 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/powerdomain.h | 17 |
7 files changed, 110 insertions, 14 deletions
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h new file mode 100644 index 000000000000..35b36caf5f91 --- /dev/null +++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h | |||
@@ -0,0 +1,41 @@ | |||
1 | /* | ||
2 | * clkdev <-> OMAP integration | ||
3 | * | ||
4 | * Russell King <linux@arm.linux.org.uk> | ||
5 | * | ||
6 | */ | ||
7 | |||
8 | #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H | ||
9 | #define __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_CLKDEV_OMAP_H | ||
10 | |||
11 | #include <asm/clkdev.h> | ||
12 | |||
13 | struct omap_clk { | ||
14 | u16 cpu; | ||
15 | struct clk_lookup lk; | ||
16 | }; | ||
17 | |||
18 | #define CLK(dev, con, ck, cp) \ | ||
19 | { \ | ||
20 | .cpu = cp, \ | ||
21 | .lk = { \ | ||
22 | .dev_id = dev, \ | ||
23 | .con_id = con, \ | ||
24 | .clk = ck, \ | ||
25 | }, \ | ||
26 | } | ||
27 | |||
28 | |||
29 | #define CK_310 (1 << 0) | ||
30 | #define CK_7XX (1 << 1) | ||
31 | #define CK_1510 (1 << 2) | ||
32 | #define CK_16XX (1 << 3) | ||
33 | #define CK_243X (1 << 4) | ||
34 | #define CK_242X (1 << 5) | ||
35 | #define CK_343X (1 << 6) | ||
36 | #define CK_3430ES1 (1 << 7) | ||
37 | #define CK_3430ES2 (1 << 8) | ||
38 | #define CK_443X (1 << 9) | ||
39 | |||
40 | #endif | ||
41 | |||
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h index 4b8b0d65cbf2..309b6d1dccdb 100644 --- a/arch/arm/plat-omap/include/plat/clock.h +++ b/arch/arm/plat-omap/include/plat/clock.h | |||
@@ -13,6 +13,8 @@ | |||
13 | #ifndef __ARCH_ARM_OMAP_CLOCK_H | 13 | #ifndef __ARCH_ARM_OMAP_CLOCK_H |
14 | #define __ARCH_ARM_OMAP_CLOCK_H | 14 | #define __ARCH_ARM_OMAP_CLOCK_H |
15 | 15 | ||
16 | #include <linux/list.h> | ||
17 | |||
16 | struct module; | 18 | struct module; |
17 | struct clk; | 19 | struct clk; |
18 | struct clockdomain; | 20 | struct clockdomain; |
@@ -148,6 +150,8 @@ extern const struct clkops clkops_null; | |||
148 | #define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */ | 150 | #define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */ |
149 | #define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */ | 151 | #define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */ |
150 | #define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */ | 152 | #define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */ |
153 | #define CLOCK_IN_OMAP4430 (1 << 13) | ||
154 | #define ALWAYS_ENABLED (1 << 14) | ||
151 | /* bits 13-31 are currently free */ | 155 | /* bits 13-31 are currently free */ |
152 | 156 | ||
153 | /* Clksel_rate flags */ | 157 | /* Clksel_rate flags */ |
@@ -156,6 +160,7 @@ extern const struct clkops clkops_null; | |||
156 | #define RATE_IN_243X (1 << 2) | 160 | #define RATE_IN_243X (1 << 2) |
157 | #define RATE_IN_343X (1 << 3) /* rates common to all 343X */ | 161 | #define RATE_IN_343X (1 << 3) /* rates common to all 343X */ |
158 | #define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */ | 162 | #define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */ |
163 | #define RATE_IN_4430 (1 << 5) | ||
159 | 164 | ||
160 | #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) | 165 | #define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) |
161 | 166 | ||
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h index 064f1730f43b..2f816fe3ae86 100644 --- a/arch/arm/plat-omap/include/plat/common.h +++ b/arch/arm/plat-omap/include/plat/common.h | |||
@@ -58,6 +58,7 @@ struct omap_globals { | |||
58 | void __iomem *ctrl; /* System Control Module */ | 58 | void __iomem *ctrl; /* System Control Module */ |
59 | void __iomem *prm; /* Power and Reset Management */ | 59 | void __iomem *prm; /* Power and Reset Management */ |
60 | void __iomem *cm; /* Clock Management */ | 60 | void __iomem *cm; /* Clock Management */ |
61 | void __iomem *cm2; | ||
61 | }; | 62 | }; |
62 | 63 | ||
63 | void omap2_set_globals_242x(void); | 64 | void omap2_set_globals_242x(void); |
@@ -71,4 +72,24 @@ void omap2_set_globals_sdrc(struct omap_globals *); | |||
71 | void omap2_set_globals_control(struct omap_globals *); | 72 | void omap2_set_globals_control(struct omap_globals *); |
72 | void omap2_set_globals_prcm(struct omap_globals *); | 73 | void omap2_set_globals_prcm(struct omap_globals *); |
73 | 74 | ||
75 | /** | ||
76 | * omap_test_timeout - busy-loop, testing a condition | ||
77 | * @cond: condition to test until it evaluates to true | ||
78 | * @timeout: maximum number of microseconds in the timeout | ||
79 | * @index: loop index (integer) | ||
80 | * | ||
81 | * Loop waiting for @cond to become true or until at least @timeout | ||
82 | * microseconds have passed. To use, define some integer @index in the | ||
83 | * calling code. After running, if @index == @timeout, then the loop has | ||
84 | * timed out. | ||
85 | */ | ||
86 | #define omap_test_timeout(cond, timeout, index) \ | ||
87 | ({ \ | ||
88 | for (index = 0; index < timeout; index++) { \ | ||
89 | if (cond) \ | ||
90 | break; \ | ||
91 | udelay(1); \ | ||
92 | } \ | ||
93 | }) | ||
94 | |||
74 | #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ | 95 | #endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ |
diff --git a/arch/arm/plat-omap/include/plat/omap44xx.h b/arch/arm/plat-omap/include/plat/omap44xx.h index e52902a15c1a..ef870de43c29 100644 --- a/arch/arm/plat-omap/include/plat/omap44xx.h +++ b/arch/arm/plat-omap/include/plat/omap44xx.h | |||
@@ -26,8 +26,10 @@ | |||
26 | #define OMAP44XX_EMIF2_BASE 0x4d000000 | 26 | #define OMAP44XX_EMIF2_BASE 0x4d000000 |
27 | #define OMAP44XX_DMM_BASE 0x4e000000 | 27 | #define OMAP44XX_DMM_BASE 0x4e000000 |
28 | #define OMAP4430_32KSYNCT_BASE 0x4a304000 | 28 | #define OMAP4430_32KSYNCT_BASE 0x4a304000 |
29 | #define OMAP4430_CM_BASE 0x4a004000 | 29 | #define OMAP4430_CM1_BASE 0x4a004000 |
30 | #define OMAP4430_PRM_BASE 0x48306000 | 30 | #define OMAP4430_CM_BASE OMAP4430_CM1_BASE |
31 | #define OMAP4430_CM2_BASE 0x4a008000 | ||
32 | #define OMAP4430_PRM_BASE 0x4a306000 | ||
31 | #define OMAP44XX_GPMC_BASE 0x50000000 | 33 | #define OMAP44XX_GPMC_BASE 0x50000000 |
32 | #define OMAP443X_SCM_BASE 0x4a002000 | 34 | #define OMAP443X_SCM_BASE 0x4a002000 |
33 | #define OMAP443X_CTRL_BASE OMAP443X_SCM_BASE | 35 | #define OMAP443X_CTRL_BASE OMAP443X_SCM_BASE |
diff --git a/arch/arm/plat-omap/include/plat/omap_device.h b/arch/arm/plat-omap/include/plat/omap_device.h index 11a9773a4e7f..dc1fac1d805c 100644 --- a/arch/arm/plat-omap/include/plat/omap_device.h +++ b/arch/arm/plat-omap/include/plat/omap_device.h | |||
@@ -50,8 +50,8 @@ | |||
50 | * @pm_lats: ptr to an omap_device_pm_latency table | 50 | * @pm_lats: ptr to an omap_device_pm_latency table |
51 | * @pm_lats_cnt: ARRAY_SIZE() of what is passed to @pm_lats | 51 | * @pm_lats_cnt: ARRAY_SIZE() of what is passed to @pm_lats |
52 | * @pm_lat_level: array index of the last odpl entry executed - -1 if never | 52 | * @pm_lat_level: array index of the last odpl entry executed - -1 if never |
53 | * @dev_wakeup_lat: dev wakeup latency in microseconds | 53 | * @dev_wakeup_lat: dev wakeup latency in nanoseconds |
54 | * @_dev_wakeup_lat_limit: dev wakeup latency limit in usec - set by OMAP PM | 54 | * @_dev_wakeup_lat_limit: dev wakeup latency limit in nsec - set by OMAP PM |
55 | * @_state: one of OMAP_DEVICE_STATE_* (see above) | 55 | * @_state: one of OMAP_DEVICE_STATE_* (see above) |
56 | * @flags: device flags | 56 | * @flags: device flags |
57 | * | 57 | * |
@@ -137,5 +137,7 @@ struct omap_device_pm_latency { | |||
137 | }; | 137 | }; |
138 | 138 | ||
139 | 139 | ||
140 | #endif | 140 | /* Get omap_device pointer from platform_device pointer */ |
141 | #define to_omap_device(x) container_of((x), struct omap_device, pdev) | ||
141 | 142 | ||
143 | #endif | ||
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index dbdd123eca16..007935a921ea 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
@@ -50,6 +50,8 @@ struct omap_device; | |||
50 | #define SYSC_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT) | 50 | #define SYSC_ENAWAKEUP_MASK (1 << SYSC_ENAWAKEUP_SHIFT) |
51 | #define SYSC_SOFTRESET_SHIFT 1 | 51 | #define SYSC_SOFTRESET_SHIFT 1 |
52 | #define SYSC_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT) | 52 | #define SYSC_SOFTRESET_MASK (1 << SYSC_SOFTRESET_SHIFT) |
53 | #define SYSC_AUTOIDLE_SHIFT 0 | ||
54 | #define SYSC_AUTOIDLE_MASK (1 << SYSC_AUTOIDLE_SHIFT) | ||
53 | 55 | ||
54 | /* OCP SYSSTATUS bit shifts/masks */ | 56 | /* OCP SYSSTATUS bit shifts/masks */ |
55 | #define SYSS_RESETDONE_SHIFT 0 | 57 | #define SYSS_RESETDONE_SHIFT 0 |
@@ -62,7 +64,21 @@ struct omap_device; | |||
62 | 64 | ||
63 | 65 | ||
64 | /** | 66 | /** |
65 | * struct omap_hwmod_dma_info - MPU address space handled by the hwmod | 67 | * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod |
68 | * @name: name of the IRQ channel (module local name) | ||
69 | * @irq_ch: IRQ channel ID | ||
70 | * | ||
71 | * @name should be something short, e.g., "tx" or "rx". It is for use | ||
72 | * by platform_get_resource_byname(). It is defined locally to the | ||
73 | * hwmod. | ||
74 | */ | ||
75 | struct omap_hwmod_irq_info { | ||
76 | const char *name; | ||
77 | u16 irq; | ||
78 | }; | ||
79 | |||
80 | /** | ||
81 | * struct omap_hwmod_dma_info - DMA channels used by the hwmod | ||
66 | * @name: name of the DMA channel (module local name) | 82 | * @name: name of the DMA channel (module local name) |
67 | * @dma_ch: DMA channel ID | 83 | * @dma_ch: DMA channel ID |
68 | * | 84 | * |
@@ -294,13 +310,17 @@ struct omap_hwmod_omap4_prcm { | |||
294 | * SDRAM controller, etc. | 310 | * SDRAM controller, etc. |
295 | * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM | 311 | * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM |
296 | * controller, etc. | 312 | * controller, etc. |
313 | * HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE) | ||
314 | * when module is enabled, rather than the default, which is to | ||
315 | * enable autoidle | ||
297 | * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup | 316 | * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup |
298 | */ | 317 | */ |
299 | #define HWMOD_SWSUP_SIDLE (1 << 0) | 318 | #define HWMOD_SWSUP_SIDLE (1 << 0) |
300 | #define HWMOD_SWSUP_MSTANDBY (1 << 1) | 319 | #define HWMOD_SWSUP_MSTANDBY (1 << 1) |
301 | #define HWMOD_INIT_NO_RESET (1 << 2) | 320 | #define HWMOD_INIT_NO_RESET (1 << 2) |
302 | #define HWMOD_INIT_NO_IDLE (1 << 3) | 321 | #define HWMOD_INIT_NO_IDLE (1 << 3) |
303 | #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 4) | 322 | #define HWMOD_NO_OCP_AUTOIDLE (1 << 4) |
323 | #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5) | ||
304 | 324 | ||
305 | /* | 325 | /* |
306 | * omap_hwmod._int_flags definitions | 326 | * omap_hwmod._int_flags definitions |
@@ -373,7 +393,7 @@ struct omap_hwmod_omap4_prcm { | |||
373 | struct omap_hwmod { | 393 | struct omap_hwmod { |
374 | const char *name; | 394 | const char *name; |
375 | struct omap_device *od; | 395 | struct omap_device *od; |
376 | u8 *mpu_irqs; | 396 | struct omap_hwmod_irq_info *mpu_irqs; |
377 | struct omap_hwmod_dma_info *sdma_chs; | 397 | struct omap_hwmod_dma_info *sdma_chs; |
378 | union { | 398 | union { |
379 | struct omap_hwmod_omap2_prcm omap2; | 399 | struct omap_hwmod_omap2_prcm omap2; |
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h index 3d45ee1d3cf4..0b960051eaed 100644 --- a/arch/arm/plat-omap/include/plat/powerdomain.h +++ b/arch/arm/plat-omap/include/plat/powerdomain.h | |||
@@ -28,6 +28,8 @@ | |||
28 | #define PWRDM_POWER_INACTIVE 0x2 | 28 | #define PWRDM_POWER_INACTIVE 0x2 |
29 | #define PWRDM_POWER_ON 0x3 | 29 | #define PWRDM_POWER_ON 0x3 |
30 | 30 | ||
31 | #define PWRDM_MAX_PWRSTS 4 | ||
32 | |||
31 | /* Powerdomain allowable state bitfields */ | 33 | /* Powerdomain allowable state bitfields */ |
32 | #define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ | 34 | #define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ |
33 | (1 << PWRDM_POWER_ON)) | 35 | (1 << PWRDM_POWER_ON)) |
@@ -40,7 +42,10 @@ | |||
40 | 42 | ||
41 | /* Powerdomain flags */ | 43 | /* Powerdomain flags */ |
42 | #define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ | 44 | #define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ |
43 | 45 | #define PWRDM_HAS_MPU_QUIRK (1 << 1) /* MPU pwr domain has MEM bank 0 bits | |
46 | * in MEM bank 1 position. This is | ||
47 | * true for OMAP3430 | ||
48 | */ | ||
44 | 49 | ||
45 | /* | 50 | /* |
46 | * Number of memory banks that are power-controllable. On OMAP3430, the | 51 | * Number of memory banks that are power-controllable. On OMAP3430, the |
@@ -85,15 +90,15 @@ struct powerdomain { | |||
85 | /* Used to represent the OMAP chip types containing this pwrdm */ | 90 | /* Used to represent the OMAP chip types containing this pwrdm */ |
86 | const struct omap_chip_id omap_chip; | 91 | const struct omap_chip_id omap_chip; |
87 | 92 | ||
88 | /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */ | ||
89 | const u8 dep_bit; | ||
90 | |||
91 | /* Powerdomains that can be told to wake this powerdomain up */ | 93 | /* Powerdomains that can be told to wake this powerdomain up */ |
92 | struct pwrdm_dep *wkdep_srcs; | 94 | struct pwrdm_dep *wkdep_srcs; |
93 | 95 | ||
94 | /* Powerdomains that can be told to keep this pwrdm from inactivity */ | 96 | /* Powerdomains that can be told to keep this pwrdm from inactivity */ |
95 | struct pwrdm_dep *sleepdep_srcs; | 97 | struct pwrdm_dep *sleepdep_srcs; |
96 | 98 | ||
99 | /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */ | ||
100 | const u8 dep_bit; | ||
101 | |||
97 | /* Possible powerdomain power states */ | 102 | /* Possible powerdomain power states */ |
98 | const u8 pwrsts; | 103 | const u8 pwrsts; |
99 | 104 | ||
@@ -118,11 +123,11 @@ struct powerdomain { | |||
118 | struct list_head node; | 123 | struct list_head node; |
119 | 124 | ||
120 | int state; | 125 | int state; |
121 | unsigned state_counter[4]; | 126 | unsigned state_counter[PWRDM_MAX_PWRSTS]; |
122 | 127 | ||
123 | #ifdef CONFIG_PM_DEBUG | 128 | #ifdef CONFIG_PM_DEBUG |
124 | s64 timer; | 129 | s64 timer; |
125 | s64 state_timer[4]; | 130 | s64 state_timer[PWRDM_MAX_PWRSTS]; |
126 | #endif | 131 | #endif |
127 | }; | 132 | }; |
128 | 133 | ||