diff options
Diffstat (limited to 'arch/arm/plat-omap/include/plat/sram.h')
-rw-r--r-- | arch/arm/plat-omap/include/plat/sram.h | 97 |
1 files changed, 4 insertions, 93 deletions
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h index 227ae2657554..ba4525059a99 100644 --- a/arch/arm/plat-omap/include/plat/sram.h +++ b/arch/arm/plat-omap/include/plat/sram.h | |||
@@ -1,18 +1,8 @@ | |||
1 | /* | 1 | int omap_sram_init(void); |
2 | * arch/arm/plat-omap/include/mach/sram.h | ||
3 | * | ||
4 | * Interface for functions that need to be run in internal SRAM | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | 2 | ||
11 | #ifndef __ARCH_ARM_OMAP_SRAM_H | 3 | void omap_map_sram(unsigned long start, unsigned long size, |
12 | #define __ARCH_ARM_OMAP_SRAM_H | 4 | unsigned long skip, int cached); |
13 | 5 | void omap_sram_reset(void); | |
14 | #ifndef __ASSEMBLY__ | ||
15 | #include <asm/fncpy.h> | ||
16 | 6 | ||
17 | extern void *omap_sram_push_address(unsigned long size); | 7 | extern void *omap_sram_push_address(unsigned long size); |
18 | 8 | ||
@@ -24,82 +14,3 @@ extern void *omap_sram_push_address(unsigned long size); | |||
24 | _res = fncpy(_sram_address, &(funcp), size); \ | 14 | _res = fncpy(_sram_address, &(funcp), size); \ |
25 | _res; \ | 15 | _res; \ |
26 | }) | 16 | }) |
27 | |||
28 | extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); | ||
29 | |||
30 | extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
31 | u32 base_cs, u32 force_unlock); | ||
32 | extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | ||
33 | u32 mem_type); | ||
34 | extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); | ||
35 | |||
36 | extern u32 omap3_configure_core_dpll( | ||
37 | u32 m2, u32 unlock_dll, u32 f, u32 inc, | ||
38 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, | ||
39 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | ||
40 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | ||
41 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | ||
42 | extern void omap3_sram_restore_context(void); | ||
43 | |||
44 | /* Do not use these */ | ||
45 | extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | ||
46 | extern unsigned long omap1_sram_reprogram_clock_sz; | ||
47 | |||
48 | extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); | ||
49 | extern unsigned long omap24xx_sram_reprogram_clock_sz; | ||
50 | |||
51 | extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
52 | u32 base_cs, u32 force_unlock); | ||
53 | extern unsigned long omap242x_sram_ddr_init_sz; | ||
54 | |||
55 | extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, | ||
56 | int bypass); | ||
57 | extern unsigned long omap242x_sram_set_prcm_sz; | ||
58 | |||
59 | extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | ||
60 | u32 mem_type); | ||
61 | extern unsigned long omap242x_sram_reprogram_sdrc_sz; | ||
62 | |||
63 | |||
64 | extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, | ||
65 | u32 base_cs, u32 force_unlock); | ||
66 | extern unsigned long omap243x_sram_ddr_init_sz; | ||
67 | |||
68 | extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, | ||
69 | int bypass); | ||
70 | extern unsigned long omap243x_sram_set_prcm_sz; | ||
71 | |||
72 | extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, | ||
73 | u32 mem_type); | ||
74 | extern unsigned long omap243x_sram_reprogram_sdrc_sz; | ||
75 | |||
76 | extern u32 omap3_sram_configure_core_dpll( | ||
77 | u32 m2, u32 unlock_dll, u32 f, u32 inc, | ||
78 | u32 sdrc_rfr_ctrl_0, u32 sdrc_actim_ctrl_a_0, | ||
79 | u32 sdrc_actim_ctrl_b_0, u32 sdrc_mr_0, | ||
80 | u32 sdrc_rfr_ctrl_1, u32 sdrc_actim_ctrl_a_1, | ||
81 | u32 sdrc_actim_ctrl_b_1, u32 sdrc_mr_1); | ||
82 | extern unsigned long omap3_sram_configure_core_dpll_sz; | ||
83 | |||
84 | #ifdef CONFIG_PM | ||
85 | extern void omap_push_sram_idle(void); | ||
86 | #else | ||
87 | static inline void omap_push_sram_idle(void) {} | ||
88 | #endif /* CONFIG_PM */ | ||
89 | |||
90 | #endif /* __ASSEMBLY__ */ | ||
91 | |||
92 | /* | ||
93 | * OMAP2+: define the SRAM PA addresses. | ||
94 | * Used by the SRAM management code and the idle sleep code. | ||
95 | */ | ||
96 | #define OMAP2_SRAM_PA 0x40200000 | ||
97 | #define OMAP3_SRAM_PA 0x40200000 | ||
98 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
99 | #define OMAP4_SRAM_PA 0x40304000 | ||
100 | #define OMAP4_SRAM_VA 0xfe404000 | ||
101 | #else | ||
102 | #define OMAP4_SRAM_PA 0x40300000 | ||
103 | #endif | ||
104 | #define AM33XX_SRAM_PA 0x40300000 | ||
105 | #endif | ||