diff options
Diffstat (limited to 'arch/arm/plat-omap/include/plat/powerdomain.h')
-rw-r--r-- | arch/arm/plat-omap/include/plat/powerdomain.h | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/arch/arm/plat-omap/include/plat/powerdomain.h b/arch/arm/plat-omap/include/plat/powerdomain.h index 3d45ee1d3cf4..0b960051eaed 100644 --- a/arch/arm/plat-omap/include/plat/powerdomain.h +++ b/arch/arm/plat-omap/include/plat/powerdomain.h | |||
@@ -28,6 +28,8 @@ | |||
28 | #define PWRDM_POWER_INACTIVE 0x2 | 28 | #define PWRDM_POWER_INACTIVE 0x2 |
29 | #define PWRDM_POWER_ON 0x3 | 29 | #define PWRDM_POWER_ON 0x3 |
30 | 30 | ||
31 | #define PWRDM_MAX_PWRSTS 4 | ||
32 | |||
31 | /* Powerdomain allowable state bitfields */ | 33 | /* Powerdomain allowable state bitfields */ |
32 | #define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ | 34 | #define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \ |
33 | (1 << PWRDM_POWER_ON)) | 35 | (1 << PWRDM_POWER_ON)) |
@@ -40,7 +42,10 @@ | |||
40 | 42 | ||
41 | /* Powerdomain flags */ | 43 | /* Powerdomain flags */ |
42 | #define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ | 44 | #define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */ |
43 | 45 | #define PWRDM_HAS_MPU_QUIRK (1 << 1) /* MPU pwr domain has MEM bank 0 bits | |
46 | * in MEM bank 1 position. This is | ||
47 | * true for OMAP3430 | ||
48 | */ | ||
44 | 49 | ||
45 | /* | 50 | /* |
46 | * Number of memory banks that are power-controllable. On OMAP3430, the | 51 | * Number of memory banks that are power-controllable. On OMAP3430, the |
@@ -85,15 +90,15 @@ struct powerdomain { | |||
85 | /* Used to represent the OMAP chip types containing this pwrdm */ | 90 | /* Used to represent the OMAP chip types containing this pwrdm */ |
86 | const struct omap_chip_id omap_chip; | 91 | const struct omap_chip_id omap_chip; |
87 | 92 | ||
88 | /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */ | ||
89 | const u8 dep_bit; | ||
90 | |||
91 | /* Powerdomains that can be told to wake this powerdomain up */ | 93 | /* Powerdomains that can be told to wake this powerdomain up */ |
92 | struct pwrdm_dep *wkdep_srcs; | 94 | struct pwrdm_dep *wkdep_srcs; |
93 | 95 | ||
94 | /* Powerdomains that can be told to keep this pwrdm from inactivity */ | 96 | /* Powerdomains that can be told to keep this pwrdm from inactivity */ |
95 | struct pwrdm_dep *sleepdep_srcs; | 97 | struct pwrdm_dep *sleepdep_srcs; |
96 | 98 | ||
99 | /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */ | ||
100 | const u8 dep_bit; | ||
101 | |||
97 | /* Possible powerdomain power states */ | 102 | /* Possible powerdomain power states */ |
98 | const u8 pwrsts; | 103 | const u8 pwrsts; |
99 | 104 | ||
@@ -118,11 +123,11 @@ struct powerdomain { | |||
118 | struct list_head node; | 123 | struct list_head node; |
119 | 124 | ||
120 | int state; | 125 | int state; |
121 | unsigned state_counter[4]; | 126 | unsigned state_counter[PWRDM_MAX_PWRSTS]; |
122 | 127 | ||
123 | #ifdef CONFIG_PM_DEBUG | 128 | #ifdef CONFIG_PM_DEBUG |
124 | s64 timer; | 129 | s64 timer; |
125 | s64 state_timer[4]; | 130 | s64 state_timer[PWRDM_MAX_PWRSTS]; |
126 | #endif | 131 | #endif |
127 | }; | 132 | }; |
128 | 133 | ||