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Diffstat (limited to 'arch/arm/plat-omap/include/plat/mcbsp.h')
-rw-r--r--arch/arm/plat-omap/include/plat/mcbsp.h64
1 files changed, 25 insertions, 39 deletions
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h
index b87d83ccd545..f8f690ab2997 100644
--- a/arch/arm/plat-omap/include/plat/mcbsp.h
+++ b/arch/arm/plat-omap/include/plat/mcbsp.h
@@ -37,6 +37,10 @@ static struct platform_device omap_mcbsp##port_nr = { \
37 .id = OMAP_MCBSP##port_nr, \ 37 .id = OMAP_MCBSP##port_nr, \
38} 38}
39 39
40#define MCBSP_CONFIG_TYPE2 0x2
41#define MCBSP_CONFIG_TYPE3 0x3
42#define MCBSP_CONFIG_TYPE4 0x4
43
40#define OMAP7XX_MCBSP1_BASE 0xfffb1000 44#define OMAP7XX_MCBSP1_BASE 0xfffb1000
41#define OMAP7XX_MCBSP2_BASE 0xfffb1800 45#define OMAP7XX_MCBSP2_BASE 0xfffb1800
42 46
@@ -48,32 +52,14 @@ static struct platform_device omap_mcbsp##port_nr = { \
48#define OMAP1610_MCBSP2_BASE 0xfffb1000 52#define OMAP1610_MCBSP2_BASE 0xfffb1000
49#define OMAP1610_MCBSP3_BASE 0xe1017000 53#define OMAP1610_MCBSP3_BASE 0xe1017000
50 54
51#define OMAP24XX_MCBSP1_BASE 0x48074000 55#ifdef CONFIG_ARCH_OMAP1
52#define OMAP24XX_MCBSP2_BASE 0x48076000
53#define OMAP2430_MCBSP3_BASE 0x4808c000
54#define OMAP2430_MCBSP4_BASE 0x4808e000
55#define OMAP2430_MCBSP5_BASE 0x48096000
56
57#define OMAP34XX_MCBSP1_BASE 0x48074000
58#define OMAP34XX_MCBSP2_BASE 0x49022000
59#define OMAP34XX_MCBSP2_ST_BASE 0x49028000
60#define OMAP34XX_MCBSP3_BASE 0x49024000
61#define OMAP34XX_MCBSP3_ST_BASE 0x4902A000
62#define OMAP34XX_MCBSP3_BASE 0x49024000
63#define OMAP34XX_MCBSP4_BASE 0x49026000
64#define OMAP34XX_MCBSP5_BASE 0x48096000
65
66#define OMAP44XX_MCBSP1_BASE 0x49022000
67#define OMAP44XX_MCBSP2_BASE 0x49024000
68#define OMAP44XX_MCBSP3_BASE 0x49026000
69#define OMAP44XX_MCBSP4_BASE 0x48096000
70
71#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
72 56
73#define OMAP_MCBSP_REG_DRR2 0x00 57#define OMAP_MCBSP_REG_DRR2 0x00
74#define OMAP_MCBSP_REG_DRR1 0x02 58#define OMAP_MCBSP_REG_DRR1 0x02
75#define OMAP_MCBSP_REG_DXR2 0x04 59#define OMAP_MCBSP_REG_DXR2 0x04
76#define OMAP_MCBSP_REG_DXR1 0x06 60#define OMAP_MCBSP_REG_DXR1 0x06
61#define OMAP_MCBSP_REG_DRR 0x02
62#define OMAP_MCBSP_REG_DXR 0x06
77#define OMAP_MCBSP_REG_SPCR2 0x08 63#define OMAP_MCBSP_REG_SPCR2 0x08
78#define OMAP_MCBSP_REG_SPCR1 0x0a 64#define OMAP_MCBSP_REG_SPCR1 0x0a
79#define OMAP_MCBSP_REG_RCR2 0x0c 65#define OMAP_MCBSP_REG_RCR2 0x0c
@@ -106,13 +92,6 @@ static struct platform_device omap_mcbsp##port_nr = { \
106#define OMAP_MCBSP_REG_XCCR 0x00 92#define OMAP_MCBSP_REG_XCCR 0x00
107#define OMAP_MCBSP_REG_RCCR 0x00 93#define OMAP_MCBSP_REG_RCCR 0x00
108 94
109#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1)
110#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
111
112#define AUDIO_MCBSP OMAP_MCBSP1
113#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX
114#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX
115
116#else 95#else
117 96
118#define OMAP_MCBSP_REG_DRR2 0x00 97#define OMAP_MCBSP_REG_DRR2 0x00
@@ -168,13 +147,6 @@ static struct platform_device omap_mcbsp##port_nr = { \
168#define OMAP_ST_REG_SFIRCR 0x28 147#define OMAP_ST_REG_SFIRCR 0x28
169#define OMAP_ST_REG_SSELCR 0x2C 148#define OMAP_ST_REG_SSELCR 0x2C
170 149
171#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1)
172#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1)
173
174#define AUDIO_MCBSP OMAP_MCBSP2
175#define AUDIO_DMA_TX OMAP24XX_DMA_MCBSP2_TX
176#define AUDIO_DMA_RX OMAP24XX_DMA_MCBSP2_RX
177
178#endif 150#endif
179 151
180/************************** McBSP SPCR1 bit definitions ***********************/ 152/************************** McBSP SPCR1 bit definitions ***********************/
@@ -428,8 +400,9 @@ struct omap_mcbsp_platform_data {
428#ifdef CONFIG_ARCH_OMAP3 400#ifdef CONFIG_ARCH_OMAP3
429 /* Sidetone block for McBSP 2 and 3 */ 401 /* Sidetone block for McBSP 2 and 3 */
430 unsigned long phys_base_st; 402 unsigned long phys_base_st;
431 u16 buffer_size;
432#endif 403#endif
404 u16 buffer_size;
405 unsigned int mcbsp_config_type;
433}; 406};
434 407
435struct omap_mcbsp_st_data { 408struct omap_mcbsp_st_data {
@@ -445,6 +418,7 @@ struct omap_mcbsp_st_data {
445struct omap_mcbsp { 418struct omap_mcbsp {
446 struct device *dev; 419 struct device *dev;
447 unsigned long phys_base; 420 unsigned long phys_base;
421 unsigned long phys_dma_base;
448 void __iomem *io_base; 422 void __iomem *io_base;
449 u8 id; 423 u8 id;
450 u8 free; 424 u8 free;
@@ -471,7 +445,6 @@ struct omap_mcbsp {
471 /* Protect the field .free, while checking if the mcbsp is in use */ 445 /* Protect the field .free, while checking if the mcbsp is in use */
472 spinlock_t lock; 446 spinlock_t lock;
473 struct omap_mcbsp_platform_data *pdata; 447 struct omap_mcbsp_platform_data *pdata;
474 struct clk *iclk;
475 struct clk *fclk; 448 struct clk *fclk;
476#ifdef CONFIG_ARCH_OMAP3 449#ifdef CONFIG_ARCH_OMAP3
477 struct omap_mcbsp_st_data *st_data; 450 struct omap_mcbsp_st_data *st_data;
@@ -480,7 +453,17 @@ struct omap_mcbsp {
480 u16 max_rx_thres; 453 u16 max_rx_thres;
481#endif 454#endif
482 void *reg_cache; 455 void *reg_cache;
456 unsigned int mcbsp_config_type;
483}; 457};
458
459/**
460 * omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod
461 * @sidetone: name of the sidetone device
462 */
463struct omap_mcbsp_dev_attr {
464 const char *sidetone;
465};
466
484extern struct omap_mcbsp **mcbsp_ptr; 467extern struct omap_mcbsp **mcbsp_ptr;
485extern int omap_mcbsp_count, omap_mcbsp_cache_size; 468extern int omap_mcbsp_count, omap_mcbsp_cache_size;
486 469
@@ -488,8 +471,8 @@ extern int omap_mcbsp_count, omap_mcbsp_cache_size;
488#define id_to_mcbsp_ptr(id) mcbsp_ptr[id]; 471#define id_to_mcbsp_ptr(id) mcbsp_ptr[id];
489 472
490int omap_mcbsp_init(void); 473int omap_mcbsp_init(void);
491void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, 474void omap_mcbsp_register_board_cfg(struct resource *res, int res_count,
492 int size); 475 struct omap_mcbsp_platform_data *config, int size);
493void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); 476void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config);
494#ifdef CONFIG_ARCH_OMAP3 477#ifdef CONFIG_ARCH_OMAP3
495void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold); 478void omap_mcbsp_set_tx_threshold(unsigned int id, u16 threshold);
@@ -539,6 +522,9 @@ int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
539void omap2_mcbsp1_mux_clkr_src(u8 mux); 522void omap2_mcbsp1_mux_clkr_src(u8 mux);
540void omap2_mcbsp1_mux_fsr_src(u8 mux); 523void omap2_mcbsp1_mux_fsr_src(u8 mux);
541 524
525int omap_mcbsp_dma_ch_params(unsigned int id, unsigned int stream);
526int omap_mcbsp_dma_reg_params(unsigned int id, unsigned int stream);
527
542#ifdef CONFIG_ARCH_OMAP3 528#ifdef CONFIG_ARCH_OMAP3
543/* Sidetone specific API */ 529/* Sidetone specific API */
544int omap_st_set_chgain(unsigned int id, int channel, s16 chgain); 530int omap_st_set_chgain(unsigned int id, int channel, s16 chgain);