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Diffstat (limited to 'arch/arm/plat-omap/include/plat/common.h')
-rw-r--r--arch/arm/plat-omap/include/plat/common.h18
1 files changed, 11 insertions, 7 deletions
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index e04a58ec53a2..7556e271942e 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -37,16 +37,20 @@ extern void __iomem *gic_cpu_base_addr;
37extern void omap_map_common_io(void); 37extern void omap_map_common_io(void);
38extern struct sys_timer omap_timer; 38extern struct sys_timer omap_timer;
39 39
40/* IO bases for various OMAP processors */ 40/*
41 * IO bases for various OMAP processors
42 * Except the tap base, rest all the io bases
43 * listed are physical addresses.
44 */
41struct omap_globals { 45struct omap_globals {
42 u32 class; /* OMAP class to detect */ 46 u32 class; /* OMAP class to detect */
43 void __iomem *tap; /* Control module ID code */ 47 void __iomem *tap; /* Control module ID code */
44 void __iomem *sdrc; /* SDRAM Controller */ 48 unsigned long sdrc; /* SDRAM Controller */
45 void __iomem *sms; /* SDRAM Memory Scheduler */ 49 unsigned long sms; /* SDRAM Memory Scheduler */
46 void __iomem *ctrl; /* System Control Module */ 50 unsigned long ctrl; /* System Control Module */
47 void __iomem *prm; /* Power and Reset Management */ 51 unsigned long prm; /* Power and Reset Management */
48 void __iomem *cm; /* Clock Management */ 52 unsigned long cm; /* Clock Management */
49 void __iomem *cm2; 53 unsigned long cm2;
50 unsigned long uart1_phys; 54 unsigned long uart1_phys;
51 unsigned long uart2_phys; 55 unsigned long uart2_phys;
52 unsigned long uart3_phys; 56 unsigned long uart3_phys;