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-rw-r--r--arch/arm/plat-omap/include/mach/control.h6
-rw-r--r--arch/arm/plat-omap/include/mach/fpga.h12
-rw-r--r--arch/arm/plat-omap/include/mach/gpio.h2
-rw-r--r--arch/arm/plat-omap/include/mach/hardware.h2
-rw-r--r--arch/arm/plat-omap/include/mach/io.h56
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h5
-rw-r--r--arch/arm/plat-omap/include/mach/pm.h4
-rw-r--r--arch/arm/plat-omap/include/mach/sdrc.h6
-rw-r--r--arch/arm/plat-omap/include/mach/serial.h12
9 files changed, 58 insertions, 47 deletions
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index e3fd62d9a995..ee378d254cbd 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -19,11 +19,11 @@
19#include <mach/io.h> 19#include <mach/io.h>
20 20
21#define OMAP242X_CTRL_REGADDR(reg) \ 21#define OMAP242X_CTRL_REGADDR(reg) \
22 (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) 22 IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
23#define OMAP243X_CTRL_REGADDR(reg) \ 23#define OMAP243X_CTRL_REGADDR(reg) \
24 (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) 24 IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
25#define OMAP343X_CTRL_REGADDR(reg) \ 25#define OMAP343X_CTRL_REGADDR(reg) \
26 (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) 26 IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
27 27
28/* 28/*
29 * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for 29 * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for
diff --git a/arch/arm/plat-omap/include/mach/fpga.h b/arch/arm/plat-omap/include/mach/fpga.h
index c92e4b42b289..f1864a652f7a 100644
--- a/arch/arm/plat-omap/include/mach/fpga.h
+++ b/arch/arm/plat-omap/include/mach/fpga.h
@@ -34,9 +34,9 @@ extern void omap1510_fpga_init_irq(void);
34 * --------------------------------------------------------------------------- 34 * ---------------------------------------------------------------------------
35 */ 35 */
36/* maps in the FPGA registers and the ETHR registers */ 36/* maps in the FPGA registers and the ETHR registers */
37#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ 37#define H2P2_DBG_FPGA_BASE IOMEM(0xE8000000) /* VA */
38#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ 38#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
39#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ 39#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
40 40
41#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) 41#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
42#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ 42#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
@@ -85,9 +85,9 @@ struct h2p2_dbg_fpga {
85 * OMAP-1510 FPGA 85 * OMAP-1510 FPGA
86 * --------------------------------------------------------------------------- 86 * ---------------------------------------------------------------------------
87 */ 87 */
88#define OMAP1510_FPGA_BASE 0xE8000000 /* Virtual */ 88#define OMAP1510_FPGA_BASE IOMEM(0xE8000000) /* VA */
89#define OMAP1510_FPGA_SIZE SZ_4K 89#define OMAP1510_FPGA_SIZE SZ_4K
90#define OMAP1510_FPGA_START 0x08000000 /* Physical */ 90#define OMAP1510_FPGA_START 0x08000000 /* PA */
91 91
92/* Revision */ 92/* Revision */
93#define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0) 93#define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0)
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 94ce2780e8ee..4cb818da672c 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -29,7 +29,7 @@
29#include <mach/irqs.h> 29#include <mach/irqs.h>
30#include <asm/io.h> 30#include <asm/io.h>
31 31
32#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000 32#define OMAP_MPUIO_BASE 0xfffb5000
33 33
34#ifdef CONFIG_ARCH_OMAP730 34#ifdef CONFIG_ARCH_OMAP730
35#define OMAP_MPUIO_INPUT_LATCH 0x00 35#define OMAP_MPUIO_INPUT_LATCH 0x00
diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h
index 07f5d7f21528..abb01e471c4c 100644
--- a/arch/arm/plat-omap/include/mach/hardware.h
+++ b/arch/arm/plat-omap/include/mach/hardware.h
@@ -89,7 +89,7 @@
89#define DPLL_CTL (0xfffecf00) 89#define DPLL_CTL (0xfffecf00)
90 90
91/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ 91/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
92#define DSP_CONFIG_REG_BASE (0xe1008000) 92#define DSP_CONFIG_REG_BASE IOMEM(0xe1008000)
93#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) 93#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0)
94#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) 94#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4)
95#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) 95#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8)
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 2a30b7d88cde..dd0cf069431d 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -55,14 +55,13 @@
55 55
56#if defined(CONFIG_ARCH_OMAP1) 56#if defined(CONFIG_ARCH_OMAP1)
57 57
58#define IO_PHYS 0xFFFB0000 58#define IO_PHYS 0xFFFB0000
59#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ 59#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */
60#define IO_SIZE 0x40000 60#define IO_SIZE 0x40000
61#define IO_VIRT (IO_PHYS - IO_OFFSET) 61#define IO_VIRT (IO_PHYS - IO_OFFSET)
62#define IO_ADDRESS(pa) ((pa) - IO_OFFSET) 62#define __IO_ADDRESS(pa) ((pa) - IO_OFFSET)
63#define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) 63#define __OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET)
64#define io_p2v(pa) ((pa) - IO_OFFSET) 64#define io_v2p(va) ((va) + IO_OFFSET)
65#define io_v2p(va) ((va) + IO_OFFSET)
66 65
67#elif defined(CONFIG_ARCH_OMAP2) 66#elif defined(CONFIG_ARCH_OMAP2)
68 67
@@ -90,11 +89,10 @@
90 89
91#endif 90#endif
92 91
93#define IO_OFFSET 0x90000000 92#define IO_OFFSET 0x90000000
94#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 93#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
95#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 94#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */
96#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ 95#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
97#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */
98 96
99/* DSP */ 97/* DSP */
100#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ 98#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */
@@ -149,9 +147,8 @@
149 147
150 148
151#define IO_OFFSET 0x90000000 149#define IO_OFFSET 0x90000000
152#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 150#define __IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
153#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ 151#define __OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
154#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */
155#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ 152#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */
156 153
157/* DSP */ 154/* DSP */
@@ -167,7 +164,14 @@
167 164
168#endif 165#endif
169 166
170#ifndef __ASSEMBLER__ 167#define IO_ADDRESS(pa) IOMEM(__IO_ADDRESS(pa))
168#define OMAP1_IO_ADDRESS(pa) IOMEM(__OMAP1_IO_ADDRESS(pa))
169#define OMAP2_IO_ADDRESS(pa) IOMEM(__OMAP2_IO_ADDRESS(pa))
170
171#ifdef __ASSEMBLER__
172#define IOMEM(x) x
173#else
174#define IOMEM(x) ((void __force __iomem *)(x))
171 175
172/* 176/*
173 * Functions to access the OMAP IO region 177 * Functions to access the OMAP IO region
@@ -178,13 +182,13 @@
178 * - DO NOT use hardcoded virtual addresses to allow changing the 182 * - DO NOT use hardcoded virtual addresses to allow changing the
179 * IO address space again if needed 183 * IO address space again if needed
180 */ 184 */
181#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) 185#define omap_readb(a) __raw_readb(IO_ADDRESS(a))
182#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) 186#define omap_readw(a) __raw_readw(IO_ADDRESS(a))
183#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) 187#define omap_readl(a) __raw_readl(IO_ADDRESS(a))
184 188
185#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) 189#define omap_writeb(v,a) __raw_writeb(v, IO_ADDRESS(a))
186#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) 190#define omap_writew(v,a) __raw_writew(v, IO_ADDRESS(a))
187#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) 191#define omap_writel(v,a) __raw_writel(v, IO_ADDRESS(a))
188 192
189extern void omap1_map_common_io(void); 193extern void omap1_map_common_io(void);
190extern void omap1_init_common_hw(void); 194extern void omap1_init_common_hw(void);
@@ -192,6 +196,12 @@ extern void omap1_init_common_hw(void);
192extern void omap2_map_common_io(void); 196extern void omap2_map_common_io(void);
193extern void omap2_init_common_hw(void); 197extern void omap2_init_common_hw(void);
194 198
199#define __arch_ioremap(p,s,t) omap_ioremap(p,s,t)
200#define __arch_iounmap(v) omap_iounmap(v)
201
202void __iomem *omap_ioremap(unsigned long phys, size_t size, unsigned int type);
203void omap_iounmap(volatile void __iomem *addr);
204
195#endif 205#endif
196 206
197#endif 207#endif
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index 6eb44a92871d..a3074f2fb7ce 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -315,7 +315,7 @@ struct omap_mcbsp_ops {
315}; 315};
316 316
317struct omap_mcbsp_platform_data { 317struct omap_mcbsp_platform_data {
318 u32 virt_base; 318 unsigned long phys_base;
319 u8 dma_rx_sync, dma_tx_sync; 319 u8 dma_rx_sync, dma_tx_sync;
320 u16 rx_irq, tx_irq; 320 u16 rx_irq, tx_irq;
321 struct omap_mcbsp_ops *ops; 321 struct omap_mcbsp_ops *ops;
@@ -324,7 +324,8 @@ struct omap_mcbsp_platform_data {
324 324
325struct omap_mcbsp { 325struct omap_mcbsp {
326 struct device *dev; 326 struct device *dev;
327 u32 io_base; 327 unsigned long phys_base;
328 void __iomem *io_base;
328 u8 id; 329 u8 id;
329 u8 free; 330 u8 free;
330 omap_mcbsp_word_length rx_word_length; 331 omap_mcbsp_word_length rx_word_length;
diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h
index bfa09325a5ff..6063e9681de2 100644
--- a/arch/arm/plat-omap/include/mach/pm.h
+++ b/arch/arm/plat-omap/include/mach/pm.h
@@ -39,11 +39,11 @@
39 * Register and offset definitions to be used in PM assembler code 39 * Register and offset definitions to be used in PM assembler code
40 * ---------------------------------------------------------------------------- 40 * ----------------------------------------------------------------------------
41 */ 41 */
42#define CLKGEN_REG_ASM_BASE io_p2v(0xfffece00) 42#define CLKGEN_REG_ASM_BASE IO_ADDRESS(0xfffece00)
43#define ARM_IDLECT1_ASM_OFFSET 0x04 43#define ARM_IDLECT1_ASM_OFFSET 0x04
44#define ARM_IDLECT2_ASM_OFFSET 0x08 44#define ARM_IDLECT2_ASM_OFFSET 0x08
45 45
46#define TCMIF_ASM_BASE io_p2v(0xfffecc00) 46#define TCMIF_ASM_BASE IO_ADDRESS(0xfffecc00)
47#define EMIFS_CONFIG_ASM_OFFSET 0x0c 47#define EMIFS_CONFIG_ASM_OFFSET 0x0c
48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 48#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20
49 49
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index 787b7acec546..d908eb527c8d 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -63,9 +63,9 @@
63 */ 63 */
64 64
65 65
66#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) 66#define OMAP242X_SMS_REGADDR(reg) IO_ADDRESS(OMAP2420_SMS_BASE + reg)
67#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) 67#define OMAP243X_SMS_REGADDR(reg) IO_ADDRESS(OMAP243X_SMS_BASE + reg)
68#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) 68#define OMAP343X_SMS_REGADDR(reg) IO_ADDRESS(OMAP343X_SMS_BASE + reg)
69 69
70/* SMS register offsets - read/write with sms_{read,write}_reg() */ 70/* SMS register offsets - read/write with sms_{read,write}_reg() */
71 71
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h
index cc6bfa51ccb5..515b89bee966 100644
--- a/arch/arm/plat-omap/include/mach/serial.h
+++ b/arch/arm/plat-omap/include/mach/serial.h
@@ -26,12 +26,12 @@
26#define OMAP1510_BASE_BAUD (12000000/16) 26#define OMAP1510_BASE_BAUD (12000000/16)
27#define OMAP16XX_BASE_BAUD (48000000/16) 27#define OMAP16XX_BASE_BAUD (48000000/16)
28 28
29#define is_omap_port(p) ({int __ret = 0; \ 29#define is_omap_port(pt) ({int __ret = 0; \
30 if (p == IO_ADDRESS(OMAP_UART1_BASE) || \ 30 if ((pt)->port.mapbase == OMAP_UART1_BASE || \
31 p == IO_ADDRESS(OMAP_UART2_BASE) || \ 31 (pt)->port.mapbase == OMAP_UART2_BASE || \
32 p == IO_ADDRESS(OMAP_UART3_BASE)) \ 32 (pt)->port.mapbase == OMAP_UART3_BASE) \
33 __ret = 1; \ 33 __ret = 1; \
34 __ret; \ 34 __ret; \
35 }) 35 })
36 36
37#endif 37#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-01 04:24:49 -0500