1 files changed, 141 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h
new file mode 100644
index 000000000000..a56a610950c2
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/usb.h
@@ -0,0 +1,141 @@
+// include/asm-arm/mach-omap/usb.h
+#ifndef __ASM_ARCH_OMAP_USB_H
+#define __ASM_ARCH_OMAP_USB_H
+#include <mach/board.h>
+/*-------------------------------------------------------------------------*/
+#define OMAP1_OTG_BASE                  0xfffb0400
+#define OMAP1_UDC_BASE                  0xfffb4000
+#define OMAP1_OHCI_BASE                 0xfffba000
+#define OMAP2_OHCI_BASE                 0x4805e000
+#define OMAP2_UDC_BASE                  0x4805e200
+#define OMAP2_OTG_BASE                  0x4805e300
+#ifdef CONFIG_ARCH_OMAP1
+#define OTG_BASE                        OMAP1_OTG_BASE
+#define UDC_BASE                        OMAP1_UDC_BASE
+#define OMAP_OHCI_BASE                  OMAP1_OHCI_BASE
+#else
+#define OTG_BASE                        OMAP2_OTG_BASE
+#define UDC_BASE                        OMAP2_UDC_BASE
+#define OMAP_OHCI_BASE                  OMAP2_OHCI_BASE
+#endif
+/*-------------------------------------------------------------------------*/
+/*
+ * OTG and transceiver registers, for OMAPs starting with ARM926
+ */
+#define OTG_REV                         (OTG_BASE + 0x00)
+#define OTG_SYSCON_1                    (OTG_BASE + 0x04)
+#       define   USB2_TRX_MODE(w)       (((w)>>24)&0x07)
+#       define   USB1_TRX_MODE(w)       (((w)>>20)&0x07)
+#       define   USB0_TRX_MODE(w)       (((w)>>16)&0x07)
+#       define   OTG_IDLE_EN            (1 << 15)
+#       define   HST_IDLE_EN            (1 << 14)
+#       define   DEV_IDLE_EN            (1 << 13)
+#       define   OTG_RESET_DONE         (1 << 2)
+#       define   OTG_SOFT_RESET         (1 << 1)
+#define OTG_SYSCON_2                    (OTG_BASE + 0x08)
+#       define   OTG_EN                 (1 << 31)
+#       define   USBX_SYNCHRO           (1 << 30)
+#       define   OTG_MST16              (1 << 29)
+#       define   SRP_GPDATA             (1 << 28)
+#       define   SRP_GPDVBUS            (1 << 27)
+#       define   SRP_GPUVBUS(w)         (((w)>>24)&0x07)
+#       define   A_WAIT_VRISE(w)        (((w)>>20)&0x07)
+#       define   B_ASE_BRST(w)          (((w)>>16)&0x07)
+#       define   SRP_DPW                (1 << 14)
+#       define   SRP_DATA               (1 << 13)
+#       define   SRP_VBUS               (1 << 12)
+#       define   OTG_PADEN              (1 << 10)
+#       define   HMC_PADEN              (1 << 9)
+#       define   UHOST_EN               (1 << 8)
+#       define   HMC_TLLSPEED           (1 << 7)
+#       define   HMC_TLLATTACH          (1 << 6)
+#       define   OTG_HMC(w)             (((w)>>0)&0x3f)
+#define OTG_CTRL                        (OTG_BASE + 0x0c)
+#       define   OTG_USB2_EN            (1 << 29)
+#       define   OTG_USB2_DP            (1 << 28)
+#       define   OTG_USB2_DM            (1 << 27)
+#       define   OTG_USB1_EN            (1 << 26)
+#       define   OTG_USB1_DP            (1 << 25)
+#       define   OTG_USB1_DM            (1 << 24)
+#       define   OTG_USB0_EN            (1 << 23)
+#       define   OTG_USB0_DP            (1 << 22)
+#       define   OTG_USB0_DM            (1 << 21)
+#       define   OTG_ASESSVLD           (1 << 20)
+#       define   OTG_BSESSEND           (1 << 19)
+#       define   OTG_BSESSVLD           (1 << 18)
+#       define   OTG_VBUSVLD            (1 << 17)
+#       define   OTG_ID                 (1 << 16)
+#       define   OTG_DRIVER_SEL         (1 << 15)
+#       define   OTG_A_SETB_HNPEN       (1 << 12)
+#       define   OTG_A_BUSREQ           (1 << 11)
+#       define   OTG_B_HNPEN            (1 << 9)
+#       define   OTG_B_BUSREQ           (1 << 8)
+#       define   OTG_BUSDROP            (1 << 7)
+#       define   OTG_PULLDOWN           (1 << 5)
+#       define   OTG_PULLUP             (1 << 4)
+#       define   OTG_DRV_VBUS           (1 << 3)
+#       define   OTG_PD_VBUS            (1 << 2)
+#       define   OTG_PU_VBUS            (1 << 1)
+#       define   OTG_PU_ID              (1 << 0)
+#define OTG_IRQ_EN                      (OTG_BASE + 0x10)       /* 16-bit */
+#       define   DRIVER_SWITCH          (1 << 15)
+#       define   A_VBUS_ERR             (1 << 13)
+#       define   A_REQ_TMROUT           (1 << 12)
+#       define   A_SRP_DETECT           (1 << 11)
+#       define   B_HNP_FAIL             (1 << 10)
+#       define   B_SRP_TMROUT           (1 << 9)
+#       define   B_SRP_DONE             (1 << 8)
+#       define   B_SRP_STARTED          (1 << 7)
+#       define   OPRT_CHG               (1 << 0)
+#define OTG_IRQ_SRC                     (OTG_BASE + 0x14)       /* 16-bit */
+        // same bits as in IRQ_EN
+#define OTG_OUTCTRL                     (OTG_BASE + 0x18)       /* 16-bit */
+#       define   OTGVPD                 (1 << 14)
+#       define   OTGVPU                 (1 << 13)
+#       define   OTGPUID                (1 << 12)
+#       define   USB2VDR                (1 << 10)
+#       define   USB2PDEN               (1 << 9)
+#       define   USB2PUEN               (1 << 8)
+#       define   USB1VDR                (1 << 6)
+#       define   USB1PDEN               (1 << 5)
+#       define   USB1PUEN               (1 << 4)
+#       define   USB0VDR                (1 << 2)
+#       define   USB0PDEN               (1 << 1)
+#       define   USB0PUEN               (1 << 0)
+#define OTG_TEST                        (OTG_BASE + 0x20)       /* 16-bit */
+#define OTG_VENDOR_CODE                 (OTG_BASE + 0xfc)       /* 16-bit */
+/*-------------------------------------------------------------------------*/
+/* OMAP1 */
+#define USB_TRANSCEIVER_CTRL            (0xfffe1000 + 0x0064)
+#       define  CONF_USB2_UNI_R         (1 << 8)
+#       define  CONF_USB1_UNI_R         (1 << 7)
+#       define  CONF_USB_PORT0_R(x)     (((x)>>4)&0x7)
+#       define  CONF_USB0_ISOLATE_R     (1 << 3)
+#       define  CONF_USB_PWRDN_DM_R     (1 << 2)
+#       define  CONF_USB_PWRDN_DP_R     (1 << 1)
+/* OMAP2 */
+#       define  USB_UNIDIR                      0x0
+#       define  USB_UNIDIR_TLL                  0x1
+#       define  USB_BIDIR                       0x2
+#       define  USB_BIDIR_TLL                   0x3
+#       define  USBTXWRMODEI(port, x)   ((x) << (22 - (port * 2)))
+#       define  USBT2TLL5PI             (1 << 17)
+#       define  USB0PUENACTLOI          (1 << 16)
+#       define  USBSTANDBYCTRL          (1 << 15)
+#endif  /* __ASM_ARCH_OMAP_USB_H */

diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h new file mode 100644 index 000000000000..a56a610950c2 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/usb.h
@@ -0,0 +1,141 @@
	1	// include/asm-arm/mach-omap/usb.h
	2
	3	#ifndef __ASM_ARCH_OMAP_USB_H
	4	#define __ASM_ARCH_OMAP_USB_H
	5
	6	#include <mach/board.h>
	7
	8	/-------------------------------------------------------------------------/
	9
	10	#define OMAP1_OTG_BASE 0xfffb0400
	11	#define OMAP1_UDC_BASE 0xfffb4000
	12	#define OMAP1_OHCI_BASE 0xfffba000
	13
	14	#define OMAP2_OHCI_BASE 0x4805e000
	15	#define OMAP2_UDC_BASE 0x4805e200
	16	#define OMAP2_OTG_BASE 0x4805e300
	17
	18	#ifdef CONFIG_ARCH_OMAP1
	19
	20	#define OTG_BASE OMAP1_OTG_BASE
	21	#define UDC_BASE OMAP1_UDC_BASE
	22	#define OMAP_OHCI_BASE OMAP1_OHCI_BASE
	23
	24	#else
	25
	26	#define OTG_BASE OMAP2_OTG_BASE
	27	#define UDC_BASE OMAP2_UDC_BASE
	28	#define OMAP_OHCI_BASE OMAP2_OHCI_BASE
	29
	30	#endif
	31
	32	/-------------------------------------------------------------------------/
	33
	34	/*
	35	* OTG and transceiver registers, for OMAPs starting with ARM926
	36	*/
	37	#define OTG_REV (OTG_BASE + 0x00)
	38	#define OTG_SYSCON_1 (OTG_BASE + 0x04)
	39	# define USB2_TRX_MODE(w) (((w)>>24)&0x07)
	40	# define USB1_TRX_MODE(w) (((w)>>20)&0x07)
	41	# define USB0_TRX_MODE(w) (((w)>>16)&0x07)
	42	# define OTG_IDLE_EN (1 << 15)
	43	# define HST_IDLE_EN (1 << 14)
	44	# define DEV_IDLE_EN (1 << 13)
	45	# define OTG_RESET_DONE (1 << 2)
	46	# define OTG_SOFT_RESET (1 << 1)
	47	#define OTG_SYSCON_2 (OTG_BASE + 0x08)
	48	# define OTG_EN (1 << 31)
	49	# define USBX_SYNCHRO (1 << 30)
	50	# define OTG_MST16 (1 << 29)
	51	# define SRP_GPDATA (1 << 28)
	52	# define SRP_GPDVBUS (1 << 27)
	53	# define SRP_GPUVBUS(w) (((w)>>24)&0x07)
	54	# define A_WAIT_VRISE(w) (((w)>>20)&0x07)
	55	# define B_ASE_BRST(w) (((w)>>16)&0x07)
	56	# define SRP_DPW (1 << 14)
	57	# define SRP_DATA (1 << 13)
	58	# define SRP_VBUS (1 << 12)
	59	# define OTG_PADEN (1 << 10)
	60	# define HMC_PADEN (1 << 9)
	61	# define UHOST_EN (1 << 8)
	62	# define HMC_TLLSPEED (1 << 7)
	63	# define HMC_TLLATTACH (1 << 6)
	64	# define OTG_HMC(w) (((w)>>0)&0x3f)
	65	#define OTG_CTRL (OTG_BASE + 0x0c)
	66	# define OTG_USB2_EN (1 << 29)
	67	# define OTG_USB2_DP (1 << 28)
	68	# define OTG_USB2_DM (1 << 27)
	69	# define OTG_USB1_EN (1 << 26)
	70	# define OTG_USB1_DP (1 << 25)
	71	# define OTG_USB1_DM (1 << 24)
	72	# define OTG_USB0_EN (1 << 23)
	73	# define OTG_USB0_DP (1 << 22)
	74	# define OTG_USB0_DM (1 << 21)
	75	# define OTG_ASESSVLD (1 << 20)
	76	# define OTG_BSESSEND (1 << 19)
	77	# define OTG_BSESSVLD (1 << 18)
	78	# define OTG_VBUSVLD (1 << 17)
	79	# define OTG_ID (1 << 16)
	80	# define OTG_DRIVER_SEL (1 << 15)
	81	# define OTG_A_SETB_HNPEN (1 << 12)
	82	# define OTG_A_BUSREQ (1 << 11)
	83	# define OTG_B_HNPEN (1 << 9)
	84	# define OTG_B_BUSREQ (1 << 8)
	85	# define OTG_BUSDROP (1 << 7)
	86	# define OTG_PULLDOWN (1 << 5)
	87	# define OTG_PULLUP (1 << 4)
	88	# define OTG_DRV_VBUS (1 << 3)
	89	# define OTG_PD_VBUS (1 << 2)
	90	# define OTG_PU_VBUS (1 << 1)
	91	# define OTG_PU_ID (1 << 0)
	92	#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
	93	# define DRIVER_SWITCH (1 << 15)
	94	# define A_VBUS_ERR (1 << 13)
	95	# define A_REQ_TMROUT (1 << 12)
	96	# define A_SRP_DETECT (1 << 11)
	97	# define B_HNP_FAIL (1 << 10)
	98	# define B_SRP_TMROUT (1 << 9)
	99	# define B_SRP_DONE (1 << 8)
	100	# define B_SRP_STARTED (1 << 7)
	101	# define OPRT_CHG (1 << 0)
	102	#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
	103	// same bits as in IRQ_EN
	104	#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
	105	# define OTGVPD (1 << 14)
	106	# define OTGVPU (1 << 13)
	107	# define OTGPUID (1 << 12)
	108	# define USB2VDR (1 << 10)
	109	# define USB2PDEN (1 << 9)
	110	# define USB2PUEN (1 << 8)
	111	# define USB1VDR (1 << 6)
	112	# define USB1PDEN (1 << 5)
	113	# define USB1PUEN (1 << 4)
	114	# define USB0VDR (1 << 2)
	115	# define USB0PDEN (1 << 1)
	116	# define USB0PUEN (1 << 0)
	117	#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
	118	#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
	119
	120	/-------------------------------------------------------------------------/
	121
	122	/* OMAP1 */
	123	#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064)
	124	# define CONF_USB2_UNI_R (1 << 8)
	125	# define CONF_USB1_UNI_R (1 << 7)
	126	# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7)
	127	# define CONF_USB0_ISOLATE_R (1 << 3)
	128	# define CONF_USB_PWRDN_DM_R (1 << 2)
	129	# define CONF_USB_PWRDN_DP_R (1 << 1)
	130
	131	/* OMAP2 */
	132	# define USB_UNIDIR 0x0
	133	# define USB_UNIDIR_TLL 0x1
	134	# define USB_BIDIR 0x2
	135	# define USB_BIDIR_TLL 0x3
	136	# define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2)))
	137	# define USBT2TLL5PI (1 << 17)
	138	# define USB0PUENACTLOI (1 << 16)
	139	# define USBSTANDBYCTRL (1 << 15)
	140
	141	#endif /* __ASM_ARCH_OMAP_USB_H */