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-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h44
1 files changed, 30 insertions, 14 deletions
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index 8fdb95e26fcd..6a0d1a0a24a7 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -43,9 +43,15 @@
43 43
44#define OMAP24XX_MCBSP1_BASE 0x48074000 44#define OMAP24XX_MCBSP1_BASE 0x48074000
45#define OMAP24XX_MCBSP2_BASE 0x48076000 45#define OMAP24XX_MCBSP2_BASE 0x48076000
46#define OMAP2430_MCBSP3_BASE 0x4808c000
47#define OMAP2430_MCBSP4_BASE 0x4808e000
48#define OMAP2430_MCBSP5_BASE 0x48096000
46 49
47#define OMAP34XX_MCBSP1_BASE 0x48074000 50#define OMAP34XX_MCBSP1_BASE 0x48074000
48#define OMAP34XX_MCBSP2_BASE 0x49022000 51#define OMAP34XX_MCBSP2_BASE 0x49022000
52#define OMAP34XX_MCBSP3_BASE 0x49024000
53#define OMAP34XX_MCBSP4_BASE 0x49026000
54#define OMAP34XX_MCBSP5_BASE 0x48096000
49 55
50#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) 56#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730)
51 57
@@ -81,9 +87,6 @@
81#define OMAP_MCBSP_REG_XCERG 0x3A 87#define OMAP_MCBSP_REG_XCERG 0x3A
82#define OMAP_MCBSP_REG_XCERH 0x3C 88#define OMAP_MCBSP_REG_XCERH 0x3C
83 89
84#define OMAP_MAX_MCBSP_COUNT 3
85#define MAX_MCBSP_CLOCKS 3
86
87#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) 90#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1)
88#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) 91#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
89 92
@@ -91,12 +94,14 @@
91#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX 94#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX
92#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX 95#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX
93 96
94#elif defined(CONFIG_ARCH_OMAP24XX) 97#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
95 98
96#define OMAP_MCBSP_REG_DRR2 0x00 99#define OMAP_MCBSP_REG_DRR2 0x00
97#define OMAP_MCBSP_REG_DRR1 0x04 100#define OMAP_MCBSP_REG_DRR1 0x04
98#define OMAP_MCBSP_REG_DXR2 0x08 101#define OMAP_MCBSP_REG_DXR2 0x08
99#define OMAP_MCBSP_REG_DXR1 0x0C 102#define OMAP_MCBSP_REG_DXR1 0x0C
103#define OMAP_MCBSP_REG_DRR 0x00
104#define OMAP_MCBSP_REG_DXR 0x08
100#define OMAP_MCBSP_REG_SPCR2 0x10 105#define OMAP_MCBSP_REG_SPCR2 0x10
101#define OMAP_MCBSP_REG_SPCR1 0x14 106#define OMAP_MCBSP_REG_SPCR1 0x14
102#define OMAP_MCBSP_REG_RCR2 0x18 107#define OMAP_MCBSP_REG_RCR2 0x18
@@ -124,9 +129,9 @@
124#define OMAP_MCBSP_REG_RCERH 0x70 129#define OMAP_MCBSP_REG_RCERH 0x70
125#define OMAP_MCBSP_REG_XCERG 0x74 130#define OMAP_MCBSP_REG_XCERG 0x74
126#define OMAP_MCBSP_REG_XCERH 0x78 131#define OMAP_MCBSP_REG_XCERH 0x78
127 132#define OMAP_MCBSP_REG_SYSCON 0x8C
128#define OMAP_MAX_MCBSP_COUNT 2 133#define OMAP_MCBSP_REG_XCCR 0xAC
129#define MAX_MCBSP_CLOCKS 2 134#define OMAP_MCBSP_REG_RCCR 0xB0
130 135
131#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) 136#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1)
132#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) 137#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1)
@@ -137,10 +142,6 @@
137 142
138#endif 143#endif
139 144
140#define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg)
141#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg)
142
143
144/************************** McBSP SPCR1 bit definitions ***********************/ 145/************************** McBSP SPCR1 bit definitions ***********************/
145#define RRST 0x0001 146#define RRST 0x0001
146#define RRDY 0x0002 147#define RRDY 0x0002
@@ -151,6 +152,7 @@
151#define DXENA 0x0080 152#define DXENA 0x0080
152#define CLKSTP(value) ((value)<<11) /* bits 11:12 */ 153#define CLKSTP(value) ((value)<<11) /* bits 11:12 */
153#define RJUST(value) ((value)<<13) /* bits 13:14 */ 154#define RJUST(value) ((value)<<13) /* bits 13:14 */
155#define ALB 0x8000
154#define DLB 0x8000 156#define DLB 0x8000
155 157
156/************************** McBSP SPCR2 bit definitions ***********************/ 158/************************** McBSP SPCR2 bit definitions ***********************/
@@ -228,6 +230,17 @@
228#define XPABLK(value) ((value)<<5) /* Bits 5:6 */ 230#define XPABLK(value) ((value)<<5) /* Bits 5:6 */
229#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ 231#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */
230 232
233/*********************** McBSP XCCR bit definitions *************************/
234#define DILB 0x0020
235#define XDMAEN 0x0008
236#define XDISABLE 0x0001
237
238/********************** McBSP RCCR bit definitions *************************/
239#define RDMAEN 0x0008
240#define RDISABLE 0x0001
241
242/********************** McBSP SYSCONFIG bit definitions ********************/
243#define SOFTRST 0x0002
231 244
232/* we don't do multichannel for now */ 245/* we don't do multichannel for now */
233struct omap_mcbsp_reg_cfg { 246struct omap_mcbsp_reg_cfg {
@@ -260,6 +273,8 @@ typedef enum {
260 OMAP_MCBSP1 = 0, 273 OMAP_MCBSP1 = 0,
261 OMAP_MCBSP2, 274 OMAP_MCBSP2,
262 OMAP_MCBSP3, 275 OMAP_MCBSP3,
276 OMAP_MCBSP4,
277 OMAP_MCBSP5
263} omap_mcbsp_id; 278} omap_mcbsp_id;
264 279
265typedef int __bitwise omap_mcbsp_io_type_t; 280typedef int __bitwise omap_mcbsp_io_type_t;
@@ -311,12 +326,10 @@ struct omap_mcbsp_spi_cfg {
311struct omap_mcbsp_ops { 326struct omap_mcbsp_ops {
312 void (*request)(unsigned int); 327 void (*request)(unsigned int);
313 void (*free)(unsigned int); 328 void (*free)(unsigned int);
314 int (*check)(unsigned int);
315}; 329};
316 330
317struct omap_mcbsp_platform_data { 331struct omap_mcbsp_platform_data {
318 unsigned long phys_base; 332 unsigned long phys_base;
319 u32 virt_base;
320 u8 dma_rx_sync, dma_tx_sync; 333 u8 dma_rx_sync, dma_tx_sync;
321 u16 rx_irq, tx_irq; 334 u16 rx_irq, tx_irq;
322 struct omap_mcbsp_ops *ops; 335 struct omap_mcbsp_ops *ops;
@@ -326,7 +339,7 @@ struct omap_mcbsp_platform_data {
326struct omap_mcbsp { 339struct omap_mcbsp {
327 struct device *dev; 340 struct device *dev;
328 unsigned long phys_base; 341 unsigned long phys_base;
329 u32 io_base; 342 void __iomem *io_base;
330 u8 id; 343 u8 id;
331 u8 free; 344 u8 free;
332 omap_mcbsp_word_length rx_word_length; 345 omap_mcbsp_word_length rx_word_length;
@@ -354,6 +367,8 @@ struct omap_mcbsp {
354 struct omap_mcbsp_platform_data *pdata; 367 struct omap_mcbsp_platform_data *pdata;
355 struct clk *clk; 368 struct clk *clk;
356}; 369};
370extern struct omap_mcbsp **mcbsp_ptr;
371extern int omap_mcbsp_count;
357 372
358int omap_mcbsp_init(void); 373int omap_mcbsp_init(void);
359void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, 374void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
@@ -378,5 +393,6 @@ void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg *
378/* Polled read/write functions */ 393/* Polled read/write functions */
379int omap_mcbsp_pollread(unsigned int id, u16 * buf); 394int omap_mcbsp_pollread(unsigned int id, u16 * buf);
380int omap_mcbsp_pollwrite(unsigned int id, u16 buf); 395int omap_mcbsp_pollwrite(unsigned int id, u16 buf);
396int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type);
381 397
382#endif 398#endif