1 files changed, 0 insertions, 116 deletions
diff --git a/arch/arm/plat-omap/include/mach/aic23.h b/arch/arm/plat-omap/include/mach/aic23.h
deleted file mode 100644
index 5ccedac77526..000000000000
--- a/arch/arm/plat-omap/include/mach/aic23.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/aic23.h
- *
- * Hardware definitions for TI TLV320AIC23 audio codec
- *
- * Copyright (C) 2002 RidgeRun, Inc.
- * Author: Steve Johnson
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
- * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
- * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * You should have received a copy of the  GNU General Public License along
- * with this program; if not, write  to the Free Software Foundation, Inc.,
- * 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-#ifndef __ASM_ARCH_AIC23_H
-#define __ASM_ARCH_AIC23_H
-// Codec TLV320AIC23
-#define LEFT_LINE_VOLUME_ADDR           0x00
-#define RIGHT_LINE_VOLUME_ADDR          0x01
-#define LEFT_CHANNEL_VOLUME_ADDR        0x02
-#define RIGHT_CHANNEL_VOLUME_ADDR       0x03
-#define ANALOG_AUDIO_CONTROL_ADDR       0x04
-#define DIGITAL_AUDIO_CONTROL_ADDR      0x05
-#define POWER_DOWN_CONTROL_ADDR         0x06
-#define DIGITAL_AUDIO_FORMAT_ADDR       0x07
-#define SAMPLE_RATE_CONTROL_ADDR        0x08
-#define DIGITAL_INTERFACE_ACT_ADDR      0x09
-#define RESET_CONTROL_ADDR              0x0F
-// Left (right) line input volume control register
-#define LRS_ENABLED                     0x0100
-#define LIM_MUTED                       0x0080
-#define LIV_DEFAULT                     0x0017
-#define LIV_MAX                         0x001f
-#define LIV_MIN                         0x0000
-// Left (right) channel headphone volume control register
-#define LZC_ON                          0x0080
-#define LHV_DEFAULT                     0x0079
-#define LHV_MAX                         0x007f
-#define LHV_MIN                         0x0000
-// Analog audio path control register
-#define STA_REG(x)                      ((x)<<6)
-#define STE_ENABLED                     0x0020
-#define DAC_SELECTED                    0x0010
-#define BYPASS_ON                       0x0008
-#define INSEL_MIC                       0x0004
-#define MICM_MUTED                      0x0002
-#define MICB_20DB                       0x0001
-// Digital audio path control register
-#define DACM_MUTE                       0x0008
-#define DEEMP_32K                       0x0002
-#define DEEMP_44K                       0x0004
-#define DEEMP_48K                       0x0006
-#define ADCHP_ON                        0x0001
-// Power control down register
-#define DEVICE_POWER_OFF                0x0080
-#define CLK_OFF                         0x0040
-#define OSC_OFF                         0x0020
-#define OUT_OFF                         0x0010
-#define DAC_OFF                         0x0008
-#define ADC_OFF                         0x0004
-#define MIC_OFF                         0x0002
-#define LINE_OFF                        0x0001
-// Digital audio interface register
-#define MS_MASTER                       0x0040
-#define LRSWAP_ON                       0x0020
-#define LRP_ON                          0x0010
-#define IWL_16                          0x0000
-#define IWL_20                          0x0004
-#define IWL_24                          0x0008
-#define IWL_32                          0x000C
-#define FOR_I2S                         0x0002
-#define FOR_DSP                         0x0003
-// Sample rate control register
-#define CLKOUT_HALF                     0x0080
-#define CLKIN_HALF                      0x0040
-#define BOSR_384fs                      0x0002 // BOSR_272fs when in USB mode
-#define USB_CLK_ON                      0x0001
-#define SR_MASK                         0xf
-#define CLKOUT_SHIFT                    7
-#define CLKIN_SHIFT                     6
-#define SR_SHIFT                        2
-#define BOSR_SHIFT                      1
-// Digital interface register
-#define ACT_ON                          0x0001
-#define TLV320AIC23ID1                  (0x1a)  // cs low
-#define TLV320AIC23ID2                  (0x1b)  // cs high
-void aic23_power_up(void);
-void aic23_power_down(void);
-#endif /* __ASM_ARCH_AIC23_H */

diff --git a/arch/arm/plat-omap/include/mach/aic23.h b/arch/arm/plat-omap/include/mach/aic23.h deleted file mode 100644 index 5ccedac77526..000000000000 --- a/arch/arm/plat-omap/include/mach/aic23.h +++ /dev/null
@@ -1,116 +0,0 @@
1	/*
2	* arch/arm/plat-omap/include/mach/aic23.h
3	*
4	* Hardware definitions for TI TLV320AIC23 audio codec
5	*
6	* Copyright (C) 2002 RidgeRun, Inc.
7	* Author: Steve Johnson
8	*
9	* This program is free software; you can redistribute it and/or modify it
10	* under the terms of the GNU General Public License as published by the
11	* Free Software Foundation; either version 2 of the License, or (at your
12	* option) any later version.
13	*
14	* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17	* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20	* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21	* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24	*
25	* You should have received a copy of the GNU General Public License along
26	* with this program; if not, write to the Free Software Foundation, Inc.,
27	* 675 Mass Ave, Cambridge, MA 02139, USA.
28	*/
29
30	#ifndef __ASM_ARCH_AIC23_H
31	#define __ASM_ARCH_AIC23_H
32
33	// Codec TLV320AIC23
34	#define LEFT_LINE_VOLUME_ADDR 0x00
35	#define RIGHT_LINE_VOLUME_ADDR 0x01
36	#define LEFT_CHANNEL_VOLUME_ADDR 0x02
37	#define RIGHT_CHANNEL_VOLUME_ADDR 0x03
38	#define ANALOG_AUDIO_CONTROL_ADDR 0x04
39	#define DIGITAL_AUDIO_CONTROL_ADDR 0x05
40	#define POWER_DOWN_CONTROL_ADDR 0x06
41	#define DIGITAL_AUDIO_FORMAT_ADDR 0x07
42	#define SAMPLE_RATE_CONTROL_ADDR 0x08
43	#define DIGITAL_INTERFACE_ACT_ADDR 0x09
44	#define RESET_CONTROL_ADDR 0x0F
45
46	// Left (right) line input volume control register
47	#define LRS_ENABLED 0x0100
48	#define LIM_MUTED 0x0080
49	#define LIV_DEFAULT 0x0017
50	#define LIV_MAX 0x001f
51	#define LIV_MIN 0x0000
52
53	// Left (right) channel headphone volume control register
54	#define LZC_ON 0x0080
55	#define LHV_DEFAULT 0x0079
56	#define LHV_MAX 0x007f
57	#define LHV_MIN 0x0000
58
59	// Analog audio path control register
60	#define STA_REG(x) ((x)<<6)
61	#define STE_ENABLED 0x0020
62	#define DAC_SELECTED 0x0010
63	#define BYPASS_ON 0x0008
64	#define INSEL_MIC 0x0004
65	#define MICM_MUTED 0x0002
66	#define MICB_20DB 0x0001
67
68	// Digital audio path control register
69	#define DACM_MUTE 0x0008
70	#define DEEMP_32K 0x0002
71	#define DEEMP_44K 0x0004
72	#define DEEMP_48K 0x0006
73	#define ADCHP_ON 0x0001
74
75	// Power control down register
76	#define DEVICE_POWER_OFF 0x0080
77	#define CLK_OFF 0x0040
78	#define OSC_OFF 0x0020
79	#define OUT_OFF 0x0010
80	#define DAC_OFF 0x0008
81	#define ADC_OFF 0x0004
82	#define MIC_OFF 0x0002
83	#define LINE_OFF 0x0001
84
85	// Digital audio interface register
86	#define MS_MASTER 0x0040
87	#define LRSWAP_ON 0x0020
88	#define LRP_ON 0x0010
89	#define IWL_16 0x0000
90	#define IWL_20 0x0004
91	#define IWL_24 0x0008
92	#define IWL_32 0x000C
93	#define FOR_I2S 0x0002
94	#define FOR_DSP 0x0003
95
96	// Sample rate control register
97	#define CLKOUT_HALF 0x0080
98	#define CLKIN_HALF 0x0040
99	#define BOSR_384fs 0x0002 // BOSR_272fs when in USB mode
100	#define USB_CLK_ON 0x0001
101	#define SR_MASK 0xf
102	#define CLKOUT_SHIFT 7
103	#define CLKIN_SHIFT 6
104	#define SR_SHIFT 2
105	#define BOSR_SHIFT 1
106
107	// Digital interface register
108	#define ACT_ON 0x0001
109
110	#define TLV320AIC23ID1 (0x1a) // cs low
111	#define TLV320AIC23ID2 (0x1b) // cs high
112
113	void aic23_power_up(void);
114	void aic23_power_down(void);
115
116	#endif /* __ASM_ARCH_AIC23_H */