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-rw-r--r--arch/arm/plat-omap/i2c.c45
1 files changed, 32 insertions, 13 deletions
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 3341ca4703e9..679cbd49c019 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -108,6 +108,22 @@ static inline int omap1_i2c_add_bus(int bus_id)
108 res[1].start = INT_I2C; 108 res[1].start = INT_I2C;
109 pdata = &i2c_pdata[bus_id - 1]; 109 pdata = &i2c_pdata[bus_id - 1];
110 110
111 /* all OMAP1 have IP version 1 register set */
112 pdata->rev = OMAP_I2C_IP_VERSION_1;
113
114 /* all OMAP1 I2C are implemented like this */
115 pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
116 OMAP_I2C_FLAG_SIMPLE_CLOCK |
117 OMAP_I2C_FLAG_16BIT_DATA_REG |
118 OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
119
120 /* how the cpu bus is wired up differs for 7xx only */
121
122 if (cpu_is_omap7xx())
123 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
124 else
125 pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
126
111 return platform_device_register(pdev); 127 return platform_device_register(pdev);
112} 128}
113 129
@@ -123,21 +139,14 @@ static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
123 omap_pm_set_max_mpu_wakeup_lat(dev, t); 139 omap_pm_set_max_mpu_wakeup_lat(dev, t);
124} 140}
125 141
126static struct omap_device_pm_latency omap_i2c_latency[] = {
127 [0] = {
128 .deactivate_func = omap_device_idle_hwmods,
129 .activate_func = omap_device_enable_hwmods,
130 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
131 },
132};
133
134static inline int omap2_i2c_add_bus(int bus_id) 142static inline int omap2_i2c_add_bus(int bus_id)
135{ 143{
136 int l; 144 int l;
137 struct omap_hwmod *oh; 145 struct omap_hwmod *oh;
138 struct omap_device *od; 146 struct platform_device *pdev;
139 char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN]; 147 char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
140 struct omap_i2c_bus_platform_data *pdata; 148 struct omap_i2c_bus_platform_data *pdata;
149 struct omap_i2c_dev_attr *dev_attr;
141 150
142 omap2_i2c_mux_pins(bus_id); 151 omap2_i2c_mux_pins(bus_id);
143 152
@@ -152,6 +161,16 @@ static inline int omap2_i2c_add_bus(int bus_id)
152 161
153 pdata = &i2c_pdata[bus_id - 1]; 162 pdata = &i2c_pdata[bus_id - 1];
154 /* 163 /*
164 * pass the hwmod class's CPU-specific knowledge of I2C IP revision in
165 * use, and functionality implementation flags, up to the OMAP I2C
166 * driver via platform data
167 */
168 pdata->rev = oh->class->rev;
169
170 dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
171 pdata->flags = dev_attr->flags;
172
173 /*
155 * When waiting for completion of a i2c transfer, we need to 174 * When waiting for completion of a i2c transfer, we need to
156 * set a wake up latency constraint for the MPU. This is to 175 * set a wake up latency constraint for the MPU. This is to
157 * ensure quick enough wakeup from idle, when transfer 176 * ensure quick enough wakeup from idle, when transfer
@@ -160,12 +179,12 @@ static inline int omap2_i2c_add_bus(int bus_id)
160 */ 179 */
161 if (cpu_is_omap34xx()) 180 if (cpu_is_omap34xx())
162 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat; 181 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
163 od = omap_device_build(name, bus_id, oh, pdata, 182 pdev = omap_device_build(name, bus_id, oh, pdata,
164 sizeof(struct omap_i2c_bus_platform_data), 183 sizeof(struct omap_i2c_bus_platform_data),
165 omap_i2c_latency, ARRAY_SIZE(omap_i2c_latency), 0); 184 NULL, 0, 0);
166 WARN(IS_ERR(od), "Could not build omap_device for %s\n", name); 185 WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
167 186
168 return PTR_ERR(od); 187 return PTR_ERR(pdev);
169} 188}
170#else 189#else
171static inline int omap2_i2c_add_bus(int bus_id) 190static inline int omap2_i2c_add_bus(int bus_id)