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-rw-r--r--arch/arm/plat-omap/i2c.c128
1 files changed, 57 insertions, 71 deletions
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a5ce4f0aad35..a4f8003de664 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -27,20 +27,20 @@
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include <linux/i2c-omap.h> 29#include <linux/i2c-omap.h>
30#include <linux/slab.h>
31#include <linux/err.h>
32#include <linux/clk.h>
30 33
31#include <mach/irqs.h> 34#include <mach/irqs.h>
32#include <plat/mux.h> 35#include <plat/mux.h>
33#include <plat/i2c.h> 36#include <plat/i2c.h>
34#include <plat/omap-pm.h> 37#include <plat/omap-pm.h>
38#include <plat/omap_device.h>
35 39
36#define OMAP_I2C_SIZE 0x3f 40#define OMAP_I2C_SIZE 0x3f
37#define OMAP1_I2C_BASE 0xfffb3800 41#define OMAP1_I2C_BASE 0xfffb3800
38#define OMAP2_I2C_BASE1 0x48070000
39#define OMAP2_I2C_BASE2 0x48072000
40#define OMAP2_I2C_BASE3 0x48060000
41#define OMAP4_I2C_BASE4 0x48350000
42 42
43static const char name[] = "i2c_omap"; 43static const char name[] = "omap_i2c";
44 44
45#define I2C_RESOURCE_BUILDER(base, irq) \ 45#define I2C_RESOURCE_BUILDER(base, irq) \
46 { \ 46 { \
@@ -55,15 +55,6 @@ static const char name[] = "i2c_omap";
55 55
56static struct resource i2c_resources[][2] = { 56static struct resource i2c_resources[][2] = {
57 { I2C_RESOURCE_BUILDER(0, 0) }, 57 { I2C_RESOURCE_BUILDER(0, 0) },
58#if defined(CONFIG_ARCH_OMAP2PLUS)
59 { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, 0) },
60#endif
61#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
62 { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, 0) },
63#endif
64#if defined(CONFIG_ARCH_OMAP4)
65 { I2C_RESOURCE_BUILDER(OMAP4_I2C_BASE4, 0) },
66#endif
67}; 58};
68 59
69#define I2C_DEV_BUILDER(bus_id, res, data) \ 60#define I2C_DEV_BUILDER(bus_id, res, data) \
@@ -77,18 +68,11 @@ static struct resource i2c_resources[][2] = {
77 }, \ 68 }, \
78 } 69 }
79 70
80static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)]; 71#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
72#define OMAP_I2C_MAX_CONTROLLERS 4
73static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
81static struct platform_device omap_i2c_devices[] = { 74static struct platform_device omap_i2c_devices[] = {
82 I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]), 75 I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
83#if defined(CONFIG_ARCH_OMAP2PLUS)
84 I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]),
85#endif
86#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
87 I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]),
88#endif
89#if defined(CONFIG_ARCH_OMAP4)
90 I2C_DEV_BUILDER(4, i2c_resources[3], &i2c_pdata[3]),
91#endif
92}; 76};
93 77
94#define OMAP_I2C_CMDLINE_SETUP (BIT(31)) 78#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
@@ -109,35 +93,25 @@ static int __init omap_i2c_nr_ports(void)
109 return ports; 93 return ports;
110} 94}
111 95
112/* Shared between omap2 and 3 */ 96static inline int omap1_i2c_add_bus(int bus_id)
113static resource_size_t omap2_i2c_irq[3] __initdata = {
114 INT_24XX_I2C1_IRQ,
115 INT_24XX_I2C2_IRQ,
116 INT_34XX_I2C3_IRQ,
117};
118
119static resource_size_t omap4_i2c_irq[4] __initdata = {
120 OMAP44XX_IRQ_I2C1,
121 OMAP44XX_IRQ_I2C2,
122 OMAP44XX_IRQ_I2C3,
123 OMAP44XX_IRQ_I2C4,
124};
125
126static inline int omap1_i2c_add_bus(struct platform_device *pdev, int bus_id)
127{ 97{
128 struct omap_i2c_bus_platform_data *pd; 98 struct platform_device *pdev;
99 struct omap_i2c_bus_platform_data *pdata;
129 struct resource *res; 100 struct resource *res;
130 101
131 pd = pdev->dev.platform_data; 102 omap1_i2c_mux_pins(bus_id);
103
104 pdev = &omap_i2c_devices[bus_id - 1];
132 res = pdev->resource; 105 res = pdev->resource;
133 res[0].start = OMAP1_I2C_BASE; 106 res[0].start = OMAP1_I2C_BASE;
134 res[0].end = res[0].start + OMAP_I2C_SIZE; 107 res[0].end = res[0].start + OMAP_I2C_SIZE;
135 res[1].start = INT_I2C; 108 res[1].start = INT_I2C;
136 omap1_i2c_mux_pins(bus_id); 109 pdata = &i2c_pdata[bus_id - 1];
137 110
138 return platform_device_register(pdev); 111 return platform_device_register(pdev);
139} 112}
140 113
114
141/* 115/*
142 * XXX This function is a temporary compatibility wrapper - only 116 * XXX This function is a temporary compatibility wrapper - only
143 * needed until the I2C driver can be converted to call 117 * needed until the I2C driver can be converted to call
@@ -148,52 +122,64 @@ static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
148 omap_pm_set_max_mpu_wakeup_lat(dev, t); 122 omap_pm_set_max_mpu_wakeup_lat(dev, t);
149} 123}
150 124
151static inline int omap2_i2c_add_bus(struct platform_device *pdev, int bus_id) 125static struct omap_device_pm_latency omap_i2c_latency[] = {
152{ 126 [0] = {
153 struct resource *res; 127 .deactivate_func = omap_device_idle_hwmods,
154 resource_size_t *irq; 128 .activate_func = omap_device_enable_hwmods,
129 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
130 },
131};
155 132
156 res = pdev->resource; 133#ifdef CONFIG_ARCH_OMAP2PLUS
134static inline int omap2_i2c_add_bus(int bus_id)
135{
136 int l;
137 struct omap_hwmod *oh;
138 struct omap_device *od;
139 char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
140 struct omap_i2c_bus_platform_data *pdata;
157 141
158 if (!cpu_is_omap44xx()) 142 omap2_i2c_mux_pins(bus_id);
159 irq = omap2_i2c_irq;
160 else
161 irq = omap4_i2c_irq;
162 143
163 if (bus_id == 1) { 144 l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
164 res[0].start = OMAP2_I2C_BASE1; 145 WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
165 res[0].end = res[0].start + OMAP_I2C_SIZE; 146 "String buffer overflow in I2C%d device setup\n", bus_id);
147 oh = omap_hwmod_lookup(oh_name);
148 if (!oh) {
149 pr_err("Could not look up %s\n", oh_name);
150 return -EEXIST;
166 } 151 }
167 152
168 res[1].start = irq[bus_id - 1]; 153 pdata = &i2c_pdata[bus_id - 1];
169 omap2_i2c_mux_pins(bus_id);
170
171 /* 154 /*
172 * When waiting for completion of a i2c transfer, we need to 155 * When waiting for completion of a i2c transfer, we need to
173 * set a wake up latency constraint for the MPU. This is to 156 * set a wake up latency constraint for the MPU. This is to
174 * ensure quick enough wakeup from idle, when transfer 157 * ensure quick enough wakeup from idle, when transfer
175 * completes. 158 * completes.
159 * Only omap3 has support for constraints
176 */ 160 */
177 if (cpu_is_omap34xx()) { 161 if (cpu_is_omap34xx())
178 struct omap_i2c_bus_platform_data *pd; 162 pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
179 163 od = omap_device_build(name, bus_id, oh, pdata,
180 pd = pdev->dev.platform_data; 164 sizeof(struct omap_i2c_bus_platform_data),
181 pd->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat; 165 omap_i2c_latency, ARRAY_SIZE(omap_i2c_latency), 0);
182 } 166 WARN(IS_ERR(od), "Could not build omap_device for %s\n", name);
183 167
184 return platform_device_register(pdev); 168 return PTR_ERR(od);
185} 169}
170#else
171static inline int omap2_i2c_add_bus(int bus_id)
172{
173 return 0;
174}
175#endif
186 176
187static int __init omap_i2c_add_bus(int bus_id) 177static int __init omap_i2c_add_bus(int bus_id)
188{ 178{
189 struct platform_device *pdev;
190
191 pdev = &omap_i2c_devices[bus_id - 1];
192
193 if (cpu_class_is_omap1()) 179 if (cpu_class_is_omap1())
194 return omap1_i2c_add_bus(pdev, bus_id); 180 return omap1_i2c_add_bus(bus_id);
195 else 181 else
196 return omap2_i2c_add_bus(pdev, bus_id); 182 return omap2_i2c_add_bus(bus_id);
197} 183}
198 184
199/** 185/**