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-rw-r--r--arch/arm/plat-omap/i2c.c44
1 files changed, 2 insertions, 42 deletions
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index c08362dbb8ed..33fff4ef382d 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -80,47 +80,8 @@ static struct platform_device omap_i2c_devices[] = {
80#endif 80#endif
81}; 81};
82 82
83#if defined(CONFIG_ARCH_OMAP24XX)
84static const int omap24xx_pins[][2] = {
85 { M19_24XX_I2C1_SCL, L15_24XX_I2C1_SDA },
86 { J15_24XX_I2C2_SCL, H19_24XX_I2C2_SDA },
87};
88#else
89static const int omap24xx_pins[][2] = {};
90#endif
91#if defined(CONFIG_ARCH_OMAP34XX)
92static const int omap34xx_pins[][2] = {
93 { K21_34XX_I2C1_SCL, J21_34XX_I2C1_SDA},
94 { AF15_34XX_I2C2_SCL, AE15_34XX_I2C2_SDA},
95 { AF14_34XX_I2C3_SCL, AG14_34XX_I2C3_SDA},
96};
97#else
98static const int omap34xx_pins[][2] = {};
99#endif
100
101#define OMAP_I2C_CMDLINE_SETUP (BIT(31)) 83#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
102 84
103static void __init omap_i2c_mux_pins(int bus)
104{
105 int scl, sda;
106
107 if (cpu_class_is_omap1()) {
108 scl = I2C_SCL;
109 sda = I2C_SDA;
110 } else if (cpu_is_omap24xx()) {
111 scl = omap24xx_pins[bus][0];
112 sda = omap24xx_pins[bus][1];
113 } else if (cpu_is_omap34xx()) {
114 scl = omap34xx_pins[bus][0];
115 sda = omap34xx_pins[bus][1];
116 } else {
117 return;
118 }
119
120 omap_cfg_reg(sda);
121 omap_cfg_reg(scl);
122}
123
124static int __init omap_i2c_nr_ports(void) 85static int __init omap_i2c_nr_ports(void)
125{ 86{
126 int ports = 0; 87 int ports = 0;
@@ -156,7 +117,6 @@ static int __init omap_i2c_add_bus(int bus_id)
156 res[1].start = irq; 117 res[1].start = irq;
157 } 118 }
158 119
159 omap_i2c_mux_pins(bus_id - 1);
160 return platform_device_register(pdev); 120 return platform_device_register(pdev);
161} 121}
162 122
@@ -209,7 +169,7 @@ out:
209subsys_initcall(omap_register_i2c_bus_cmdline); 169subsys_initcall(omap_register_i2c_bus_cmdline);
210 170
211/** 171/**
212 * omap_register_i2c_bus - register I2C bus with device descriptors 172 * omap_plat_register_i2c_bus - register I2C bus with device descriptors
213 * @bus_id: bus id counting from number 1 173 * @bus_id: bus id counting from number 1
214 * @clkrate: clock rate of the bus in kHz 174 * @clkrate: clock rate of the bus in kHz
215 * @info: pointer into I2C device descriptor table or NULL 175 * @info: pointer into I2C device descriptor table or NULL
@@ -217,7 +177,7 @@ subsys_initcall(omap_register_i2c_bus_cmdline);
217 * 177 *
218 * Returns 0 on success or an error code. 178 * Returns 0 on success or an error code.
219 */ 179 */
220int __init omap_register_i2c_bus(int bus_id, u32 clkrate, 180int __init omap_plat_register_i2c_bus(int bus_id, u32 clkrate,
221 struct i2c_board_info const *info, 181 struct i2c_board_info const *info,
222 unsigned len) 182 unsigned len)
223{ 183{