diff options
Diffstat (limited to 'arch/arm/plat-omap/i2c.c')
-rw-r--r-- | arch/arm/plat-omap/i2c.c | 148 |
1 files changed, 148 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c new file mode 100644 index 000000000000..7990ab185bb1 --- /dev/null +++ b/arch/arm/plat-omap/i2c.c | |||
@@ -0,0 +1,148 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/plat-omap/i2c.c | ||
3 | * | ||
4 | * Helper module for board specific I2C bus registration | ||
5 | * | ||
6 | * Copyright (C) 2007 Nokia Corporation. | ||
7 | * | ||
8 | * Contact: Jarkko Nikula <jarkko.nikula@nokia.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or | ||
11 | * modify it under the terms of the GNU General Public License | ||
12 | * version 2 as published by the Free Software Foundation. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, but | ||
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
17 | * General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
22 | * 02110-1301 USA | ||
23 | * | ||
24 | */ | ||
25 | |||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/i2c.h> | ||
29 | #include <asm/mach-types.h> | ||
30 | #include <asm/arch/mux.h> | ||
31 | |||
32 | #define OMAP_I2C_SIZE 0x3f | ||
33 | #define OMAP1_I2C_BASE 0xfffb3800 | ||
34 | #define OMAP2_I2C_BASE1 0x48070000 | ||
35 | #define OMAP2_I2C_BASE2 0x48072000 | ||
36 | #define OMAP2_I2C_BASE3 0x48060000 | ||
37 | |||
38 | static const char name[] = "i2c_omap"; | ||
39 | |||
40 | #define I2C_RESOURCE_BUILDER(base, irq) \ | ||
41 | { \ | ||
42 | .start = (base), \ | ||
43 | .end = (base) + OMAP_I2C_SIZE, \ | ||
44 | .flags = IORESOURCE_MEM, \ | ||
45 | }, \ | ||
46 | { \ | ||
47 | .start = (irq), \ | ||
48 | .flags = IORESOURCE_IRQ, \ | ||
49 | }, | ||
50 | |||
51 | static struct resource i2c_resources[][2] = { | ||
52 | { I2C_RESOURCE_BUILDER(0, 0) }, | ||
53 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
54 | { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) }, | ||
55 | #endif | ||
56 | #if defined(CONFIG_ARCH_OMAP34XX) | ||
57 | { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) }, | ||
58 | #endif | ||
59 | }; | ||
60 | |||
61 | #define I2C_DEV_BUILDER(bus_id, res, data) \ | ||
62 | { \ | ||
63 | .id = (bus_id), \ | ||
64 | .name = name, \ | ||
65 | .num_resources = ARRAY_SIZE(res), \ | ||
66 | .resource = (res), \ | ||
67 | .dev = { \ | ||
68 | .platform_data = (data), \ | ||
69 | }, \ | ||
70 | } | ||
71 | |||
72 | static u32 i2c_rate[ARRAY_SIZE(i2c_resources)]; | ||
73 | static struct platform_device omap_i2c_devices[] = { | ||
74 | I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]), | ||
75 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | ||
76 | I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]), | ||
77 | #endif | ||
78 | #if defined(CONFIG_ARCH_OMAP34XX) | ||
79 | I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]), | ||
80 | #endif | ||
81 | }; | ||
82 | |||
83 | static void __init omap_i2c_mux_pins(int bus_id) | ||
84 | { | ||
85 | /* TODO: Muxing for OMAP3 */ | ||
86 | switch (bus_id) { | ||
87 | case 1: | ||
88 | if (cpu_class_is_omap1()) { | ||
89 | omap_cfg_reg(I2C_SCL); | ||
90 | omap_cfg_reg(I2C_SDA); | ||
91 | } else if (cpu_is_omap24xx()) { | ||
92 | omap_cfg_reg(M19_24XX_I2C1_SCL); | ||
93 | omap_cfg_reg(L15_24XX_I2C1_SDA); | ||
94 | } | ||
95 | break; | ||
96 | case 2: | ||
97 | if (cpu_is_omap24xx()) { | ||
98 | omap_cfg_reg(J15_24XX_I2C2_SCL); | ||
99 | omap_cfg_reg(H19_24XX_I2C2_SDA); | ||
100 | } | ||
101 | break; | ||
102 | } | ||
103 | } | ||
104 | |||
105 | int __init omap_register_i2c_bus(int bus_id, u32 clkrate, | ||
106 | struct i2c_board_info const *info, | ||
107 | unsigned len) | ||
108 | { | ||
109 | int ports, err; | ||
110 | struct platform_device *pdev; | ||
111 | struct resource *res; | ||
112 | resource_size_t base, irq; | ||
113 | |||
114 | if (cpu_class_is_omap1()) | ||
115 | ports = 1; | ||
116 | else if (cpu_is_omap24xx()) | ||
117 | ports = 2; | ||
118 | else if (cpu_is_omap34xx()) | ||
119 | ports = 3; | ||
120 | |||
121 | BUG_ON(bus_id < 1 || bus_id > ports); | ||
122 | |||
123 | if (info) { | ||
124 | err = i2c_register_board_info(bus_id, info, len); | ||
125 | if (err) | ||
126 | return err; | ||
127 | } | ||
128 | |||
129 | pdev = &omap_i2c_devices[bus_id - 1]; | ||
130 | *(u32 *)pdev->dev.platform_data = clkrate; | ||
131 | |||
132 | if (bus_id == 1) { | ||
133 | res = pdev->resource; | ||
134 | if (cpu_class_is_omap1()) { | ||
135 | base = OMAP1_I2C_BASE; | ||
136 | irq = INT_I2C; | ||
137 | } else { | ||
138 | base = OMAP2_I2C_BASE1; | ||
139 | irq = INT_24XX_I2C1_IRQ; | ||
140 | } | ||
141 | res[0].start = base; | ||
142 | res[0].end = base + OMAP_I2C_SIZE; | ||
143 | res[1].start = irq; | ||
144 | } | ||
145 | |||
146 | omap_i2c_mux_pins(bus_id); | ||
147 | return platform_device_register(pdev); | ||
148 | } | ||