diff options
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 104 |
1 files changed, 49 insertions, 55 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index dc2ac42d6319..393e9219a5b6 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -624,79 +624,58 @@ do { \ | |||
624 | __raw_writel(l, base + reg); \ | 624 | __raw_writel(l, base + reg); \ |
625 | } while(0) | 625 | } while(0) |
626 | 626 | ||
627 | void omap_set_gpio_debounce(int gpio, int enable) | 627 | /** |
628 | * _set_gpio_debounce - low level gpio debounce time | ||
629 | * @bank: the gpio bank we're acting upon | ||
630 | * @gpio: the gpio number on this @gpio | ||
631 | * @debounce: debounce time to use | ||
632 | * | ||
633 | * OMAP's debounce time is in 31us steps so we need | ||
634 | * to convert and round up to the closest unit. | ||
635 | */ | ||
636 | static void _set_gpio_debounce(struct gpio_bank *bank, unsigned gpio, | ||
637 | unsigned debounce) | ||
628 | { | 638 | { |
629 | struct gpio_bank *bank; | 639 | void __iomem *reg = bank->base; |
630 | void __iomem *reg; | 640 | u32 val; |
631 | unsigned long flags; | 641 | u32 l; |
632 | u32 val, l = 1 << get_gpio_index(gpio); | 642 | |
643 | if (debounce < 32) | ||
644 | debounce = 0x01; | ||
645 | else if (debounce > 7936) | ||
646 | debounce = 0xff; | ||
647 | else | ||
648 | debounce = (debounce / 0x1f) - 1; | ||
633 | 649 | ||
634 | if (cpu_class_is_omap1()) | 650 | l = 1 << get_gpio_index(gpio); |
635 | return; | ||
636 | 651 | ||
637 | bank = get_gpio_bank(gpio); | 652 | if (cpu_is_omap44xx()) |
638 | reg = bank->base; | 653 | reg += OMAP4_GPIO_DEBOUNCINGTIME; |
654 | else | ||
655 | reg += OMAP24XX_GPIO_DEBOUNCE_VAL; | ||
656 | |||
657 | __raw_writel(debounce, reg); | ||
639 | 658 | ||
659 | reg = bank->base; | ||
640 | if (cpu_is_omap44xx()) | 660 | if (cpu_is_omap44xx()) |
641 | reg += OMAP4_GPIO_DEBOUNCENABLE; | 661 | reg += OMAP4_GPIO_DEBOUNCENABLE; |
642 | else | 662 | else |
643 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; | 663 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; |
644 | 664 | ||
645 | if (!(bank->mod_usage & l)) { | ||
646 | printk(KERN_ERR "GPIO %d not requested\n", gpio); | ||
647 | return; | ||
648 | } | ||
649 | |||
650 | spin_lock_irqsave(&bank->lock, flags); | ||
651 | val = __raw_readl(reg); | 665 | val = __raw_readl(reg); |
652 | 666 | ||
653 | if (enable && !(val & l)) | 667 | if (debounce) { |
654 | val |= l; | 668 | val |= l; |
655 | else if (!enable && (val & l)) | 669 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) |
656 | val &= ~l; | ||
657 | else | ||
658 | goto done; | ||
659 | |||
660 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
661 | bank->dbck_enable_mask = val; | ||
662 | if (enable) | ||
663 | clk_enable(bank->dbck); | 670 | clk_enable(bank->dbck); |
664 | else | 671 | } else { |
672 | val &= ~l; | ||
673 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) | ||
665 | clk_disable(bank->dbck); | 674 | clk_disable(bank->dbck); |
666 | } | 675 | } |
667 | 676 | ||
668 | __raw_writel(val, reg); | 677 | __raw_writel(val, reg); |
669 | done: | ||
670 | spin_unlock_irqrestore(&bank->lock, flags); | ||
671 | } | 678 | } |
672 | EXPORT_SYMBOL(omap_set_gpio_debounce); | ||
673 | |||
674 | void omap_set_gpio_debounce_time(int gpio, int enc_time) | ||
675 | { | ||
676 | struct gpio_bank *bank; | ||
677 | void __iomem *reg; | ||
678 | |||
679 | if (cpu_class_is_omap1()) | ||
680 | return; | ||
681 | |||
682 | bank = get_gpio_bank(gpio); | ||
683 | reg = bank->base; | ||
684 | |||
685 | if (!bank->mod_usage) { | ||
686 | printk(KERN_ERR "GPIO not requested\n"); | ||
687 | return; | ||
688 | } | ||
689 | |||
690 | enc_time &= 0xff; | ||
691 | |||
692 | if (cpu_is_omap44xx()) | ||
693 | reg += OMAP4_GPIO_DEBOUNCINGTIME; | ||
694 | else | ||
695 | reg += OMAP24XX_GPIO_DEBOUNCE_VAL; | ||
696 | |||
697 | __raw_writel(enc_time, reg); | ||
698 | } | ||
699 | EXPORT_SYMBOL(omap_set_gpio_debounce_time); | ||
700 | 679 | ||
701 | #ifdef CONFIG_ARCH_OMAP2PLUS | 680 | #ifdef CONFIG_ARCH_OMAP2PLUS |
702 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | 681 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, |
@@ -1656,6 +1635,20 @@ static int gpio_output(struct gpio_chip *chip, unsigned offset, int value) | |||
1656 | return 0; | 1635 | return 0; |
1657 | } | 1636 | } |
1658 | 1637 | ||
1638 | static int gpio_debounce(struct gpio_chip *chip, unsigned offset, | ||
1639 | unsigned debounce) | ||
1640 | { | ||
1641 | struct gpio_bank *bank; | ||
1642 | unsigned long flags; | ||
1643 | |||
1644 | bank = container_of(chip, struct gpio_bank, chip); | ||
1645 | spin_lock_irqsave(&bank->lock, flags); | ||
1646 | _set_gpio_debounce(bank, offset, debounce); | ||
1647 | spin_unlock_irqrestore(&bank->lock, flags); | ||
1648 | |||
1649 | return 0; | ||
1650 | } | ||
1651 | |||
1659 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) | 1652 | static void gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
1660 | { | 1653 | { |
1661 | struct gpio_bank *bank; | 1654 | struct gpio_bank *bank; |
@@ -1909,6 +1902,7 @@ static int __init _omap_gpio_init(void) | |||
1909 | bank->chip.direction_input = gpio_input; | 1902 | bank->chip.direction_input = gpio_input; |
1910 | bank->chip.get = gpio_get; | 1903 | bank->chip.get = gpio_get; |
1911 | bank->chip.direction_output = gpio_output; | 1904 | bank->chip.direction_output = gpio_output; |
1905 | bank->chip.set_debounce = gpio_debounce; | ||
1912 | bank->chip.set = gpio_set; | 1906 | bank->chip.set = gpio_set; |
1913 | bank->chip.to_irq = gpio_2irq; | 1907 | bank->chip.to_irq = gpio_2irq; |
1914 | if (bank_is_mpuio(bank)) { | 1908 | if (bank_is_mpuio(bank)) { |