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Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r--arch/arm/plat-omap/gpio.c249
1 files changed, 198 insertions, 51 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 9298bc0ab171..fd21937fe110 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -138,6 +138,32 @@
138#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 138#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
139#define OMAP24XX_GPIO_SETDATAOUT 0x0094 139#define OMAP24XX_GPIO_SETDATAOUT 0x0094
140 140
141#define OMAP4_GPIO_REVISION 0x0000
142#define OMAP4_GPIO_SYSCONFIG 0x0010
143#define OMAP4_GPIO_EOI 0x0020
144#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
145#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
146#define OMAP4_GPIO_IRQSTATUS0 0x002c
147#define OMAP4_GPIO_IRQSTATUS1 0x0030
148#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
149#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
150#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
151#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
152#define OMAP4_GPIO_IRQWAKEN0 0x0044
153#define OMAP4_GPIO_IRQWAKEN1 0x0048
154#define OMAP4_GPIO_SYSSTATUS 0x0104
155#define OMAP4_GPIO_CTRL 0x0130
156#define OMAP4_GPIO_OE 0x0134
157#define OMAP4_GPIO_DATAIN 0x0138
158#define OMAP4_GPIO_DATAOUT 0x013c
159#define OMAP4_GPIO_LEVELDETECT0 0x0140
160#define OMAP4_GPIO_LEVELDETECT1 0x0144
161#define OMAP4_GPIO_RISINGDETECT 0x0148
162#define OMAP4_GPIO_FALLINGDETECT 0x014c
163#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
164#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
165#define OMAP4_GPIO_CLEARDATAOUT 0x0190
166#define OMAP4_GPIO_SETDATAOUT 0x0194
141/* 167/*
142 * omap34xx specific GPIO registers 168 * omap34xx specific GPIO registers
143 */ 169 */
@@ -386,12 +412,16 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
386 reg += OMAP850_GPIO_DIR_CONTROL; 412 reg += OMAP850_GPIO_DIR_CONTROL;
387 break; 413 break;
388#endif 414#endif
389#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 415#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
390 defined(CONFIG_ARCH_OMAP4)
391 case METHOD_GPIO_24XX: 416 case METHOD_GPIO_24XX:
392 reg += OMAP24XX_GPIO_OE; 417 reg += OMAP24XX_GPIO_OE;
393 break; 418 break;
394#endif 419#endif
420#if defined(CONFIG_ARCH_OMAP4)
421 case METHOD_GPIO_24XX:
422 reg += OMAP4_GPIO_OE;
423 break;
424#endif
395 default: 425 default:
396 WARN_ON(1); 426 WARN_ON(1);
397 return; 427 return;
@@ -459,8 +489,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
459 l &= ~(1 << gpio); 489 l &= ~(1 << gpio);
460 break; 490 break;
461#endif 491#endif
462#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 492#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
463 defined(CONFIG_ARCH_OMAP4)
464 case METHOD_GPIO_24XX: 493 case METHOD_GPIO_24XX:
465 if (enable) 494 if (enable)
466 reg += OMAP24XX_GPIO_SETDATAOUT; 495 reg += OMAP24XX_GPIO_SETDATAOUT;
@@ -469,6 +498,15 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
469 l = 1 << gpio; 498 l = 1 << gpio;
470 break; 499 break;
471#endif 500#endif
501#ifdef CONFIG_ARCH_OMAP4
502 case METHOD_GPIO_24XX:
503 if (enable)
504 reg += OMAP4_GPIO_SETDATAOUT;
505 else
506 reg += OMAP4_GPIO_CLEARDATAOUT;
507 l = 1 << gpio;
508 break;
509#endif
472 default: 510 default:
473 WARN_ON(1); 511 WARN_ON(1);
474 return; 512 return;
@@ -509,12 +547,16 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio)
509 reg += OMAP850_GPIO_DATA_INPUT; 547 reg += OMAP850_GPIO_DATA_INPUT;
510 break; 548 break;
511#endif 549#endif
512#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 550#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
513 defined(CONFIG_ARCH_OMAP4)
514 case METHOD_GPIO_24XX: 551 case METHOD_GPIO_24XX:
515 reg += OMAP24XX_GPIO_DATAIN; 552 reg += OMAP24XX_GPIO_DATAIN;
516 break; 553 break;
517#endif 554#endif
555#ifdef CONFIG_ARCH_OMAP4
556 case METHOD_GPIO_24XX:
557 reg += OMAP4_GPIO_DATAIN;
558 break;
559#endif
518 default: 560 default:
519 return -EINVAL; 561 return -EINVAL;
520 } 562 }
@@ -589,7 +631,11 @@ void omap_set_gpio_debounce(int gpio, int enable)
589 631
590 bank = get_gpio_bank(gpio); 632 bank = get_gpio_bank(gpio);
591 reg = bank->base; 633 reg = bank->base;
634#ifdef CONFIG_ARCH_OMAP4
635 reg += OMAP4_GPIO_DEBOUNCENABLE;
636#else
592 reg += OMAP24XX_GPIO_DEBOUNCE_EN; 637 reg += OMAP24XX_GPIO_DEBOUNCE_EN;
638#endif
593 639
594 spin_lock_irqsave(&bank->lock, flags); 640 spin_lock_irqsave(&bank->lock, flags);
595 val = __raw_readl(reg); 641 val = __raw_readl(reg);
@@ -626,7 +672,11 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
626 reg = bank->base; 672 reg = bank->base;
627 673
628 enc_time &= 0xff; 674 enc_time &= 0xff;
675#ifdef CONFIG_ARCH_OMAP4
676 reg += OMAP4_GPIO_DEBOUNCINGTIME;
677#else
629 reg += OMAP24XX_GPIO_DEBOUNCE_VAL; 678 reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
679#endif
630 __raw_writel(enc_time, reg); 680 __raw_writel(enc_time, reg);
631} 681}
632EXPORT_SYMBOL(omap_set_gpio_debounce_time); 682EXPORT_SYMBOL(omap_set_gpio_debounce_time);
@@ -638,23 +688,46 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
638{ 688{
639 void __iomem *base = bank->base; 689 void __iomem *base = bank->base;
640 u32 gpio_bit = 1 << gpio; 690 u32 gpio_bit = 1 << gpio;
691 u32 val;
641 692
642 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit, 693 if (cpu_is_omap44xx()) {
643 trigger & IRQ_TYPE_LEVEL_LOW); 694 MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
644 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit, 695 trigger & IRQ_TYPE_LEVEL_LOW);
645 trigger & IRQ_TYPE_LEVEL_HIGH); 696 MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
646 MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit, 697 trigger & IRQ_TYPE_LEVEL_HIGH);
647 trigger & IRQ_TYPE_EDGE_RISING); 698 MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
648 MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, 699 trigger & IRQ_TYPE_EDGE_RISING);
649 trigger & IRQ_TYPE_EDGE_FALLING); 700 MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
650 701 trigger & IRQ_TYPE_EDGE_FALLING);
702 } else {
703 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
704 trigger & IRQ_TYPE_LEVEL_LOW);
705 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
706 trigger & IRQ_TYPE_LEVEL_HIGH);
707 MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
708 trigger & IRQ_TYPE_EDGE_RISING);
709 MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
710 trigger & IRQ_TYPE_EDGE_FALLING);
711 }
651 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { 712 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
652 if (trigger != 0) 713 if (cpu_is_omap44xx()) {
653 __raw_writel(1 << gpio, bank->base 714 if (trigger != 0)
715 __raw_writel(1 << gpio, bank->base+
716 OMAP4_GPIO_IRQWAKEN0);
717 else {
718 val = __raw_readl(bank->base +
719 OMAP4_GPIO_IRQWAKEN0);
720 __raw_writel(val & (~(1 << gpio)), bank->base +
721 OMAP4_GPIO_IRQWAKEN0);
722 }
723 } else {
724 if (trigger != 0)
725 __raw_writel(1 << gpio, bank->base
654 + OMAP24XX_GPIO_SETWKUENA); 726 + OMAP24XX_GPIO_SETWKUENA);
655 else 727 else
656 __raw_writel(1 << gpio, bank->base 728 __raw_writel(1 << gpio, bank->base
657 + OMAP24XX_GPIO_CLEARWKUENA); 729 + OMAP24XX_GPIO_CLEARWKUENA);
730 }
658 } else { 731 } else {
659 if (trigger != 0) 732 if (trigger != 0)
660 bank->enabled_non_wakeup_gpios |= gpio_bit; 733 bank->enabled_non_wakeup_gpios |= gpio_bit;
@@ -662,9 +735,15 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
662 bank->enabled_non_wakeup_gpios &= ~gpio_bit; 735 bank->enabled_non_wakeup_gpios &= ~gpio_bit;
663 } 736 }
664 737
665 bank->level_mask = 738 if (cpu_is_omap44xx()) {
666 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) | 739 bank->level_mask =
667 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); 740 __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
741 __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
742 } else {
743 bank->level_mask =
744 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
745 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
746 }
668} 747}
669#endif 748#endif
670 749
@@ -828,12 +907,16 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
828 reg += OMAP850_GPIO_INT_STATUS; 907 reg += OMAP850_GPIO_INT_STATUS;
829 break; 908 break;
830#endif 909#endif
831#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 910#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
832 defined(CONFIG_ARCH_OMAP4)
833 case METHOD_GPIO_24XX: 911 case METHOD_GPIO_24XX:
834 reg += OMAP24XX_GPIO_IRQSTATUS1; 912 reg += OMAP24XX_GPIO_IRQSTATUS1;
835 break; 913 break;
836#endif 914#endif
915#if defined(CONFIG_ARCH_OMAP4)
916 case METHOD_GPIO_24XX:
917 reg += OMAP4_GPIO_IRQSTATUS0;
918 break;
919#endif
837 default: 920 default:
838 WARN_ON(1); 921 WARN_ON(1);
839 return; 922 return;
@@ -843,12 +926,16 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
843 /* Workaround for clearing DSP GPIO interrupts to allow retention */ 926 /* Workaround for clearing DSP GPIO interrupts to allow retention */
844#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 927#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
845 reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; 928 reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
846 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 929#endif
930#if defined(CONFIG_ARCH_OMAP4)
931 reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
932#endif
933 if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
847 __raw_writel(gpio_mask, reg); 934 __raw_writel(gpio_mask, reg);
848 935
849 /* Flush posted write for the irq status to avoid spurious interrupts */ 936 /* Flush posted write for the irq status to avoid spurious interrupts */
850 __raw_readl(reg); 937 __raw_readl(reg);
851#endif 938 }
852} 939}
853 940
854static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) 941static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
@@ -898,13 +985,18 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
898 inv = 1; 985 inv = 1;
899 break; 986 break;
900#endif 987#endif
901#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 988#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
902 defined(CONFIG_ARCH_OMAP4)
903 case METHOD_GPIO_24XX: 989 case METHOD_GPIO_24XX:
904 reg += OMAP24XX_GPIO_IRQENABLE1; 990 reg += OMAP24XX_GPIO_IRQENABLE1;
905 mask = 0xffffffff; 991 mask = 0xffffffff;
906 break; 992 break;
907#endif 993#endif
994#if defined(CONFIG_ARCH_OMAP4)
995 case METHOD_GPIO_24XX:
996 reg += OMAP4_GPIO_IRQSTATUSSET0;
997 mask = 0xffffffff;
998 break;
999#endif
908 default: 1000 default:
909 WARN_ON(1); 1001 WARN_ON(1);
910 return 0; 1002 return 0;
@@ -972,8 +1064,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
972 l |= gpio_mask; 1064 l |= gpio_mask;
973 break; 1065 break;
974#endif 1066#endif
975#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1067#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
976 defined(CONFIG_ARCH_OMAP4)
977 case METHOD_GPIO_24XX: 1068 case METHOD_GPIO_24XX:
978 if (enable) 1069 if (enable)
979 reg += OMAP24XX_GPIO_SETIRQENABLE1; 1070 reg += OMAP24XX_GPIO_SETIRQENABLE1;
@@ -982,6 +1073,15 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
982 l = gpio_mask; 1073 l = gpio_mask;
983 break; 1074 break;
984#endif 1075#endif
1076#ifdef CONFIG_ARCH_OMAP4
1077 case METHOD_GPIO_24XX:
1078 if (enable)
1079 reg += OMAP4_GPIO_IRQSTATUSSET0;
1080 else
1081 reg += OMAP4_GPIO_IRQSTATUSCLR0;
1082 l = gpio_mask;
1083 break;
1084#endif
985 default: 1085 default:
986 WARN_ON(1); 1086 WARN_ON(1);
987 return; 1087 return;
@@ -1157,11 +1257,14 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1157 if (bank->method == METHOD_GPIO_850) 1257 if (bank->method == METHOD_GPIO_850)
1158 isr_reg = bank->base + OMAP850_GPIO_INT_STATUS; 1258 isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
1159#endif 1259#endif
1160#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1260#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1161 defined(CONFIG_ARCH_OMAP4)
1162 if (bank->method == METHOD_GPIO_24XX) 1261 if (bank->method == METHOD_GPIO_24XX)
1163 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; 1262 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
1164#endif 1263#endif
1264#if defined(CONFIG_ARCH_OMAP4)
1265 if (bank->method == METHOD_GPIO_24XX)
1266 isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0;
1267#endif
1165 while(1) { 1268 while(1) {
1166 u32 isr_saved, level_mask = 0; 1269 u32 isr_saved, level_mask = 0;
1167 u32 enabled; 1270 u32 enabled;
@@ -1638,7 +1741,7 @@ static int __init _omap_gpio_init(void)
1638 1741
1639 gpio_bank_count = OMAP34XX_NR_GPIOS; 1742 gpio_bank_count = OMAP34XX_NR_GPIOS;
1640 gpio_bank = gpio_bank_44xx; 1743 gpio_bank = gpio_bank_44xx;
1641 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); 1744 rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
1642 printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n", 1745 printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n",
1643 (rev >> 4) & 0x0f, rev & 0x0f); 1746 (rev >> 4) & 0x0f, rev & 0x0f);
1644 } 1747 }
@@ -1672,7 +1775,16 @@ static int __init _omap_gpio_init(void)
1672 static const u32 non_wakeup_gpios[] = { 1775 static const u32 non_wakeup_gpios[] = {
1673 0xe203ffc0, 0x08700040 1776 0xe203ffc0, 0x08700040
1674 }; 1777 };
1675 1778 if (cpu_is_omap44xx()) {
1779 __raw_writel(0xffffffff, bank->base +
1780 OMAP4_GPIO_IRQSTATUSCLR0);
1781 __raw_writew(0x0015, bank->base +
1782 OMAP4_GPIO_SYSCONFIG);
1783 __raw_writel(0x00000000, bank->base +
1784 OMAP4_GPIO_DEBOUNCENABLE);
1785 /* Initialize interface clock ungated, module enabled */
1786 __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
1787 } else {
1676 __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1); 1788 __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1);
1677 __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1); 1789 __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1);
1678 __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG); 1790 __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG);
@@ -1680,12 +1792,12 @@ static int __init _omap_gpio_init(void)
1680 1792
1681 /* Initialize interface clock ungated, module enabled */ 1793 /* Initialize interface clock ungated, module enabled */
1682 __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL); 1794 __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
1795 }
1683 if (i < ARRAY_SIZE(non_wakeup_gpios)) 1796 if (i < ARRAY_SIZE(non_wakeup_gpios))
1684 bank->non_wakeup_gpios = non_wakeup_gpios[i]; 1797 bank->non_wakeup_gpios = non_wakeup_gpios[i];
1685 gpio_count = 32; 1798 gpio_count = 32;
1686 } 1799 }
1687#endif 1800#endif
1688
1689 /* REVISIT eventually switch from OMAP-specific gpio structs 1801 /* REVISIT eventually switch from OMAP-specific gpio structs
1690 * over to the generic ones 1802 * over to the generic ones
1691 */ 1803 */
@@ -1771,14 +1883,20 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
1771 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; 1883 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1772 break; 1884 break;
1773#endif 1885#endif
1774#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1886#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1775 defined(CONFIG_ARCH_OMAP4)
1776 case METHOD_GPIO_24XX: 1887 case METHOD_GPIO_24XX:
1777 wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; 1888 wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
1778 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1889 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1779 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; 1890 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
1780 break; 1891 break;
1781#endif 1892#endif
1893#ifdef CONFIG_ARCH_OMAP4
1894 case METHOD_GPIO_24XX:
1895 wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
1896 wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
1897 wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
1898 break;
1899#endif
1782 default: 1900 default:
1783 continue; 1901 continue;
1784 } 1902 }
@@ -1813,13 +1931,18 @@ static int omap_gpio_resume(struct sys_device *dev)
1813 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; 1931 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1814 break; 1932 break;
1815#endif 1933#endif
1816#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1934#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1817 defined(CONFIG_ARCH_OMAP4)
1818 case METHOD_GPIO_24XX: 1935 case METHOD_GPIO_24XX:
1819 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1936 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1820 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; 1937 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
1821 break; 1938 break;
1822#endif 1939#endif
1940#ifdef CONFIG_ARCH_OMAP4
1941 case METHOD_GPIO_24XX:
1942 wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
1943 wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
1944 break;
1945#endif
1823 default: 1946 default:
1824 continue; 1947 continue;
1825 } 1948 }
@@ -1863,21 +1986,29 @@ void omap2_gpio_prepare_for_retention(void)
1863 1986
1864 if (!(bank->enabled_non_wakeup_gpios)) 1987 if (!(bank->enabled_non_wakeup_gpios))
1865 continue; 1988 continue;
1866#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1989#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1867 defined(CONFIG_ARCH_OMAP4)
1868 bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); 1990 bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
1869 l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); 1991 l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1870 l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); 1992 l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
1871#endif 1993#endif
1994#ifdef CONFIG_ARCH_OMAP4
1995 bank->saved_datain = __raw_readl(bank->base +
1996 OMAP4_GPIO_DATAIN);
1997 l1 = __raw_readl(bank->base + OMAP4_GPIO_FALLINGDETECT);
1998 l2 = __raw_readl(bank->base + OMAP4_GPIO_RISINGDETECT);
1999#endif
1872 bank->saved_fallingdetect = l1; 2000 bank->saved_fallingdetect = l1;
1873 bank->saved_risingdetect = l2; 2001 bank->saved_risingdetect = l2;
1874 l1 &= ~bank->enabled_non_wakeup_gpios; 2002 l1 &= ~bank->enabled_non_wakeup_gpios;
1875 l2 &= ~bank->enabled_non_wakeup_gpios; 2003 l2 &= ~bank->enabled_non_wakeup_gpios;
1876#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 2004#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1877 defined(CONFIG_ARCH_OMAP4)
1878 __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); 2005 __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1879 __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); 2006 __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
1880#endif 2007#endif
2008#ifdef CONFIG_ARCH_OMAP4
2009 __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
2010 __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
2011#endif
1881 c++; 2012 c++;
1882 } 2013 }
1883 if (!c) { 2014 if (!c) {
@@ -1899,27 +2030,29 @@ void omap2_gpio_resume_after_retention(void)
1899 2030
1900 if (!(bank->enabled_non_wakeup_gpios)) 2031 if (!(bank->enabled_non_wakeup_gpios))
1901 continue; 2032 continue;
1902#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 2033#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1903 defined(CONFIG_ARCH_OMAP4)
1904 __raw_writel(bank->saved_fallingdetect, 2034 __raw_writel(bank->saved_fallingdetect,
1905 bank->base + OMAP24XX_GPIO_FALLINGDETECT); 2035 bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1906 __raw_writel(bank->saved_risingdetect, 2036 __raw_writel(bank->saved_risingdetect,
1907 bank->base + OMAP24XX_GPIO_RISINGDETECT); 2037 bank->base + OMAP24XX_GPIO_RISINGDETECT);
2038 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
2039#endif
2040#ifdef CONFIG_ARCH_OMAP4
2041 __raw_writel(bank->saved_fallingdetect,
2042 bank->base + OMAP4_GPIO_FALLINGDETECT);
2043 __raw_writel(bank->saved_risingdetect,
2044 bank->base + OMAP4_GPIO_RISINGDETECT);
2045 l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
1908#endif 2046#endif
1909 /* Check if any of the non-wakeup interrupt GPIOs have changed 2047 /* Check if any of the non-wakeup interrupt GPIOs have changed
1910 * state. If so, generate an IRQ by software. This is 2048 * state. If so, generate an IRQ by software. This is
1911 * horribly racy, but it's the best we can do to work around 2049 * horribly racy, but it's the best we can do to work around
1912 * this silicon bug. */ 2050 * this silicon bug. */
1913#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1914 defined(CONFIG_ARCH_OMAP4)
1915 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
1916#endif
1917 l ^= bank->saved_datain; 2051 l ^= bank->saved_datain;
1918 l &= bank->non_wakeup_gpios; 2052 l &= bank->non_wakeup_gpios;
1919 if (l) { 2053 if (l) {
1920 u32 old0, old1; 2054 u32 old0, old1;
1921#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 2055#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1922 defined(CONFIG_ARCH_OMAP4)
1923 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); 2056 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1924 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); 2057 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
1925 __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); 2058 __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
@@ -1927,6 +2060,20 @@ void omap2_gpio_resume_after_retention(void)
1927 __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); 2060 __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1928 __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); 2061 __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
1929#endif 2062#endif
2063#ifdef CONFIG_ARCH_OMAP4
2064 old0 = __raw_readl(bank->base +
2065 OMAP4_GPIO_LEVELDETECT0);
2066 old1 = __raw_readl(bank->base +
2067 OMAP4_GPIO_LEVELDETECT1);
2068 __raw_writel(old0 | l, bank->base +
2069 OMAP4_GPIO_LEVELDETECT0);
2070 __raw_writel(old1 | l, bank->base +
2071 OMAP4_GPIO_LEVELDETECT1);
2072 __raw_writel(old0, bank->base +
2073 OMAP4_GPIO_LEVELDETECT0);
2074 __raw_writel(old1, bank->base +
2075 OMAP4_GPIO_LEVELDETECT1);
2076#endif
1930 } 2077 }
1931 } 2078 }
1932 2079
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-11 11:09:48 -0400