diff options
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 302 |
1 files changed, 166 insertions, 136 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index d2422c766cca..337199ed3479 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -177,13 +177,11 @@ struct gpio_bank { | |||
177 | u16 irq; | 177 | u16 irq; |
178 | u16 virtual_irq_start; | 178 | u16 virtual_irq_start; |
179 | int method; | 179 | int method; |
180 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ | 180 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS) |
181 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) | ||
182 | u32 suspend_wakeup; | 181 | u32 suspend_wakeup; |
183 | u32 saved_wakeup; | 182 | u32 saved_wakeup; |
184 | #endif | 183 | #endif |
185 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 184 | #ifdef CONFIG_ARCH_OMAP2PLUS |
186 | defined(CONFIG_ARCH_OMAP4) | ||
187 | u32 non_wakeup_gpios; | 185 | u32 non_wakeup_gpios; |
188 | u32 enabled_non_wakeup_gpios; | 186 | u32 enabled_non_wakeup_gpios; |
189 | 187 | ||
@@ -204,6 +202,7 @@ struct gpio_bank { | |||
204 | #define METHOD_GPIO_1610 2 | 202 | #define METHOD_GPIO_1610 2 |
205 | #define METHOD_GPIO_7XX 3 | 203 | #define METHOD_GPIO_7XX 3 |
206 | #define METHOD_GPIO_24XX 5 | 204 | #define METHOD_GPIO_24XX 5 |
205 | #define METHOD_GPIO_44XX 6 | ||
207 | 206 | ||
208 | #ifdef CONFIG_ARCH_OMAP16XX | 207 | #ifdef CONFIG_ARCH_OMAP16XX |
209 | static struct gpio_bank gpio_bank_1610[5] = { | 208 | static struct gpio_bank gpio_bank_1610[5] = { |
@@ -248,7 +247,7 @@ static struct gpio_bank gpio_bank_7xx[7] = { | |||
248 | }; | 247 | }; |
249 | #endif | 248 | #endif |
250 | 249 | ||
251 | #ifdef CONFIG_ARCH_OMAP24XX | 250 | #ifdef CONFIG_ARCH_OMAP2 |
252 | 251 | ||
253 | static struct gpio_bank gpio_bank_242x[4] = { | 252 | static struct gpio_bank gpio_bank_242x[4] = { |
254 | { OMAP242X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, | 253 | { OMAP242X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, |
@@ -276,7 +275,7 @@ static struct gpio_bank gpio_bank_243x[5] = { | |||
276 | 275 | ||
277 | #endif | 276 | #endif |
278 | 277 | ||
279 | #ifdef CONFIG_ARCH_OMAP34XX | 278 | #ifdef CONFIG_ARCH_OMAP3 |
280 | static struct gpio_bank gpio_bank_34xx[6] = { | 279 | static struct gpio_bank gpio_bank_34xx[6] = { |
281 | { OMAP34XX_GPIO1_BASE, NULL, INT_34XX_GPIO_BANK1, IH_GPIO_BASE, | 280 | { OMAP34XX_GPIO1_BASE, NULL, INT_34XX_GPIO_BANK1, IH_GPIO_BASE, |
282 | METHOD_GPIO_24XX }, | 281 | METHOD_GPIO_24XX }, |
@@ -313,18 +312,18 @@ static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS]; | |||
313 | 312 | ||
314 | #ifdef CONFIG_ARCH_OMAP4 | 313 | #ifdef CONFIG_ARCH_OMAP4 |
315 | static struct gpio_bank gpio_bank_44xx[6] = { | 314 | static struct gpio_bank gpio_bank_44xx[6] = { |
316 | { OMAP44XX_GPIO1_BASE, NULL, INT_44XX_GPIO_BANK1, IH_GPIO_BASE, | 315 | { OMAP44XX_GPIO1_BASE, NULL, OMAP44XX_IRQ_GPIO1, IH_GPIO_BASE, |
317 | METHOD_GPIO_24XX }, | 316 | METHOD_GPIO_44XX }, |
318 | { OMAP44XX_GPIO2_BASE, NULL, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32, | 317 | { OMAP44XX_GPIO2_BASE, NULL, OMAP44XX_IRQ_GPIO2, IH_GPIO_BASE + 32, |
319 | METHOD_GPIO_24XX }, | 318 | METHOD_GPIO_44XX }, |
320 | { OMAP44XX_GPIO3_BASE, NULL, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64, | 319 | { OMAP44XX_GPIO3_BASE, NULL, OMAP44XX_IRQ_GPIO3, IH_GPIO_BASE + 64, |
321 | METHOD_GPIO_24XX }, | 320 | METHOD_GPIO_44XX }, |
322 | { OMAP44XX_GPIO4_BASE, NULL, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96, | 321 | { OMAP44XX_GPIO4_BASE, NULL, OMAP44XX_IRQ_GPIO4, IH_GPIO_BASE + 96, |
323 | METHOD_GPIO_24XX }, | 322 | METHOD_GPIO_44XX }, |
324 | { OMAP44XX_GPIO5_BASE, NULL, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128, | 323 | { OMAP44XX_GPIO5_BASE, NULL, OMAP44XX_IRQ_GPIO5, IH_GPIO_BASE + 128, |
325 | METHOD_GPIO_24XX }, | 324 | METHOD_GPIO_44XX }, |
326 | { OMAP44XX_GPIO6_BASE, NULL, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160, | 325 | { OMAP44XX_GPIO6_BASE, NULL, OMAP44XX_IRQ_GPIO6, IH_GPIO_BASE + 160, |
327 | METHOD_GPIO_24XX }, | 326 | METHOD_GPIO_44XX }, |
328 | }; | 327 | }; |
329 | 328 | ||
330 | #endif | 329 | #endif |
@@ -426,13 +425,13 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | |||
426 | reg += OMAP7XX_GPIO_DIR_CONTROL; | 425 | reg += OMAP7XX_GPIO_DIR_CONTROL; |
427 | break; | 426 | break; |
428 | #endif | 427 | #endif |
429 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 428 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
430 | case METHOD_GPIO_24XX: | 429 | case METHOD_GPIO_24XX: |
431 | reg += OMAP24XX_GPIO_OE; | 430 | reg += OMAP24XX_GPIO_OE; |
432 | break; | 431 | break; |
433 | #endif | 432 | #endif |
434 | #if defined(CONFIG_ARCH_OMAP4) | 433 | #if defined(CONFIG_ARCH_OMAP4) |
435 | case METHOD_GPIO_24XX: | 434 | case METHOD_GPIO_44XX: |
436 | reg += OMAP4_GPIO_OE; | 435 | reg += OMAP4_GPIO_OE; |
437 | break; | 436 | break; |
438 | #endif | 437 | #endif |
@@ -493,7 +492,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
493 | l &= ~(1 << gpio); | 492 | l &= ~(1 << gpio); |
494 | break; | 493 | break; |
495 | #endif | 494 | #endif |
496 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 495 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
497 | case METHOD_GPIO_24XX: | 496 | case METHOD_GPIO_24XX: |
498 | if (enable) | 497 | if (enable) |
499 | reg += OMAP24XX_GPIO_SETDATAOUT; | 498 | reg += OMAP24XX_GPIO_SETDATAOUT; |
@@ -503,7 +502,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
503 | break; | 502 | break; |
504 | #endif | 503 | #endif |
505 | #ifdef CONFIG_ARCH_OMAP4 | 504 | #ifdef CONFIG_ARCH_OMAP4 |
506 | case METHOD_GPIO_24XX: | 505 | case METHOD_GPIO_44XX: |
507 | if (enable) | 506 | if (enable) |
508 | reg += OMAP4_GPIO_SETDATAOUT; | 507 | reg += OMAP4_GPIO_SETDATAOUT; |
509 | else | 508 | else |
@@ -546,13 +545,13 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio) | |||
546 | reg += OMAP7XX_GPIO_DATA_INPUT; | 545 | reg += OMAP7XX_GPIO_DATA_INPUT; |
547 | break; | 546 | break; |
548 | #endif | 547 | #endif |
549 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 548 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
550 | case METHOD_GPIO_24XX: | 549 | case METHOD_GPIO_24XX: |
551 | reg += OMAP24XX_GPIO_DATAIN; | 550 | reg += OMAP24XX_GPIO_DATAIN; |
552 | break; | 551 | break; |
553 | #endif | 552 | #endif |
554 | #ifdef CONFIG_ARCH_OMAP4 | 553 | #ifdef CONFIG_ARCH_OMAP4 |
555 | case METHOD_GPIO_24XX: | 554 | case METHOD_GPIO_44XX: |
556 | reg += OMAP4_GPIO_DATAIN; | 555 | reg += OMAP4_GPIO_DATAIN; |
557 | break; | 556 | break; |
558 | #endif | 557 | #endif |
@@ -592,9 +591,9 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) | |||
592 | reg += OMAP7XX_GPIO_DATA_OUTPUT; | 591 | reg += OMAP7XX_GPIO_DATA_OUTPUT; |
593 | break; | 592 | break; |
594 | #endif | 593 | #endif |
595 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 594 | #ifdef CONFIG_ARCH_OMAP2PLUS |
596 | defined(CONFIG_ARCH_OMAP4) | ||
597 | case METHOD_GPIO_24XX: | 595 | case METHOD_GPIO_24XX: |
596 | case METHOD_GPIO_44XX: | ||
598 | reg += OMAP24XX_GPIO_DATAOUT; | 597 | reg += OMAP24XX_GPIO_DATAOUT; |
599 | break; | 598 | break; |
600 | #endif | 599 | #endif |
@@ -625,11 +624,12 @@ void omap_set_gpio_debounce(int gpio, int enable) | |||
625 | 624 | ||
626 | bank = get_gpio_bank(gpio); | 625 | bank = get_gpio_bank(gpio); |
627 | reg = bank->base; | 626 | reg = bank->base; |
628 | #ifdef CONFIG_ARCH_OMAP4 | 627 | |
629 | reg += OMAP4_GPIO_DEBOUNCENABLE; | 628 | if (cpu_is_omap44xx()) |
630 | #else | 629 | reg += OMAP4_GPIO_DEBOUNCENABLE; |
631 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; | 630 | else |
632 | #endif | 631 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; |
632 | |||
633 | if (!(bank->mod_usage & l)) { | 633 | if (!(bank->mod_usage & l)) { |
634 | printk(KERN_ERR "GPIO %d not requested\n", gpio); | 634 | printk(KERN_ERR "GPIO %d not requested\n", gpio); |
635 | return; | 635 | return; |
@@ -675,17 +675,17 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time) | |||
675 | } | 675 | } |
676 | 676 | ||
677 | enc_time &= 0xff; | 677 | enc_time &= 0xff; |
678 | #ifdef CONFIG_ARCH_OMAP4 | 678 | |
679 | reg += OMAP4_GPIO_DEBOUNCINGTIME; | 679 | if (cpu_is_omap44xx()) |
680 | #else | 680 | reg += OMAP4_GPIO_DEBOUNCINGTIME; |
681 | reg += OMAP24XX_GPIO_DEBOUNCE_VAL; | 681 | else |
682 | #endif | 682 | reg += OMAP24XX_GPIO_DEBOUNCE_VAL; |
683 | |||
683 | __raw_writel(enc_time, reg); | 684 | __raw_writel(enc_time, reg); |
684 | } | 685 | } |
685 | EXPORT_SYMBOL(omap_set_gpio_debounce_time); | 686 | EXPORT_SYMBOL(omap_set_gpio_debounce_time); |
686 | 687 | ||
687 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 688 | #ifdef CONFIG_ARCH_OMAP2PLUS |
688 | defined(CONFIG_ARCH_OMAP4) | ||
689 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | 689 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, |
690 | int trigger) | 690 | int trigger) |
691 | { | 691 | { |
@@ -856,9 +856,9 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
856 | goto bad; | 856 | goto bad; |
857 | break; | 857 | break; |
858 | #endif | 858 | #endif |
859 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 859 | #ifdef CONFIG_ARCH_OMAP2PLUS |
860 | defined(CONFIG_ARCH_OMAP4) | ||
861 | case METHOD_GPIO_24XX: | 860 | case METHOD_GPIO_24XX: |
861 | case METHOD_GPIO_44XX: | ||
862 | set_24xx_gpio_triggering(bank, gpio, trigger); | 862 | set_24xx_gpio_triggering(bank, gpio, trigger); |
863 | break; | 863 | break; |
864 | #endif | 864 | #endif |
@@ -937,13 +937,13 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
937 | reg += OMAP7XX_GPIO_INT_STATUS; | 937 | reg += OMAP7XX_GPIO_INT_STATUS; |
938 | break; | 938 | break; |
939 | #endif | 939 | #endif |
940 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 940 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
941 | case METHOD_GPIO_24XX: | 941 | case METHOD_GPIO_24XX: |
942 | reg += OMAP24XX_GPIO_IRQSTATUS1; | 942 | reg += OMAP24XX_GPIO_IRQSTATUS1; |
943 | break; | 943 | break; |
944 | #endif | 944 | #endif |
945 | #if defined(CONFIG_ARCH_OMAP4) | 945 | #if defined(CONFIG_ARCH_OMAP4) |
946 | case METHOD_GPIO_24XX: | 946 | case METHOD_GPIO_44XX: |
947 | reg += OMAP4_GPIO_IRQSTATUS0; | 947 | reg += OMAP4_GPIO_IRQSTATUS0; |
948 | break; | 948 | break; |
949 | #endif | 949 | #endif |
@@ -954,12 +954,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
954 | __raw_writel(gpio_mask, reg); | 954 | __raw_writel(gpio_mask, reg); |
955 | 955 | ||
956 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ | 956 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ |
957 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 957 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) |
958 | reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; | 958 | reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; |
959 | #endif | 959 | else if (cpu_is_omap44xx()) |
960 | #if defined(CONFIG_ARCH_OMAP4) | 960 | reg = bank->base + OMAP4_GPIO_IRQSTATUS1; |
961 | reg = bank->base + OMAP4_GPIO_IRQSTATUS1; | 961 | |
962 | #endif | ||
963 | if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) { | 962 | if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) { |
964 | __raw_writel(gpio_mask, reg); | 963 | __raw_writel(gpio_mask, reg); |
965 | 964 | ||
@@ -1008,14 +1007,14 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) | |||
1008 | inv = 1; | 1007 | inv = 1; |
1009 | break; | 1008 | break; |
1010 | #endif | 1009 | #endif |
1011 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1010 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
1012 | case METHOD_GPIO_24XX: | 1011 | case METHOD_GPIO_24XX: |
1013 | reg += OMAP24XX_GPIO_IRQENABLE1; | 1012 | reg += OMAP24XX_GPIO_IRQENABLE1; |
1014 | mask = 0xffffffff; | 1013 | mask = 0xffffffff; |
1015 | break; | 1014 | break; |
1016 | #endif | 1015 | #endif |
1017 | #if defined(CONFIG_ARCH_OMAP4) | 1016 | #if defined(CONFIG_ARCH_OMAP4) |
1018 | case METHOD_GPIO_24XX: | 1017 | case METHOD_GPIO_44XX: |
1019 | reg += OMAP4_GPIO_IRQSTATUSSET0; | 1018 | reg += OMAP4_GPIO_IRQSTATUSSET0; |
1020 | mask = 0xffffffff; | 1019 | mask = 0xffffffff; |
1021 | break; | 1020 | break; |
@@ -1077,7 +1076,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
1077 | l |= gpio_mask; | 1076 | l |= gpio_mask; |
1078 | break; | 1077 | break; |
1079 | #endif | 1078 | #endif |
1080 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1079 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
1081 | case METHOD_GPIO_24XX: | 1080 | case METHOD_GPIO_24XX: |
1082 | if (enable) | 1081 | if (enable) |
1083 | reg += OMAP24XX_GPIO_SETIRQENABLE1; | 1082 | reg += OMAP24XX_GPIO_SETIRQENABLE1; |
@@ -1087,7 +1086,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
1087 | break; | 1086 | break; |
1088 | #endif | 1087 | #endif |
1089 | #ifdef CONFIG_ARCH_OMAP4 | 1088 | #ifdef CONFIG_ARCH_OMAP4 |
1090 | case METHOD_GPIO_24XX: | 1089 | case METHOD_GPIO_44XX: |
1091 | if (enable) | 1090 | if (enable) |
1092 | reg += OMAP4_GPIO_IRQSTATUSSET0; | 1091 | reg += OMAP4_GPIO_IRQSTATUSSET0; |
1093 | else | 1092 | else |
@@ -1131,9 +1130,9 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | |||
1131 | spin_unlock_irqrestore(&bank->lock, flags); | 1130 | spin_unlock_irqrestore(&bank->lock, flags); |
1132 | return 0; | 1131 | return 0; |
1133 | #endif | 1132 | #endif |
1134 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 1133 | #ifdef CONFIG_ARCH_OMAP2PLUS |
1135 | defined(CONFIG_ARCH_OMAP4) | ||
1136 | case METHOD_GPIO_24XX: | 1134 | case METHOD_GPIO_24XX: |
1135 | case METHOD_GPIO_44XX: | ||
1137 | if (bank->non_wakeup_gpios & (1 << gpio)) { | 1136 | if (bank->non_wakeup_gpios & (1 << gpio)) { |
1138 | printk(KERN_ERR "Unable to modify wakeup on " | 1137 | printk(KERN_ERR "Unable to modify wakeup on " |
1139 | "non-wakeup GPIO%d\n", | 1138 | "non-wakeup GPIO%d\n", |
@@ -1227,9 +1226,9 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
1227 | __raw_writel(1 << offset, reg); | 1226 | __raw_writel(1 << offset, reg); |
1228 | } | 1227 | } |
1229 | #endif | 1228 | #endif |
1230 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 1229 | #ifdef CONFIG_ARCH_OMAP2PLUS |
1231 | defined(CONFIG_ARCH_OMAP4) | 1230 | if ((bank->method == METHOD_GPIO_24XX) || |
1232 | if (bank->method == METHOD_GPIO_24XX) { | 1231 | (bank->method == METHOD_GPIO_44XX)) { |
1233 | /* Disable wake-up during idle for dynamic tick */ | 1232 | /* Disable wake-up during idle for dynamic tick */ |
1234 | void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1233 | void __iomem *reg = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
1235 | __raw_writel(1 << offset, reg); | 1234 | __raw_writel(1 << offset, reg); |
@@ -1286,12 +1285,12 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1286 | if (bank->method == METHOD_GPIO_7XX) | 1285 | if (bank->method == METHOD_GPIO_7XX) |
1287 | isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS; | 1286 | isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS; |
1288 | #endif | 1287 | #endif |
1289 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1288 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
1290 | if (bank->method == METHOD_GPIO_24XX) | 1289 | if (bank->method == METHOD_GPIO_24XX) |
1291 | isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; | 1290 | isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; |
1292 | #endif | 1291 | #endif |
1293 | #if defined(CONFIG_ARCH_OMAP4) | 1292 | #if defined(CONFIG_ARCH_OMAP4) |
1294 | if (bank->method == METHOD_GPIO_24XX) | 1293 | if (bank->method == METHOD_GPIO_44XX) |
1295 | isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0; | 1294 | isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0; |
1296 | #endif | 1295 | #endif |
1297 | while(1) { | 1296 | while(1) { |
@@ -1571,6 +1570,7 @@ static int gpio_is_input(struct gpio_bank *bank, int mask) | |||
1571 | reg += OMAP7XX_GPIO_DIR_CONTROL; | 1570 | reg += OMAP7XX_GPIO_DIR_CONTROL; |
1572 | break; | 1571 | break; |
1573 | case METHOD_GPIO_24XX: | 1572 | case METHOD_GPIO_24XX: |
1573 | case METHOD_GPIO_44XX: | ||
1574 | reg += OMAP24XX_GPIO_OE; | 1574 | reg += OMAP24XX_GPIO_OE; |
1575 | break; | 1575 | break; |
1576 | } | 1576 | } |
@@ -1630,7 +1630,7 @@ static int gpio_2irq(struct gpio_chip *chip, unsigned offset) | |||
1630 | /*---------------------------------------------------------------------*/ | 1630 | /*---------------------------------------------------------------------*/ |
1631 | 1631 | ||
1632 | static int initialized; | 1632 | static int initialized; |
1633 | #if !(defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)) | 1633 | #if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP2) |
1634 | static struct clk * gpio_ick; | 1634 | static struct clk * gpio_ick; |
1635 | #endif | 1635 | #endif |
1636 | 1636 | ||
@@ -1756,7 +1756,7 @@ static int __init _omap_gpio_init(void) | |||
1756 | bank_size = SZ_2K; | 1756 | bank_size = SZ_2K; |
1757 | } | 1757 | } |
1758 | #endif | 1758 | #endif |
1759 | #ifdef CONFIG_ARCH_OMAP24XX | 1759 | #ifdef CONFIG_ARCH_OMAP2 |
1760 | if (cpu_is_omap242x()) { | 1760 | if (cpu_is_omap242x()) { |
1761 | gpio_bank_count = 4; | 1761 | gpio_bank_count = 4; |
1762 | gpio_bank = gpio_bank_242x; | 1762 | gpio_bank = gpio_bank_242x; |
@@ -1766,7 +1766,7 @@ static int __init _omap_gpio_init(void) | |||
1766 | gpio_bank = gpio_bank_243x; | 1766 | gpio_bank = gpio_bank_243x; |
1767 | } | 1767 | } |
1768 | #endif | 1768 | #endif |
1769 | #ifdef CONFIG_ARCH_OMAP34XX | 1769 | #ifdef CONFIG_ARCH_OMAP3 |
1770 | if (cpu_is_omap34xx()) { | 1770 | if (cpu_is_omap34xx()) { |
1771 | gpio_bank_count = OMAP34XX_NR_GPIOS; | 1771 | gpio_bank_count = OMAP34XX_NR_GPIOS; |
1772 | gpio_bank = gpio_bank_34xx; | 1772 | gpio_bank = gpio_bank_34xx; |
@@ -1809,30 +1809,42 @@ static int __init _omap_gpio_init(void) | |||
1809 | gpio_count = 32; /* 7xx has 32-bit GPIOs */ | 1809 | gpio_count = 32; /* 7xx has 32-bit GPIOs */ |
1810 | } | 1810 | } |
1811 | 1811 | ||
1812 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 1812 | #ifdef CONFIG_ARCH_OMAP2PLUS |
1813 | defined(CONFIG_ARCH_OMAP4) | 1813 | if ((bank->method == METHOD_GPIO_24XX) || |
1814 | if (bank->method == METHOD_GPIO_24XX) { | 1814 | (bank->method == METHOD_GPIO_44XX)) { |
1815 | static const u32 non_wakeup_gpios[] = { | 1815 | static const u32 non_wakeup_gpios[] = { |
1816 | 0xe203ffc0, 0x08700040 | 1816 | 0xe203ffc0, 0x08700040 |
1817 | }; | 1817 | }; |
1818 | if (cpu_is_omap44xx()) { | 1818 | |
1819 | __raw_writel(0xffffffff, bank->base + | 1819 | if (cpu_is_omap44xx()) { |
1820 | __raw_writel(0xffffffff, bank->base + | ||
1820 | OMAP4_GPIO_IRQSTATUSCLR0); | 1821 | OMAP4_GPIO_IRQSTATUSCLR0); |
1821 | __raw_writew(0x0015, bank->base + | 1822 | __raw_writew(0x0015, bank->base + |
1822 | OMAP4_GPIO_SYSCONFIG); | 1823 | OMAP4_GPIO_SYSCONFIG); |
1823 | __raw_writel(0x00000000, bank->base + | 1824 | __raw_writel(0x00000000, bank->base + |
1824 | OMAP4_GPIO_DEBOUNCENABLE); | 1825 | OMAP4_GPIO_DEBOUNCENABLE); |
1825 | /* Initialize interface clock ungated, module enabled */ | 1826 | /* |
1826 | __raw_writel(0, bank->base + OMAP4_GPIO_CTRL); | 1827 | * Initialize interface clock ungated, |
1827 | } else { | 1828 | * module enabled |
1828 | __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1); | 1829 | */ |
1829 | __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1); | 1830 | __raw_writel(0, bank->base + OMAP4_GPIO_CTRL); |
1830 | __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG); | 1831 | } else { |
1831 | __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_DEBOUNCE_EN); | 1832 | __raw_writel(0x00000000, bank->base + |
1832 | 1833 | OMAP24XX_GPIO_IRQENABLE1); | |
1833 | /* Initialize interface clock ungated, module enabled */ | 1834 | __raw_writel(0xffffffff, bank->base + |
1834 | __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL); | 1835 | OMAP24XX_GPIO_IRQSTATUS1); |
1835 | } | 1836 | __raw_writew(0x0015, bank->base + |
1837 | OMAP24XX_GPIO_SYSCONFIG); | ||
1838 | __raw_writel(0x00000000, bank->base + | ||
1839 | OMAP24XX_GPIO_DEBOUNCE_EN); | ||
1840 | |||
1841 | /* | ||
1842 | * Initialize interface clock ungated, | ||
1843 | * module enabled | ||
1844 | */ | ||
1845 | __raw_writel(0, bank->base + | ||
1846 | OMAP24XX_GPIO_CTRL); | ||
1847 | } | ||
1836 | if (i < ARRAY_SIZE(non_wakeup_gpios)) | 1848 | if (i < ARRAY_SIZE(non_wakeup_gpios)) |
1837 | bank->non_wakeup_gpios = non_wakeup_gpios[i]; | 1849 | bank->non_wakeup_gpios = non_wakeup_gpios[i]; |
1838 | gpio_count = 32; | 1850 | gpio_count = 32; |
@@ -1903,8 +1915,7 @@ static int __init _omap_gpio_init(void) | |||
1903 | return 0; | 1915 | return 0; |
1904 | } | 1916 | } |
1905 | 1917 | ||
1906 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ | 1918 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS) |
1907 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) | ||
1908 | static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) | 1919 | static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) |
1909 | { | 1920 | { |
1910 | int i; | 1921 | int i; |
@@ -1927,7 +1938,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) | |||
1927 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1938 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1928 | break; | 1939 | break; |
1929 | #endif | 1940 | #endif |
1930 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1941 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
1931 | case METHOD_GPIO_24XX: | 1942 | case METHOD_GPIO_24XX: |
1932 | wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; | 1943 | wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; |
1933 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1944 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
@@ -1935,7 +1946,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) | |||
1935 | break; | 1946 | break; |
1936 | #endif | 1947 | #endif |
1937 | #ifdef CONFIG_ARCH_OMAP4 | 1948 | #ifdef CONFIG_ARCH_OMAP4 |
1938 | case METHOD_GPIO_24XX: | 1949 | case METHOD_GPIO_44XX: |
1939 | wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0; | 1950 | wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0; |
1940 | wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0; | 1951 | wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0; |
1941 | wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0; | 1952 | wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0; |
@@ -1975,14 +1986,14 @@ static int omap_gpio_resume(struct sys_device *dev) | |||
1975 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1986 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1976 | break; | 1987 | break; |
1977 | #endif | 1988 | #endif |
1978 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1989 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
1979 | case METHOD_GPIO_24XX: | 1990 | case METHOD_GPIO_24XX: |
1980 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1991 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
1981 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1992 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; |
1982 | break; | 1993 | break; |
1983 | #endif | 1994 | #endif |
1984 | #ifdef CONFIG_ARCH_OMAP4 | 1995 | #ifdef CONFIG_ARCH_OMAP4 |
1985 | case METHOD_GPIO_24XX: | 1996 | case METHOD_GPIO_44XX: |
1986 | wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0; | 1997 | wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0; |
1987 | wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0; | 1998 | wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0; |
1988 | break; | 1999 | break; |
@@ -2013,8 +2024,7 @@ static struct sys_device omap_gpio_device = { | |||
2013 | 2024 | ||
2014 | #endif | 2025 | #endif |
2015 | 2026 | ||
2016 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 2027 | #ifdef CONFIG_ARCH_OMAP2PLUS |
2017 | defined(CONFIG_ARCH_OMAP4) | ||
2018 | 2028 | ||
2019 | static int workaround_enabled; | 2029 | static int workaround_enabled; |
2020 | 2030 | ||
@@ -2030,29 +2040,42 @@ void omap2_gpio_prepare_for_retention(void) | |||
2030 | 2040 | ||
2031 | if (!(bank->enabled_non_wakeup_gpios)) | 2041 | if (!(bank->enabled_non_wakeup_gpios)) |
2032 | continue; | 2042 | continue; |
2033 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 2043 | |
2034 | bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); | 2044 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
2035 | l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 2045 | bank->saved_datain = __raw_readl(bank->base + |
2036 | l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); | 2046 | OMAP24XX_GPIO_DATAIN); |
2037 | #endif | 2047 | l1 = __raw_readl(bank->base + |
2038 | #ifdef CONFIG_ARCH_OMAP4 | 2048 | OMAP24XX_GPIO_FALLINGDETECT); |
2039 | bank->saved_datain = __raw_readl(bank->base + | 2049 | l2 = __raw_readl(bank->base + |
2040 | OMAP4_GPIO_DATAIN); | 2050 | OMAP24XX_GPIO_RISINGDETECT); |
2041 | l1 = __raw_readl(bank->base + OMAP4_GPIO_FALLINGDETECT); | 2051 | } |
2042 | l2 = __raw_readl(bank->base + OMAP4_GPIO_RISINGDETECT); | 2052 | |
2043 | #endif | 2053 | if (cpu_is_omap44xx()) { |
2054 | bank->saved_datain = __raw_readl(bank->base + | ||
2055 | OMAP4_GPIO_DATAIN); | ||
2056 | l1 = __raw_readl(bank->base + | ||
2057 | OMAP4_GPIO_FALLINGDETECT); | ||
2058 | l2 = __raw_readl(bank->base + | ||
2059 | OMAP4_GPIO_RISINGDETECT); | ||
2060 | } | ||
2061 | |||
2044 | bank->saved_fallingdetect = l1; | 2062 | bank->saved_fallingdetect = l1; |
2045 | bank->saved_risingdetect = l2; | 2063 | bank->saved_risingdetect = l2; |
2046 | l1 &= ~bank->enabled_non_wakeup_gpios; | 2064 | l1 &= ~bank->enabled_non_wakeup_gpios; |
2047 | l2 &= ~bank->enabled_non_wakeup_gpios; | 2065 | l2 &= ~bank->enabled_non_wakeup_gpios; |
2048 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 2066 | |
2049 | __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 2067 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
2050 | __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); | 2068 | __raw_writel(l1, bank->base + |
2051 | #endif | 2069 | OMAP24XX_GPIO_FALLINGDETECT); |
2052 | #ifdef CONFIG_ARCH_OMAP4 | 2070 | __raw_writel(l2, bank->base + |
2053 | __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT); | 2071 | OMAP24XX_GPIO_RISINGDETECT); |
2054 | __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT); | 2072 | } |
2055 | #endif | 2073 | |
2074 | if (cpu_is_omap44xx()) { | ||
2075 | __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT); | ||
2076 | __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT); | ||
2077 | } | ||
2078 | |||
2056 | c++; | 2079 | c++; |
2057 | } | 2080 | } |
2058 | if (!c) { | 2081 | if (!c) { |
@@ -2074,20 +2097,23 @@ void omap2_gpio_resume_after_retention(void) | |||
2074 | 2097 | ||
2075 | if (!(bank->enabled_non_wakeup_gpios)) | 2098 | if (!(bank->enabled_non_wakeup_gpios)) |
2076 | continue; | 2099 | continue; |
2077 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 2100 | |
2078 | __raw_writel(bank->saved_fallingdetect, | 2101 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
2102 | __raw_writel(bank->saved_fallingdetect, | ||
2079 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 2103 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); |
2080 | __raw_writel(bank->saved_risingdetect, | 2104 | __raw_writel(bank->saved_risingdetect, |
2081 | bank->base + OMAP24XX_GPIO_RISINGDETECT); | 2105 | bank->base + OMAP24XX_GPIO_RISINGDETECT); |
2082 | l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); | 2106 | l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); |
2083 | #endif | 2107 | } |
2084 | #ifdef CONFIG_ARCH_OMAP4 | 2108 | |
2085 | __raw_writel(bank->saved_fallingdetect, | 2109 | if (cpu_is_omap44xx()) { |
2110 | __raw_writel(bank->saved_fallingdetect, | ||
2086 | bank->base + OMAP4_GPIO_FALLINGDETECT); | 2111 | bank->base + OMAP4_GPIO_FALLINGDETECT); |
2087 | __raw_writel(bank->saved_risingdetect, | 2112 | __raw_writel(bank->saved_risingdetect, |
2088 | bank->base + OMAP4_GPIO_RISINGDETECT); | 2113 | bank->base + OMAP4_GPIO_RISINGDETECT); |
2089 | l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN); | 2114 | l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN); |
2090 | #endif | 2115 | } |
2116 | |||
2091 | /* Check if any of the non-wakeup interrupt GPIOs have changed | 2117 | /* Check if any of the non-wakeup interrupt GPIOs have changed |
2092 | * state. If so, generate an IRQ by software. This is | 2118 | * state. If so, generate an IRQ by software. This is |
2093 | * horribly racy, but it's the best we can do to work around | 2119 | * horribly racy, but it's the best we can do to work around |
@@ -2113,30 +2139,36 @@ void omap2_gpio_resume_after_retention(void) | |||
2113 | 2139 | ||
2114 | if (gen) { | 2140 | if (gen) { |
2115 | u32 old0, old1; | 2141 | u32 old0, old1; |
2116 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 2142 | |
2117 | old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 2143 | if (cpu_is_omap24xx() || cpu_is_omap44xx()) { |
2118 | old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 2144 | old0 = __raw_readl(bank->base + |
2145 | OMAP24XX_GPIO_LEVELDETECT0); | ||
2146 | old1 = __raw_readl(bank->base + | ||
2147 | OMAP24XX_GPIO_LEVELDETECT1); | ||
2119 | __raw_writel(old0 | gen, bank->base + | 2148 | __raw_writel(old0 | gen, bank->base + |
2120 | OMAP24XX_GPIO_LEVELDETECT0); | 2149 | OMAP24XX_GPIO_LEVELDETECT0); |
2121 | __raw_writel(old1 | gen, bank->base + | 2150 | __raw_writel(old1 | gen, bank->base + |
2122 | OMAP24XX_GPIO_LEVELDETECT1); | 2151 | OMAP24XX_GPIO_LEVELDETECT1); |
2123 | __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 2152 | __raw_writel(old0, bank->base + |
2124 | __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 2153 | OMAP24XX_GPIO_LEVELDETECT0); |
2125 | #endif | 2154 | __raw_writel(old1, bank->base + |
2126 | #ifdef CONFIG_ARCH_OMAP4 | 2155 | OMAP24XX_GPIO_LEVELDETECT1); |
2127 | old0 = __raw_readl(bank->base + | 2156 | } |
2157 | |||
2158 | if (cpu_is_omap44xx()) { | ||
2159 | old0 = __raw_readl(bank->base + | ||
2128 | OMAP4_GPIO_LEVELDETECT0); | 2160 | OMAP4_GPIO_LEVELDETECT0); |
2129 | old1 = __raw_readl(bank->base + | 2161 | old1 = __raw_readl(bank->base + |
2130 | OMAP4_GPIO_LEVELDETECT1); | 2162 | OMAP4_GPIO_LEVELDETECT1); |
2131 | __raw_writel(old0 | l, bank->base + | 2163 | __raw_writel(old0 | l, bank->base + |
2132 | OMAP4_GPIO_LEVELDETECT0); | 2164 | OMAP4_GPIO_LEVELDETECT0); |
2133 | __raw_writel(old1 | l, bank->base + | 2165 | __raw_writel(old1 | l, bank->base + |
2134 | OMAP4_GPIO_LEVELDETECT1); | 2166 | OMAP4_GPIO_LEVELDETECT1); |
2135 | __raw_writel(old0, bank->base + | 2167 | __raw_writel(old0, bank->base + |
2136 | OMAP4_GPIO_LEVELDETECT0); | 2168 | OMAP4_GPIO_LEVELDETECT0); |
2137 | __raw_writel(old1, bank->base + | 2169 | __raw_writel(old1, bank->base + |
2138 | OMAP4_GPIO_LEVELDETECT1); | 2170 | OMAP4_GPIO_LEVELDETECT1); |
2139 | #endif | 2171 | } |
2140 | } | 2172 | } |
2141 | } | 2173 | } |
2142 | 2174 | ||
@@ -2144,7 +2176,7 @@ void omap2_gpio_resume_after_retention(void) | |||
2144 | 2176 | ||
2145 | #endif | 2177 | #endif |
2146 | 2178 | ||
2147 | #ifdef CONFIG_ARCH_OMAP34XX | 2179 | #ifdef CONFIG_ARCH_OMAP3 |
2148 | /* save the registers of bank 2-6 */ | 2180 | /* save the registers of bank 2-6 */ |
2149 | void omap_gpio_save_context(void) | 2181 | void omap_gpio_save_context(void) |
2150 | { | 2182 | { |
@@ -2240,8 +2272,7 @@ static int __init omap_gpio_sysinit(void) | |||
2240 | 2272 | ||
2241 | mpuio_init(); | 2273 | mpuio_init(); |
2242 | 2274 | ||
2243 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ | 2275 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS) |
2244 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) | ||
2245 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { | 2276 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { |
2246 | if (ret == 0) { | 2277 | if (ret == 0) { |
2247 | ret = sysdev_class_register(&omap_gpio_sysclass); | 2278 | ret = sysdev_class_register(&omap_gpio_sysclass); |
@@ -2300,8 +2331,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
2300 | /* FIXME for at least omap2, show pullup/pulldown state */ | 2331 | /* FIXME for at least omap2, show pullup/pulldown state */ |
2301 | 2332 | ||
2302 | irqstat = irq_desc[irq].status; | 2333 | irqstat = irq_desc[irq].status; |
2303 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ | 2334 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2PLUS) |
2304 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) | ||
2305 | if (is_in && ((bank->suspend_wakeup & mask) | 2335 | if (is_in && ((bank->suspend_wakeup & mask) |
2306 | || irqstat & IRQ_TYPE_SENSE_MASK)) { | 2336 | || irqstat & IRQ_TYPE_SENSE_MASK)) { |
2307 | char *trigger = NULL; | 2337 | char *trigger = NULL; |