aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-omap/gpio.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r--arch/arm/plat-omap/gpio.c255
1 files changed, 204 insertions, 51 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 26b387c12423..00940dc6bb50 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -138,6 +138,32 @@
138#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 138#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090
139#define OMAP24XX_GPIO_SETDATAOUT 0x0094 139#define OMAP24XX_GPIO_SETDATAOUT 0x0094
140 140
141#define OMAP4_GPIO_REVISION 0x0000
142#define OMAP4_GPIO_SYSCONFIG 0x0010
143#define OMAP4_GPIO_EOI 0x0020
144#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024
145#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028
146#define OMAP4_GPIO_IRQSTATUS0 0x002c
147#define OMAP4_GPIO_IRQSTATUS1 0x0030
148#define OMAP4_GPIO_IRQSTATUSSET0 0x0034
149#define OMAP4_GPIO_IRQSTATUSSET1 0x0038
150#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c
151#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040
152#define OMAP4_GPIO_IRQWAKEN0 0x0044
153#define OMAP4_GPIO_IRQWAKEN1 0x0048
154#define OMAP4_GPIO_SYSSTATUS 0x0104
155#define OMAP4_GPIO_CTRL 0x0130
156#define OMAP4_GPIO_OE 0x0134
157#define OMAP4_GPIO_DATAIN 0x0138
158#define OMAP4_GPIO_DATAOUT 0x013c
159#define OMAP4_GPIO_LEVELDETECT0 0x0140
160#define OMAP4_GPIO_LEVELDETECT1 0x0144
161#define OMAP4_GPIO_RISINGDETECT 0x0148
162#define OMAP4_GPIO_FALLINGDETECT 0x014c
163#define OMAP4_GPIO_DEBOUNCENABLE 0x0150
164#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154
165#define OMAP4_GPIO_CLEARDATAOUT 0x0190
166#define OMAP4_GPIO_SETDATAOUT 0x0194
141/* 167/*
142 * omap34xx specific GPIO registers 168 * omap34xx specific GPIO registers
143 */ 169 */
@@ -386,12 +412,16 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
386 reg += OMAP850_GPIO_DIR_CONTROL; 412 reg += OMAP850_GPIO_DIR_CONTROL;
387 break; 413 break;
388#endif 414#endif
389#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 415#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
390 defined(CONFIG_ARCH_OMAP4)
391 case METHOD_GPIO_24XX: 416 case METHOD_GPIO_24XX:
392 reg += OMAP24XX_GPIO_OE; 417 reg += OMAP24XX_GPIO_OE;
393 break; 418 break;
394#endif 419#endif
420#if defined(CONFIG_ARCH_OMAP4)
421 case METHOD_GPIO_24XX:
422 reg += OMAP4_GPIO_OE;
423 break;
424#endif
395 default: 425 default:
396 WARN_ON(1); 426 WARN_ON(1);
397 return; 427 return;
@@ -459,8 +489,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
459 l &= ~(1 << gpio); 489 l &= ~(1 << gpio);
460 break; 490 break;
461#endif 491#endif
462#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 492#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
463 defined(CONFIG_ARCH_OMAP4)
464 case METHOD_GPIO_24XX: 493 case METHOD_GPIO_24XX:
465 if (enable) 494 if (enable)
466 reg += OMAP24XX_GPIO_SETDATAOUT; 495 reg += OMAP24XX_GPIO_SETDATAOUT;
@@ -469,6 +498,15 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
469 l = 1 << gpio; 498 l = 1 << gpio;
470 break; 499 break;
471#endif 500#endif
501#ifdef CONFIG_ARCH_OMAP4
502 case METHOD_GPIO_24XX:
503 if (enable)
504 reg += OMAP4_GPIO_SETDATAOUT;
505 else
506 reg += OMAP4_GPIO_CLEARDATAOUT;
507 l = 1 << gpio;
508 break;
509#endif
472 default: 510 default:
473 WARN_ON(1); 511 WARN_ON(1);
474 return; 512 return;
@@ -511,12 +549,16 @@ static int __omap_get_gpio_datain(int gpio)
511 reg += OMAP850_GPIO_DATA_INPUT; 549 reg += OMAP850_GPIO_DATA_INPUT;
512 break; 550 break;
513#endif 551#endif
514#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 552#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
515 defined(CONFIG_ARCH_OMAP4)
516 case METHOD_GPIO_24XX: 553 case METHOD_GPIO_24XX:
517 reg += OMAP24XX_GPIO_DATAIN; 554 reg += OMAP24XX_GPIO_DATAIN;
518 break; 555 break;
519#endif 556#endif
557#ifdef CONFIG_ARCH_OMAP4
558 case METHOD_GPIO_24XX:
559 reg += OMAP4_GPIO_DATAIN;
560 break;
561#endif
520 default: 562 default:
521 return -EINVAL; 563 return -EINVAL;
522 } 564 }
@@ -544,7 +586,11 @@ void omap_set_gpio_debounce(int gpio, int enable)
544 586
545 bank = get_gpio_bank(gpio); 587 bank = get_gpio_bank(gpio);
546 reg = bank->base; 588 reg = bank->base;
589#ifdef CONFIG_ARCH_OMAP4
590 reg += OMAP4_GPIO_DEBOUNCENABLE;
591#else
547 reg += OMAP24XX_GPIO_DEBOUNCE_EN; 592 reg += OMAP24XX_GPIO_DEBOUNCE_EN;
593#endif
548 594
549 spin_lock_irqsave(&bank->lock, flags); 595 spin_lock_irqsave(&bank->lock, flags);
550 val = __raw_readl(reg); 596 val = __raw_readl(reg);
@@ -581,7 +627,11 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time)
581 reg = bank->base; 627 reg = bank->base;
582 628
583 enc_time &= 0xff; 629 enc_time &= 0xff;
630#ifdef CONFIG_ARCH_OMAP4
631 reg += OMAP4_GPIO_DEBOUNCINGTIME;
632#else
584 reg += OMAP24XX_GPIO_DEBOUNCE_VAL; 633 reg += OMAP24XX_GPIO_DEBOUNCE_VAL;
634#endif
585 __raw_writel(enc_time, reg); 635 __raw_writel(enc_time, reg);
586} 636}
587EXPORT_SYMBOL(omap_set_gpio_debounce_time); 637EXPORT_SYMBOL(omap_set_gpio_debounce_time);
@@ -593,23 +643,46 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
593{ 643{
594 void __iomem *base = bank->base; 644 void __iomem *base = bank->base;
595 u32 gpio_bit = 1 << gpio; 645 u32 gpio_bit = 1 << gpio;
646 u32 val;
596 647
597 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit, 648 if (cpu_is_omap44xx()) {
598 trigger & IRQ_TYPE_LEVEL_LOW); 649 MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit,
599 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit, 650 trigger & IRQ_TYPE_LEVEL_LOW);
600 trigger & IRQ_TYPE_LEVEL_HIGH); 651 MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT1, gpio_bit,
601 MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit, 652 trigger & IRQ_TYPE_LEVEL_HIGH);
602 trigger & IRQ_TYPE_EDGE_RISING); 653 MOD_REG_BIT(OMAP4_GPIO_RISINGDETECT, gpio_bit,
603 MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, 654 trigger & IRQ_TYPE_EDGE_RISING);
604 trigger & IRQ_TYPE_EDGE_FALLING); 655 MOD_REG_BIT(OMAP4_GPIO_FALLINGDETECT, gpio_bit,
605 656 trigger & IRQ_TYPE_EDGE_FALLING);
657 } else {
658 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT0, gpio_bit,
659 trigger & IRQ_TYPE_LEVEL_LOW);
660 MOD_REG_BIT(OMAP24XX_GPIO_LEVELDETECT1, gpio_bit,
661 trigger & IRQ_TYPE_LEVEL_HIGH);
662 MOD_REG_BIT(OMAP24XX_GPIO_RISINGDETECT, gpio_bit,
663 trigger & IRQ_TYPE_EDGE_RISING);
664 MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit,
665 trigger & IRQ_TYPE_EDGE_FALLING);
666 }
606 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { 667 if (likely(!(bank->non_wakeup_gpios & gpio_bit))) {
607 if (trigger != 0) 668 if (cpu_is_omap44xx()) {
608 __raw_writel(1 << gpio, bank->base 669 if (trigger != 0)
670 __raw_writel(1 << gpio, bank->base+
671 OMAP4_GPIO_IRQWAKEN0);
672 else {
673 val = __raw_readl(bank->base +
674 OMAP4_GPIO_IRQWAKEN0);
675 __raw_writel(val & (~(1 << gpio)), bank->base +
676 OMAP4_GPIO_IRQWAKEN0);
677 }
678 } else {
679 if (trigger != 0)
680 __raw_writel(1 << gpio, bank->base
609 + OMAP24XX_GPIO_SETWKUENA); 681 + OMAP24XX_GPIO_SETWKUENA);
610 else 682 else
611 __raw_writel(1 << gpio, bank->base 683 __raw_writel(1 << gpio, bank->base
612 + OMAP24XX_GPIO_CLEARWKUENA); 684 + OMAP24XX_GPIO_CLEARWKUENA);
685 }
613 } else { 686 } else {
614 if (trigger != 0) 687 if (trigger != 0)
615 bank->enabled_non_wakeup_gpios |= gpio_bit; 688 bank->enabled_non_wakeup_gpios |= gpio_bit;
@@ -617,9 +690,15 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
617 bank->enabled_non_wakeup_gpios &= ~gpio_bit; 690 bank->enabled_non_wakeup_gpios &= ~gpio_bit;
618 } 691 }
619 692
620 bank->level_mask = 693 if (cpu_is_omap44xx()) {
621 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) | 694 bank->level_mask =
622 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); 695 __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT0) |
696 __raw_readl(bank->base + OMAP4_GPIO_LEVELDETECT1);
697 } else {
698 bank->level_mask =
699 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0) |
700 __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
701 }
623} 702}
624#endif 703#endif
625 704
@@ -783,12 +862,16 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
783 reg += OMAP850_GPIO_INT_STATUS; 862 reg += OMAP850_GPIO_INT_STATUS;
784 break; 863 break;
785#endif 864#endif
786#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 865#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
787 defined(CONFIG_ARCH_OMAP4)
788 case METHOD_GPIO_24XX: 866 case METHOD_GPIO_24XX:
789 reg += OMAP24XX_GPIO_IRQSTATUS1; 867 reg += OMAP24XX_GPIO_IRQSTATUS1;
790 break; 868 break;
791#endif 869#endif
870#if defined(CONFIG_ARCH_OMAP4)
871 case METHOD_GPIO_24XX:
872 reg += OMAP4_GPIO_IRQSTATUS0;
873 break;
874#endif
792 default: 875 default:
793 WARN_ON(1); 876 WARN_ON(1);
794 return; 877 return;
@@ -798,12 +881,16 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
798 /* Workaround for clearing DSP GPIO interrupts to allow retention */ 881 /* Workaround for clearing DSP GPIO interrupts to allow retention */
799#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 882#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
800 reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; 883 reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2;
801 if (cpu_is_omap24xx() || cpu_is_omap34xx()) 884#endif
885#if defined(CONFIG_ARCH_OMAP4)
886 reg = bank->base + OMAP4_GPIO_IRQSTATUS1;
887#endif
888 if (cpu_is_omap24xx() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
802 __raw_writel(gpio_mask, reg); 889 __raw_writel(gpio_mask, reg);
803 890
804 /* Flush posted write for the irq status to avoid spurious interrupts */ 891 /* Flush posted write for the irq status to avoid spurious interrupts */
805 __raw_readl(reg); 892 __raw_readl(reg);
806#endif 893 }
807} 894}
808 895
809static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio) 896static inline void _clear_gpio_irqstatus(struct gpio_bank *bank, int gpio)
@@ -853,13 +940,18 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
853 inv = 1; 940 inv = 1;
854 break; 941 break;
855#endif 942#endif
856#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 943#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
857 defined(CONFIG_ARCH_OMAP4)
858 case METHOD_GPIO_24XX: 944 case METHOD_GPIO_24XX:
859 reg += OMAP24XX_GPIO_IRQENABLE1; 945 reg += OMAP24XX_GPIO_IRQENABLE1;
860 mask = 0xffffffff; 946 mask = 0xffffffff;
861 break; 947 break;
862#endif 948#endif
949#if defined(CONFIG_ARCH_OMAP4)
950 case METHOD_GPIO_24XX:
951 reg += OMAP4_GPIO_IRQSTATUSSET0;
952 mask = 0xffffffff;
953 break;
954#endif
863 default: 955 default:
864 WARN_ON(1); 956 WARN_ON(1);
865 return 0; 957 return 0;
@@ -927,8 +1019,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
927 l |= gpio_mask; 1019 l |= gpio_mask;
928 break; 1020 break;
929#endif 1021#endif
930#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1022#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
931 defined(CONFIG_ARCH_OMAP4)
932 case METHOD_GPIO_24XX: 1023 case METHOD_GPIO_24XX:
933 if (enable) 1024 if (enable)
934 reg += OMAP24XX_GPIO_SETIRQENABLE1; 1025 reg += OMAP24XX_GPIO_SETIRQENABLE1;
@@ -937,6 +1028,15 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
937 l = gpio_mask; 1028 l = gpio_mask;
938 break; 1029 break;
939#endif 1030#endif
1031#ifdef CONFIG_ARCH_OMAP4
1032 case METHOD_GPIO_24XX:
1033 if (enable)
1034 reg += OMAP4_GPIO_IRQSTATUSSET0;
1035 else
1036 reg += OMAP4_GPIO_IRQSTATUSCLR0;
1037 l = gpio_mask;
1038 break;
1039#endif
940 default: 1040 default:
941 WARN_ON(1); 1041 WARN_ON(1);
942 return; 1042 return;
@@ -1112,11 +1212,14 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
1112 if (bank->method == METHOD_GPIO_850) 1212 if (bank->method == METHOD_GPIO_850)
1113 isr_reg = bank->base + OMAP850_GPIO_INT_STATUS; 1213 isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
1114#endif 1214#endif
1115#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1215#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1116 defined(CONFIG_ARCH_OMAP4)
1117 if (bank->method == METHOD_GPIO_24XX) 1216 if (bank->method == METHOD_GPIO_24XX)
1118 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; 1217 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
1119#endif 1218#endif
1219#if defined(CONFIG_ARCH_OMAP4)
1220 if (bank->method == METHOD_GPIO_24XX)
1221 isr_reg = bank->base + OMAP4_GPIO_IRQSTATUS0;
1222#endif
1120 while(1) { 1223 while(1) {
1121 u32 isr_saved, level_mask = 0; 1224 u32 isr_saved, level_mask = 0;
1122 u32 enabled; 1225 u32 enabled;
@@ -1189,6 +1292,7 @@ static void gpio_mask_irq(unsigned int irq)
1189 struct gpio_bank *bank = get_irq_chip_data(irq); 1292 struct gpio_bank *bank = get_irq_chip_data(irq);
1190 1293
1191 _set_gpio_irqenable(bank, gpio, 0); 1294 _set_gpio_irqenable(bank, gpio, 0);
1295 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
1192} 1296}
1193 1297
1194static void gpio_unmask_irq(unsigned int irq) 1298static void gpio_unmask_irq(unsigned int irq)
@@ -1196,6 +1300,11 @@ static void gpio_unmask_irq(unsigned int irq)
1196 unsigned int gpio = irq - IH_GPIO_BASE; 1300 unsigned int gpio = irq - IH_GPIO_BASE;
1197 struct gpio_bank *bank = get_irq_chip_data(irq); 1301 struct gpio_bank *bank = get_irq_chip_data(irq);
1198 unsigned int irq_mask = 1 << get_gpio_index(gpio); 1302 unsigned int irq_mask = 1 << get_gpio_index(gpio);
1303 struct irq_desc *desc = irq_to_desc(irq);
1304 u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
1305
1306 if (trigger)
1307 _set_gpio_triggering(bank, get_gpio_index(gpio), trigger);
1199 1308
1200 /* For level-triggered GPIOs, the clearing must be done after 1309 /* For level-triggered GPIOs, the clearing must be done after
1201 * the HW source is cleared, thus after the handler has run */ 1310 * the HW source is cleared, thus after the handler has run */
@@ -1547,7 +1656,7 @@ static int __init _omap_gpio_init(void)
1547 1656
1548 gpio_bank_count = OMAP34XX_NR_GPIOS; 1657 gpio_bank_count = OMAP34XX_NR_GPIOS;
1549 gpio_bank = gpio_bank_44xx; 1658 gpio_bank = gpio_bank_44xx;
1550 rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION); 1659 rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
1551 printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n", 1660 printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n",
1552 (rev >> 4) & 0x0f, rev & 0x0f); 1661 (rev >> 4) & 0x0f, rev & 0x0f);
1553 } 1662 }
@@ -1581,7 +1690,16 @@ static int __init _omap_gpio_init(void)
1581 static const u32 non_wakeup_gpios[] = { 1690 static const u32 non_wakeup_gpios[] = {
1582 0xe203ffc0, 0x08700040 1691 0xe203ffc0, 0x08700040
1583 }; 1692 };
1584 1693 if (cpu_is_omap44xx()) {
1694 __raw_writel(0xffffffff, bank->base +
1695 OMAP4_GPIO_IRQSTATUSCLR0);
1696 __raw_writew(0x0015, bank->base +
1697 OMAP4_GPIO_SYSCONFIG);
1698 __raw_writel(0x00000000, bank->base +
1699 OMAP4_GPIO_DEBOUNCENABLE);
1700 /* Initialize interface clock ungated, module enabled */
1701 __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
1702 } else {
1585 __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1); 1703 __raw_writel(0x00000000, bank->base + OMAP24XX_GPIO_IRQENABLE1);
1586 __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1); 1704 __raw_writel(0xffffffff, bank->base + OMAP24XX_GPIO_IRQSTATUS1);
1587 __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG); 1705 __raw_writew(0x0015, bank->base + OMAP24XX_GPIO_SYSCONFIG);
@@ -1589,12 +1707,12 @@ static int __init _omap_gpio_init(void)
1589 1707
1590 /* Initialize interface clock ungated, module enabled */ 1708 /* Initialize interface clock ungated, module enabled */
1591 __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL); 1709 __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
1710 }
1592 if (i < ARRAY_SIZE(non_wakeup_gpios)) 1711 if (i < ARRAY_SIZE(non_wakeup_gpios))
1593 bank->non_wakeup_gpios = non_wakeup_gpios[i]; 1712 bank->non_wakeup_gpios = non_wakeup_gpios[i];
1594 gpio_count = 32; 1713 gpio_count = 32;
1595 } 1714 }
1596#endif 1715#endif
1597
1598 /* REVISIT eventually switch from OMAP-specific gpio structs 1716 /* REVISIT eventually switch from OMAP-specific gpio structs
1599 * over to the generic ones 1717 * over to the generic ones
1600 */ 1718 */
@@ -1680,14 +1798,20 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg)
1680 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; 1798 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1681 break; 1799 break;
1682#endif 1800#endif
1683#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1801#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1684 defined(CONFIG_ARCH_OMAP4)
1685 case METHOD_GPIO_24XX: 1802 case METHOD_GPIO_24XX:
1686 wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; 1803 wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN;
1687 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1804 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1688 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; 1805 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
1689 break; 1806 break;
1690#endif 1807#endif
1808#ifdef CONFIG_ARCH_OMAP4
1809 case METHOD_GPIO_24XX:
1810 wake_status = bank->base + OMAP4_GPIO_IRQWAKEN0;
1811 wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
1812 wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
1813 break;
1814#endif
1691 default: 1815 default:
1692 continue; 1816 continue;
1693 } 1817 }
@@ -1722,13 +1846,18 @@ static int omap_gpio_resume(struct sys_device *dev)
1722 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; 1846 wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA;
1723 break; 1847 break;
1724#endif 1848#endif
1725#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1849#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1726 defined(CONFIG_ARCH_OMAP4)
1727 case METHOD_GPIO_24XX: 1850 case METHOD_GPIO_24XX:
1728 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; 1851 wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA;
1729 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; 1852 wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA;
1730 break; 1853 break;
1731#endif 1854#endif
1855#ifdef CONFIG_ARCH_OMAP4
1856 case METHOD_GPIO_24XX:
1857 wake_clear = bank->base + OMAP4_GPIO_IRQWAKEN0;
1858 wake_set = bank->base + OMAP4_GPIO_IRQWAKEN0;
1859 break;
1860#endif
1732 default: 1861 default:
1733 continue; 1862 continue;
1734 } 1863 }
@@ -1772,21 +1901,29 @@ void omap2_gpio_prepare_for_retention(void)
1772 1901
1773 if (!(bank->enabled_non_wakeup_gpios)) 1902 if (!(bank->enabled_non_wakeup_gpios))
1774 continue; 1903 continue;
1775#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1904#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1776 defined(CONFIG_ARCH_OMAP4)
1777 bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); 1905 bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
1778 l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); 1906 l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1779 l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); 1907 l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT);
1780#endif 1908#endif
1909#ifdef CONFIG_ARCH_OMAP4
1910 bank->saved_datain = __raw_readl(bank->base +
1911 OMAP4_GPIO_DATAIN);
1912 l1 = __raw_readl(bank->base + OMAP4_GPIO_FALLINGDETECT);
1913 l2 = __raw_readl(bank->base + OMAP4_GPIO_RISINGDETECT);
1914#endif
1781 bank->saved_fallingdetect = l1; 1915 bank->saved_fallingdetect = l1;
1782 bank->saved_risingdetect = l2; 1916 bank->saved_risingdetect = l2;
1783 l1 &= ~bank->enabled_non_wakeup_gpios; 1917 l1 &= ~bank->enabled_non_wakeup_gpios;
1784 l2 &= ~bank->enabled_non_wakeup_gpios; 1918 l2 &= ~bank->enabled_non_wakeup_gpios;
1785#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1919#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1786 defined(CONFIG_ARCH_OMAP4)
1787 __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); 1920 __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1788 __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); 1921 __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT);
1789#endif 1922#endif
1923#ifdef CONFIG_ARCH_OMAP4
1924 __raw_writel(l1, bank->base + OMAP4_GPIO_FALLINGDETECT);
1925 __raw_writel(l2, bank->base + OMAP4_GPIO_RISINGDETECT);
1926#endif
1790 c++; 1927 c++;
1791 } 1928 }
1792 if (!c) { 1929 if (!c) {
@@ -1808,27 +1945,29 @@ void omap2_gpio_resume_after_retention(void)
1808 1945
1809 if (!(bank->enabled_non_wakeup_gpios)) 1946 if (!(bank->enabled_non_wakeup_gpios))
1810 continue; 1947 continue;
1811#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1948#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1812 defined(CONFIG_ARCH_OMAP4)
1813 __raw_writel(bank->saved_fallingdetect, 1949 __raw_writel(bank->saved_fallingdetect,
1814 bank->base + OMAP24XX_GPIO_FALLINGDETECT); 1950 bank->base + OMAP24XX_GPIO_FALLINGDETECT);
1815 __raw_writel(bank->saved_risingdetect, 1951 __raw_writel(bank->saved_risingdetect,
1816 bank->base + OMAP24XX_GPIO_RISINGDETECT); 1952 bank->base + OMAP24XX_GPIO_RISINGDETECT);
1953 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
1954#endif
1955#ifdef CONFIG_ARCH_OMAP4
1956 __raw_writel(bank->saved_fallingdetect,
1957 bank->base + OMAP4_GPIO_FALLINGDETECT);
1958 __raw_writel(bank->saved_risingdetect,
1959 bank->base + OMAP4_GPIO_RISINGDETECT);
1960 l = __raw_readl(bank->base + OMAP4_GPIO_DATAIN);
1817#endif 1961#endif
1818 /* Check if any of the non-wakeup interrupt GPIOs have changed 1962 /* Check if any of the non-wakeup interrupt GPIOs have changed
1819 * state. If so, generate an IRQ by software. This is 1963 * state. If so, generate an IRQ by software. This is
1820 * horribly racy, but it's the best we can do to work around 1964 * horribly racy, but it's the best we can do to work around
1821 * this silicon bug. */ 1965 * this silicon bug. */
1822#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \
1823 defined(CONFIG_ARCH_OMAP4)
1824 l = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN);
1825#endif
1826 l ^= bank->saved_datain; 1966 l ^= bank->saved_datain;
1827 l &= bank->non_wakeup_gpios; 1967 l &= bank->non_wakeup_gpios;
1828 if (l) { 1968 if (l) {
1829 u32 old0, old1; 1969 u32 old0, old1;
1830#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ 1970#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
1831 defined(CONFIG_ARCH_OMAP4)
1832 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); 1971 old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1833 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); 1972 old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
1834 __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0); 1973 __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
@@ -1836,6 +1975,20 @@ void omap2_gpio_resume_after_retention(void)
1836 __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); 1975 __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
1837 __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); 1976 __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
1838#endif 1977#endif
1978#ifdef CONFIG_ARCH_OMAP4
1979 old0 = __raw_readl(bank->base +
1980 OMAP4_GPIO_LEVELDETECT0);
1981 old1 = __raw_readl(bank->base +
1982 OMAP4_GPIO_LEVELDETECT1);
1983 __raw_writel(old0 | l, bank->base +
1984 OMAP4_GPIO_LEVELDETECT0);
1985 __raw_writel(old1 | l, bank->base +
1986 OMAP4_GPIO_LEVELDETECT1);
1987 __raw_writel(old0, bank->base +
1988 OMAP4_GPIO_LEVELDETECT0);
1989 __raw_writel(old1, bank->base +
1990 OMAP4_GPIO_LEVELDETECT1);
1991#endif
1839 } 1992 }
1840 } 1993 }
1841 1994
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-10 12:55:06 -0500