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Diffstat (limited to 'arch/arm/plat-omap/gpio.c')
-rw-r--r--arch/arm/plat-omap/gpio.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 26b387c12423..77bad14633e1 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -1189,6 +1189,7 @@ static void gpio_mask_irq(unsigned int irq)
1189 struct gpio_bank *bank = get_irq_chip_data(irq); 1189 struct gpio_bank *bank = get_irq_chip_data(irq);
1190 1190
1191 _set_gpio_irqenable(bank, gpio, 0); 1191 _set_gpio_irqenable(bank, gpio, 0);
1192 _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE);
1192} 1193}
1193 1194
1194static void gpio_unmask_irq(unsigned int irq) 1195static void gpio_unmask_irq(unsigned int irq)
@@ -1196,6 +1197,11 @@ static void gpio_unmask_irq(unsigned int irq)
1196 unsigned int gpio = irq - IH_GPIO_BASE; 1197 unsigned int gpio = irq - IH_GPIO_BASE;
1197 struct gpio_bank *bank = get_irq_chip_data(irq); 1198 struct gpio_bank *bank = get_irq_chip_data(irq);
1198 unsigned int irq_mask = 1 << get_gpio_index(gpio); 1199 unsigned int irq_mask = 1 << get_gpio_index(gpio);
1200 struct irq_desc *desc = irq_to_desc(irq);
1201 u32 trigger = desc->status & IRQ_TYPE_SENSE_MASK;
1202
1203 if (trigger)
1204 _set_gpio_triggering(bank, get_gpio_index(gpio), trigger);
1199 1205
1200 /* For level-triggered GPIOs, the clearing must be done after 1206 /* For level-triggered GPIOs, the clearing must be done after
1201 * the HW source is cleared, thus after the handler has run */ 1207 * the HW source is cleared, thus after the handler has run */